273 lines
8.0 KiB
C
273 lines
8.0 KiB
C
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-6-17 YCHuang12 First version
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*
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* Note: 2 channels of a tpwm have the same output.
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******************************************************************************/
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#include <rtconfig.h>
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#if (defined(BSP_USING_TPWM) && defined(RT_USING_PWM))
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#define LOG_TAG "drv.tpwm"
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#define DBG_ENABLE
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#define DBG_SECTION_NAME LOG_TAG
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#define DBG_LEVEL DBG_INFO
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#define TPWM_CHANNEL_NUM 2
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#include <rtdbg.h>
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#include <stdint.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include "NuMicro.h"
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/* Private define ---------------------------------------------------------------*/
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#define NU_TPWM_DEVICE(tpwm) (nu_tpwm_t *)(tpwm)
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/* Private typedef --------------------------------------------------------------*/
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typedef struct nu_tpwm
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{
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struct rt_device_pwm tpwm_dev;
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char *name;
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TIMER_T *tpwm_base;
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rt_uint32_t channel_mask; //TPWM_CH0 | TPWM_CH1
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} nu_tpwm_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_tpwm_enable(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config, rt_bool_t enable);
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static rt_err_t nu_tpwm_set(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config);
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static rt_err_t nu_tpwm_get(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config);
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static rt_err_t nu_tpwm_control(struct rt_device_pwm *tpwm_dev, int cmd, void *arg);
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/* Private variables ------------------------------------------------------------*/
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#ifdef BSP_USING_TPWM0
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static nu_tpwm_t nu_tpwm0;
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#endif
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#ifdef BSP_USING_TPWM1
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static nu_tpwm_t nu_tpwm1;
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#endif
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#ifdef BSP_USING_TPWM2
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static nu_tpwm_t nu_tpwm2;
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#endif
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#ifdef BSP_USING_TPWM3
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static nu_tpwm_t nu_tpwm3;
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#endif
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#ifdef BSP_USING_TPWM4
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static nu_tpwm_t nu_tpwm4;
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#endif
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#ifdef BSP_USING_TPWM5
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static nu_tpwm_t nu_tpwm5;
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#endif
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static struct rt_pwm_ops nu_tpwm_ops =
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{
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nu_tpwm_control
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};
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/* Functions define ------------------------------------------------------------*/
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static rt_err_t nu_tpwm_enable(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config, rt_bool_t enable)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t tpwm_channel = tpwm_config->channel;
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nu_tpwm_t *nu_tpwm = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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if (enable == RT_TRUE)
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{
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if (nu_tpwm->channel_mask == 0)
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{
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TPWM_START_COUNTER(nu_tpwm->tpwm_base);
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}
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nu_tpwm->channel_mask |= (1 << tpwm_channel);
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TPWM_ENABLE_OUTPUT(nu_tpwm->tpwm_base, nu_tpwm->channel_mask);
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}
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else
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{
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nu_tpwm->channel_mask &= ~(1 << tpwm_channel);
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TPWM_ENABLE_OUTPUT(nu_tpwm->tpwm_base, nu_tpwm->channel_mask);
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if (nu_tpwm->channel_mask == 0)
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{
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TPWM_STOP_COUNTER(nu_tpwm->tpwm_base);
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}
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}
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return result;
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}
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static rt_err_t nu_tpwm_set(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config)
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{
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if (tpwm_config->period <= 0)
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return -(RT_ERROR);
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rt_uint32_t tpwm_freq, tpwm_dutycycle ;
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rt_uint32_t tpwm_period = tpwm_config->period;
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rt_uint32_t tpwm_pulse = tpwm_config->pulse;
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nu_tpwm_t *nu_tpwm = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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rt_uint32_t pre_tpwm_prescaler = TPWM_GET_PRESCALER(nu_tpwm->tpwm_base);
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tpwm_freq = 1000000000 / tpwm_period;
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tpwm_dutycycle = (tpwm_pulse * 100) / tpwm_period;
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TPWM_ConfigOutputFreqAndDuty(nu_tpwm->tpwm_base, tpwm_freq, tpwm_dutycycle) ;
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return RT_EOK;
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}
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static rt_err_t nu_tpwm_get(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config)
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{
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rt_uint32_t tpwm_real_period, tpwm_real_duty, time_tick, u32TPWMClockFreq ;
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nu_tpwm_t *nu_tpwm = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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rt_uint32_t tpwm_prescale = TPWM_GET_PRESCALER(nu_tpwm->tpwm_base);
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rt_uint32_t tpwm_period = TPWM_GET_PERIOD(nu_tpwm->tpwm_base);
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rt_uint32_t tpwm_pulse = TPWM_GET_CMPDAT(nu_tpwm->tpwm_base);
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u32TPWMClockFreq = TIMER_GetModuleClock(nu_tpwm->tpwm_base);
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time_tick = 1000000000000 / u32TPWMClockFreq;
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tpwm_real_period = (((tpwm_prescale + 1) * (tpwm_period + 1)) * time_tick) / 1000;
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tpwm_real_duty = (((tpwm_prescale + 1) * tpwm_pulse * time_tick)) / 1000;
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tpwm_config->period = tpwm_real_period;
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tpwm_config->pulse = tpwm_real_duty;
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LOG_I("%s %d %d %d\n", nu_tpwm->name, tpwm_config->channel, tpwm_config->period, tpwm_config->pulse);
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return RT_EOK;
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}
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static rt_err_t nu_tpwm_control(struct rt_device_pwm *tpwm_dev, int cmd, void *arg)
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{
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struct rt_pwm_configuration *tpwm_config = (struct rt_pwm_configuration *)arg;
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RT_ASSERT(tpwm_dev != RT_NULL);
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RT_ASSERT(tpwm_config != RT_NULL);
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nu_tpwm_t *nu_tpwm = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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RT_ASSERT(nu_tpwm != RT_NULL);
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RT_ASSERT(nu_tpwm->tpwm_base != RT_NULL);
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if ((tpwm_config->channel + 1) > TPWM_CHANNEL_NUM)
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return -(RT_ERROR);
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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return nu_tpwm_enable(tpwm_dev, tpwm_config, RT_TRUE);
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case PWM_CMD_DISABLE:
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return nu_tpwm_enable(tpwm_dev, tpwm_config, RT_FALSE);
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case PWM_CMD_SET:
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return nu_tpwm_set(tpwm_dev, tpwm_config);
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case PWM_CMD_GET:
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return nu_tpwm_get(tpwm_dev, tpwm_config);
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default:
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break;
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}
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return -(RT_EINVAL);
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}
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int rt_hw_tpwm_init(void)
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{
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rt_err_t ret = RT_EOK;
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#ifdef BSP_USING_TPWM0
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nu_tpwm0.tpwm_base = TIMER0;
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nu_tpwm0.name = "tpwm0";
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nu_tpwm0.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm0.tpwm_dev, nu_tpwm0.name, &nu_tpwm_ops, &nu_tpwm0);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm0 register failed\n");
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}
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SYS_ResetModule(TMR0_RST);
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CLK_EnableModuleClock(TMR0_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER0);
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#endif
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#ifdef BSP_USING_TPWM1
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nu_tpwm1.tpwm_base = TIMER1;
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nu_tpwm1.name = "tpwm1";
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nu_tpwm1.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm1.tpwm_dev, nu_tpwm1.name, &nu_tpwm_ops, &nu_tpwm1);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm1 register failed\n");
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}
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SYS_ResetModule(TMR1_RST);
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CLK_EnableModuleClock(TMR1_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER1);
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#endif
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#ifdef BSP_USING_TPWM2
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nu_tpwm2.tpwm_base = TIMER2;
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nu_tpwm2.name = "tpwm2";
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nu_tpwm2.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm2.tpwm_dev, nu_tpwm2.name, &nu_tpwm_ops, &nu_tpwm2);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm2 register failed\n");
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}
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SYS_ResetModule(TMR2_RST);
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CLK_EnableModuleClock(TMR2_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER2);
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#endif
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#ifdef BSP_USING_TPWM3
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nu_tpwm3.tpwm_base = TIMER3;
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nu_tpwm3.name = "tpwm3";
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nu_tpwm3.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm3.tpwm_dev, nu_tpwm3.name, &nu_tpwm_ops, &nu_tpwm3);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm3 register failed\n");
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}
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SYS_ResetModule(TMR3_RST);
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CLK_EnableModuleClock(TMR3_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER3);
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#endif
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#ifdef BSP_USING_TPWM4
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nu_tpwm4.tpwm_base = TIMER4;
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nu_tpwm4.name = "tpwm4";
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nu_tpwm4.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm4.tpwm_dev, nu_tpwm4.name, &nu_tpwm_ops, &nu_tpwm4);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm4 register failed\n");
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}
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SYS_ResetModule(TMR4_RST);
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CLK_EnableModuleClock(TMR4_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER4);
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#endif
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#ifdef BSP_USING_TPWM5
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nu_tpwm5.tpwm_base = TIMER5;
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nu_tpwm5.name = "tpwm5";
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nu_tpwm5.channel_mask = 0;
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ret = rt_device_pwm_register(&nu_tpwm5.tpwm_dev, nu_tpwm5.name, &nu_tpwm_ops, &nu_tpwm5);
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if (ret != RT_EOK)
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{
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rt_kprintf("tpwm5 register failed\n");
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}
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SYS_ResetModule(TMR5_RST);
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CLK_EnableModuleClock(TMR5_MODULE);
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TPWM_ENABLE_PWM_MODE(TIMER5);
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#endif
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_tpwm_init);
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#endif //#if (defined(BSP_USING_TPWM) && defined(RT_USING_PWM))
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