2017-12-04 18:52:02 +08:00
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/*
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2021-03-29 07:20:47 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2017-12-04 18:52:02 +08:00
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*
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2021-03-29 07:20:47 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2017-12-04 18:52:02 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2017-12-04 Haley the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "am_mcu_apollo.h"
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#ifdef RT_USING_PDM
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2018-09-21 16:10:44 +08:00
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/* messagequeue define */
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struct rt_messagequeue pdm_mq;
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2017-12-04 18:52:02 +08:00
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2018-09-21 16:10:44 +08:00
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static rt_uint8_t am_pdm_buffer_pool[1024];
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#define NWA_FRAME_SAMPLES 160 /* 8k, 16bit, mono audio data */
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2017-12-04 18:52:02 +08:00
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#define PDM_FIFO_THRESHOLD NWA_FRAME_SAMPLES
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#define PDM_GPIO_CLK 22
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#define PDM_GPIO_CFG_CLK AM_HAL_PIN_22_PDM_CLK
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#define PDM_GPIO_DATA 23
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#define PDM_GPIO_CFG_DATA AM_HAL_PIN_23_PDM_DATA
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static am_hal_pdm_config_t g_sPDMConfig =
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{
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2018-09-21 16:10:44 +08:00
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AM_HAL_PDM_PCFG_LRSWAP_DISABLE | AM_HAL_PDM_PCFG_RIGHT_PGA_0DB | AM_HAL_PDM_PCFG_LEFT_PGA_0DB
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| AM_HAL_PDM_PCFG_MCLKDIV_DIV1 | AM_HAL_PDM_PCFG_SINC_RATE(48) | AM_HAL_PDM_PCFG_ADCHPD_ENABLE
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| AM_HAL_PDM_PCFG_HPCUTOFF(0x1) | AM_HAL_PDM_PCFG_CYCLES(0x1) | AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
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| AM_HAL_PDM_PCFG_PDMCORE_ENABLE, /* Set the PDM configuration */
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AM_HAL_PDM_IOCLK_750KHZ | AM_HAL_PDM_VCFG_RSTB_NORMAL | AM_HAL_PDM_VCFG_PDMCLK_ENABLE
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| AM_HAL_PDM_VCFG_I2SMODE_DISABLE | AM_HAL_PDM_VCFG_BCLKINV_DISABLE | AM_HAL_PDM_VCFG_DMICDEL_DISABLE
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| AM_HAL_PDM_VCFG_SELAP_INTERNAL | AM_HAL_PDM_VCFG_PACK_DISABLE | AM_HAL_PDM_VCFG_CHANNEL_LEFT, /* Set the Voice Configuration */
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PDM_FIFO_THRESHOLD, /* Select the FIFO PCM sample threshold 0~256 */
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2017-12-04 18:52:02 +08:00
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};
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/**
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* @brief Get the pdm data.
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*
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* @param None.
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*
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* This function Get the pdm data.
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*
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* @return None.
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*/
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rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
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{
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2018-09-21 16:10:44 +08:00
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rt_uint8_t pdm_rbufftemp[340];
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2017-12-04 18:52:02 +08:00
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2021-03-29 07:20:47 +08:00
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/* wait pdm message forever */
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2018-09-21 16:10:44 +08:00
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rt_mq_recv(&pdm_mq, pdm_rbufftemp, 340, RT_WAITING_FOREVER);
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2017-12-04 18:52:02 +08:00
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/* copy the data */
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2018-09-21 16:10:44 +08:00
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rt_memcpy(buff, (char *)pdm_rbufftemp, size);
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2017-12-04 18:52:02 +08:00
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return 0;
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}
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/**
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* @brief Start the pdm.
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*
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* @param None.
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*
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* This function Start the pdm.
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*
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* @return None.
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*/
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void am_pdm_start(void)
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{
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/* Enable PDM */
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am_hal_interrupt_enable(AM_HAL_INTERRUPT_PDM);
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2018-09-21 16:10:44 +08:00
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am_hal_pdm_enable();
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2017-12-04 18:52:02 +08:00
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}
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/**
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* @brief Stop the pdm.
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*
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* @param None.
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*
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* This function Stop the pdm.
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*
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* @return None.
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*/
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void am_pdm_stop(void)
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{
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/* Disable PDM */
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am_hal_interrupt_disable(AM_HAL_INTERRUPT_PDM);
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2018-09-21 16:10:44 +08:00
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am_hal_pdm_disable();
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2017-12-04 18:52:02 +08:00
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}
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/**
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* @brief Get the pdm left gain.
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*
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* @param None.
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*
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* This function Get the pdm left gain.
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*
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* @return gain_val.
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*/
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uint8_t am_pdm_left_gain_get(void)
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{
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/* get the left gain */
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return am_hal_pdm_left_gain_get();
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}
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/**
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* @brief Set the pdm left gain.
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*
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2018-09-21 16:10:44 +08:00
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* @param gain_val.
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2017-12-04 18:52:02 +08:00
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*
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* This function Set the pdm left gain.
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*
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* @return None.
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*/
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void am_pdm_left_gain_set(uint8_t gain_val)
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{
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/* set the left gain */
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am_hal_pdm_left_gain_set(gain_val);
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}
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/**
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* @brief Get the pdm right gain.
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*
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* @param None.
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*
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* This function Get the pdm right gain.
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*
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* @return gain_val.
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*/
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uint8_t am_pdm_right_gain_get(void)
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{
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/* get the right gain */
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return am_hal_pdm_right_gain_get();
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}
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/**
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* @brief Set the pdm right gain.
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*
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2018-09-21 16:10:44 +08:00
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* @param gain_val.
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2017-12-04 18:52:02 +08:00
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*
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* This function Set the pdm right gain.
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*
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* @return None.
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*/
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void am_pdm_right_gain_set(uint8_t gain_val)
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{
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/* set the right gain */
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am_hal_pdm_right_gain_set(gain_val);
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}
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/**
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* @brief Interrupt handler for the PDM
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*
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* This function is Interrupt handler for the PDM
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*
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* @return None.
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*/
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void am_pdm_isr (void)
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{
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int i;
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2018-09-21 16:10:44 +08:00
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rt_int16_t pdm_sbufftemp[160];
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2017-12-04 18:52:02 +08:00
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/* Clear the PDM interrupt */
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am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
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for (i = 0; i < PDM_FIFO_THRESHOLD; i++) /* adjust as needed */
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{
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2018-09-21 16:10:44 +08:00
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pdm_sbufftemp[i] = (rt_int16_t)am_hal_pdm_fifo_data_read();
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2017-12-04 18:52:02 +08:00
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}
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2018-09-21 16:10:44 +08:00
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/* send the message */
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rt_mq_send(&pdm_mq, pdm_sbufftemp, PDM_FIFO_THRESHOLD*sizeof(rt_int16_t));
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2017-12-04 18:52:02 +08:00
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}
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/**
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* @brief Initialize the PDM
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*
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* This function initialize the PDM
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*
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* @return None.
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*/
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int rt_hw_pdm_init(void)
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{
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/* Enable power to modules used */
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am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PDM);
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/* Enable the PDM clock and data */
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am_hal_gpio_pin_config(PDM_GPIO_CLK, PDM_GPIO_CFG_CLK | AM_HAL_GPIO_HIGH_DRIVE);
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am_hal_gpio_pin_config(PDM_GPIO_DATA, PDM_GPIO_CFG_DATA );
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/* PDM setting */
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am_hal_pdm_config(&g_sPDMConfig);
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/* Enable PDM interrupts */
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am_hal_pdm_int_enable(AM_HAL_PDM_INT_FIFO);
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/* Clear PDM interrupts */
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am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
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2018-09-21 16:10:44 +08:00
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/* messagequeue init */
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rt_mq_init(&pdm_mq, "mq_pdm",
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&am_pdm_buffer_pool[0],
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340 - sizeof(void*),
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sizeof(am_pdm_buffer_pool),
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RT_IPC_FLAG_FIFO);
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//rt_kprintf("pdm_init!\n");
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2017-12-04 18:52:02 +08:00
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return 0;
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}
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#ifdef RT_USING_COMPONENTS_INIT
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INIT_BOARD_EXPORT(rt_hw_pdm_init);
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#endif
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#endif
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/*@}*/
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