2021-09-07 20:08:26 +08:00
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/*
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2022-03-29 07:38:42 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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2021-09-07 20:08:26 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-12-27 iysheng first release
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2021-09-10 11:21:47 +08:00
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* 2021-09-10 ZhuXW add V85XX support
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2021-09-07 20:08:26 +08:00
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*/
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#ifndef __DRV_GPIO_H__
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#define __DRV_GPIO_H__
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#include <rtthread.h>
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#include <rthw.h>
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#include <rtdevice.h>
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#include <board.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define __V85XX_PORT(port) GPIO##port##_BASE
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2021-09-12 10:36:14 +08:00
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#define GET_PIN(PORTx,PIN) (__V85XX_PORT(PORTx)==GPIOA_BASE) ? (rt_base_t)(0 + PIN):(rt_base_t)((16 * ( ((rt_base_t)__V85XX_PORT(PORTx) - (rt_base_t)GPIOB_BASE)/(0x0400UL) +1)) + PIN)
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2021-09-07 20:08:26 +08:00
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#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
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#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
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#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
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2021-09-10 11:21:47 +08:00
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#define PIN_V85XXPORT(pin) ((GPIO_TypeDef *)(GPIOB_BASE + (0x400u * PIN_PORT(pin))))
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#define PIN_V85XXPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
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2021-09-07 20:08:26 +08:00
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struct pin_irq_map
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{
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rt_uint16_t pinbit;
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IRQn_Type irqno;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_GPIO_H__ */
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