269 lines
6.4 KiB
C
269 lines
6.4 KiB
C
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-5 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_WHC)
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#include <rthw.h>
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#include "drv_whc.h"
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#include "drv_sys.h"
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#include "nu_bitutil.h"
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/* Private define ---------------------------------------------------------------*/
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enum
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{
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WHC_START = -1,
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#if defined(BSP_USING_WHC0)
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WHC0_IDX,
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#endif
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#if defined(BSP_USING_WHC1)
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WHC1_IDX,
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#endif
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WHC_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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struct nu_whc_priv
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{
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char *name;
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WHC_T *base;
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IRQn_Type irqn;
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uint32_t rstidx;
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rt_device_t psChDev[WHC_CH];
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};
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typedef struct nu_whc_priv *nu_whc_priv_t;
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struct nu_whc
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{
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struct rt_device dev;
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nu_whc_priv_t psPriv;
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uint32_t u32WhcChNum;
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void *pvTxBuf;
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};
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typedef struct nu_whc *nu_whc_t;
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static struct nu_whc_priv nu_whc_priv_arr [] =
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{
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#if defined(BSP_USING_WHC0)
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{
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.name = "whc0",
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.base = WHC0,
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.irqn = WHC0_IRQn,
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.rstidx = WHC0_RST,
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},
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#endif
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#if defined(BSP_USING_WHC1)
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{
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.name = "whc1",
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.base = WHC1,
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.irqn = WHC1_IRQn,
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.rstidx = WHC1_RST,
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},
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#endif
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}; /* nu_whc_priv */
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/**
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* All WHC interrupt service routine
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*/
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static void nu_whc_isr(int vector, void *param)
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{
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nu_whc_priv_t psNuWhcPriv = (nu_whc_priv_t)param;
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volatile uint32_t vu32Intsts = psNuWhcPriv->base->INTSTS;
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uint32_t irqidx;
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while ((irqidx = nu_ctz(vu32Intsts)) != 32)
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{
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uint32_t u32IsrBitMask = 1 << irqidx ;
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switch (irqidx)
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{
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/* Process TX-complete interrupt event */
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case WHC_INTSTS_TX0IF_Pos:
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case WHC_INTSTS_TX1IF_Pos:
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case WHC_INTSTS_TX2IF_Pos:
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case WHC_INTSTS_TX3IF_Pos:
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{
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uint32_t u32ChNum = irqidx - WHC_INTSTS_TX0IF_Pos;
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rt_device_t device = psNuWhcPriv->psChDev[u32ChNum];
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nu_whc_t psWhc = (nu_whc_t)device;
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if (device->tx_complete && psWhc->pvTxBuf)
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{
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device->tx_complete(device, psWhc->pvTxBuf);
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psWhc->pvTxBuf = RT_NULL;
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}
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}
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break;
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/* Process RX-indicate interrupt event */
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case WHC_INTSTS_RX0IF_Pos:
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case WHC_INTSTS_RX1IF_Pos:
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case WHC_INTSTS_RX2IF_Pos:
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case WHC_INTSTS_RX3IF_Pos:
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{
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uint32_t u32ChNum = irqidx - WHC_INTSTS_RX0IF_Pos;
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rt_device_t device = psNuWhcPriv->psChDev[u32ChNum];
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if (device->rx_indicate)
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{
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device->rx_indicate(device, 1);
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}
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}
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break;
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default:
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break;
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}
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/* Clear interrupt bit. */
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WHC_CLR_INT_FLAG(psNuWhcPriv->base, u32IsrBitMask);
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/* Clear served bit */
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vu32Intsts &= ~(u32IsrBitMask);
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}
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}
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rt_err_t nu_whc_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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rt_err_t nu_whc_open(rt_device_t dev, rt_uint16_t oflag)
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{
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nu_whc_t psWhc = (nu_whc_t)dev;
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nu_whc_priv_t psWhcPriv = psWhc->psPriv;
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WHC_ENABLE_INT(psWhcPriv->base, WHC_INTEN_TX0IEN_Msk << psWhc->u32WhcChNum |
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WHC_INTEN_RX0IEN_Msk << psWhc->u32WhcChNum);
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return RT_EOK;
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}
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rt_err_t nu_whc_close(rt_device_t dev)
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{
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nu_whc_t psWhc = (nu_whc_t)dev;
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nu_whc_priv_t psWhcPriv = psWhc->psPriv;
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WHC_DISABLE_INT(psWhcPriv->base, WHC_INTEN_TX0IEN_Msk << psWhc->u32WhcChNum |
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WHC_INTEN_RX0IEN_Msk << psWhc->u32WhcChNum);
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return RT_EOK;
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}
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rt_size_t nu_whc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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nu_whc_t psWhc = (nu_whc_t)dev;
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nu_whc_priv_t psWhcPriv = psWhc->psPriv;
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if ((sizeof(nu_whc_msg) != size) || ((uint32_t)buffer & 0x3))
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goto exit_nu_whc_read;
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if (WHC_Recv(psWhcPriv->base, psWhc->u32WhcChNum, (uint32_t *)buffer) < 0)
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goto exit_nu_whc_read;
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return size;
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exit_nu_whc_read:
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return 0;
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}
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rt_size_t nu_whc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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nu_whc_t psWhc = (nu_whc_t)dev;
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nu_whc_priv_t psWhcPriv = psWhc->psPriv;
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if ((sizeof(nu_whc_msg) != size) || ((uint32_t)buffer & 0x3))
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goto exit_nu_whc_write;
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psWhc->pvTxBuf = (void *)buffer;
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if (WHC_Send(psWhcPriv->base, psWhc->u32WhcChNum, (uint32_t *)buffer) < 0)
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goto exit_nu_whc_write;
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return size;
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exit_nu_whc_write:
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return 0;
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}
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rt_err_t nu_whc_control(rt_device_t dev, int cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_err_t whc_register(nu_whc_priv_t psWhcPriv)
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{
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int i;
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char szDevName[16];
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for (i = 0; i < WHC_CH; i++)
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{
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nu_whc_t psWhc;
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rt_device_t device = rt_device_create(RT_Device_Class_Miscellaneous, sizeof(struct nu_whc) - sizeof(struct rt_device));
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RT_ASSERT(device);
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psWhcPriv->psChDev[i] = device;
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psWhc = (nu_whc_t)device;
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psWhc->psPriv = psWhcPriv;
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psWhc->u32WhcChNum = i;
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device->type = RT_Device_Class_Miscellaneous;
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device->rx_indicate = RT_NULL;
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device->tx_complete = RT_NULL;
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#ifdef RT_USING_DEVICE_OPS
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device->ops = RT_NULL;
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#else
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device->init = nu_whc_init;
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device->open = nu_whc_open;
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device->close = nu_whc_close;
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device->read = nu_whc_read;
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device->write = nu_whc_write;
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device->control = nu_whc_control;
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#endif
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device->user_data = (void *)psWhcPriv;
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rt_snprintf(szDevName, sizeof(szDevName), "%s-%d", psWhcPriv->name, psWhc->u32WhcChNum);
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RT_ASSERT(rt_device_register(device, szDevName, RT_DEVICE_FLAG_STANDALONE) == RT_EOK);
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}
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return RT_EOK;
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}
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/**
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* Hardware Sem Initialization
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*/
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int rt_hw_whc_init(void)
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{
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int i;
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for (i = (WHC_START + 1); i < WHC_CNT; i++)
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{
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nu_whc_priv_t psNuWhcPriv = &nu_whc_priv_arr[i];
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whc_register(psNuWhcPriv);
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rt_hw_interrupt_install(psNuWhcPriv->irqn, nu_whc_isr, psNuWhcPriv, psNuWhcPriv->name);
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rt_hw_interrupt_umask(nu_whc_priv_arr[i].irqn);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_whc_init);
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#endif //#if defined(BSP_USING_WHC)
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