2020-11-30 13:13:08 +08:00
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MEMORY
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{
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psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
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psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
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psu_r5_0_atcm_MEM_0 : ORIGIN = 0x0, LENGTH = 0x10000
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psu_r5_0_btcm_MEM_0 : ORIGIN = 0x20000, LENGTH = 0x10000
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psu_r5_ddr_0_MEM_0 : ORIGIN = 0x100000, LENGTH = 0x7FE00000
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psu_r5_tcm_ram_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x40000
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}
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ENTRY(_reset)
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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SECTIONS
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{
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2022-04-19 18:28:26 +08:00
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.vectors :
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2020-11-30 13:13:08 +08:00
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{
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KEEP (*(.vectors))
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*(.boot)
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*(.text.isr)
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} > psu_r5_0_atcm_MEM_0
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__text_start = .;
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.text :
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{
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*(.text)
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*(.text.*)
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/* section information for utest */
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. = ALIGN(4);
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__rt_utest_tc_tab_start = .;
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KEEP(*(UtestTcTab))
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__rt_utest_tc_tab_end = .;
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2022-04-19 18:28:26 +08:00
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2020-11-30 13:13:08 +08:00
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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/* section information for modules */
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. = ALIGN(4);
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__rtmsymtab_start = .;
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KEEP(*(RTMSymTab))
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__rtmsymtab_end = .;
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/* section information for initialization */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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} > psu_r5_ddr_0_MEM_0 = 0
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__text_end = .;
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__exidx_start = .;
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.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > psu_r5_ddr_0_MEM_0
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__exidx_end = .;
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.note-ABI-tag :
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{
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KEEP (*(.note-ABI-tag))
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} > psu_r5_ddr_0_MEM_0
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.note.gnu.build-id :
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{
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KEEP (*(.note.gnu.build-id))
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} > psu_r5_ddr_0_MEM_0
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__rodata_start = .;
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.rodata : { *(.rodata) *(.rodata.*) } > psu_r5_ddr_0_MEM_0
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__rodata_end = .;
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. = ALIGN(4);
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.ctors :
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{
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PROVIDE(__ctors_start__ = .);
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2022-04-19 18:28:26 +08:00
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/* new GCC version uses .init_array */
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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2020-11-30 13:13:08 +08:00
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PROVIDE(__ctors_end__ = .);
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} > psu_r5_ddr_0_MEM_0
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.dtors :
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{
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PROVIDE(__dtors_start__ = .);
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KEEP(*(SORT(.dtors.*)))
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KEEP(*(.dtors))
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PROVIDE(__dtors_end__ = .);
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} > psu_r5_ddr_0_MEM_0
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. = ALIGN(4);
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__data_start = .;
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.data :
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{
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*(.data)
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*(.data.*)
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} > psu_r5_ddr_0_MEM_0
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__data_end = .;
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. = ALIGN(4);
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__bss_start = .;
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.bss :
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{
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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} > psu_r5_ddr_0_MEM_0
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. = ALIGN(4);
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__bss_end = .;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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_end = .;
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}
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