2022-10-19 12:23:25 +08:00
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/*
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2023-02-09 12:01:20 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2022-10-19 12:23:25 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-01 zhs the first version which add from wch
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*/
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#include <board.h>
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#include "drv_soft_spi.h"
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2022-11-20 18:05:32 +08:00
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#ifdef BSP_USING_SOFT_SPI
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2022-10-19 12:23:25 +08:00
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#define LOG_TAG "drv.soft_spi"
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#include <drv_log.h>
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static struct ch32_soft_spi_config soft_spi_config[] =
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{
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#ifdef BSP_USING_SOFT_SPI1
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SOFT_SPI1_BUS_CONFIG,
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#endif
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#ifdef BSP_USING_SOFT_SPI2
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SOFT_SPI2_BUS_CONFIG,
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#endif
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};
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/**
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* Attach the spi device to soft SPI bus, this function must be used after initialization.
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*/
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rt_err_t rt_hw_soft_spi_device_attach(const char *bus_name, const char *device_name, const char *pin_name)
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{
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rt_err_t result;
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struct rt_spi_device *spi_device;
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/* initialize the cs pin && select the slave*/
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rt_base_t cs_pin = rt_pin_get(pin_name);
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rt_pin_mode(cs_pin, PIN_MODE_OUTPUT);
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rt_pin_write(cs_pin, PIN_HIGH);
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/* attach the device to soft spi bus*/
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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return result;
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}
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static void ch32_spi_gpio_init(struct ch32_soft_spi *spi)
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{
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struct ch32_soft_spi_config *cfg = (struct ch32_soft_spi_config *)spi->cfg;
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rt_pin_mode(cfg->sck, PIN_MODE_OUTPUT);
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rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
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rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
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rt_pin_write(cfg->miso, PIN_HIGH);
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rt_pin_write(cfg->sck, PIN_HIGH);
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rt_pin_write(cfg->mosi, PIN_HIGH);
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}
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void ch32_tog_sclk(void *data)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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if(rt_pin_read(cfg->sck) == PIN_HIGH)
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{
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rt_pin_write(cfg->sck, PIN_LOW);
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}
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else
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{
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rt_pin_write(cfg->sck, PIN_HIGH);
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}
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}
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void ch32_set_sclk(void *data, rt_int32_t state)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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if (state)
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{
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rt_pin_write(cfg->sck, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->sck, PIN_LOW);
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}
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}
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void ch32_set_mosi(void *data, rt_int32_t state)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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if (state)
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{
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rt_pin_write(cfg->mosi, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->mosi, PIN_LOW);
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}
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}
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void ch32_set_miso(void *data, rt_int32_t state)
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{
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struct ch32_soft_spi_config* cfg = (struct ch3_soft_spi_config*)data;
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if (state)
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{
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rt_pin_write(cfg->miso, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->miso, PIN_LOW);
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}
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}
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rt_int32_t ch32_get_sclk(void *data)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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return rt_pin_read(cfg->sck);
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}
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rt_int32_t ch32_get_mosi(void *data)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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return rt_pin_read(cfg->mosi);
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}
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rt_int32_t ch32_get_miso(void *data)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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return rt_pin_read(cfg->miso);
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}
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void ch32_dir_mosi(void *data, rt_int32_t state)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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if (state)
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{
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rt_pin_mode(cfg->mosi, PIN_MODE_INPUT);
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}
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else
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{
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rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
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}
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}
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void ch32_dir_miso(void *data, rt_int32_t state)
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{
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struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
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if (state)
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{
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rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
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}
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else
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{
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rt_pin_mode(cfg->miso, PIN_MODE_OUTPUT);
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}
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}
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static void ch32_udelay(rt_uint32_t us)
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{
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rt_uint32_t ticks;
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rt_uint32_t told, tnow, tcnt = 0;
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rt_uint32_t reload = SysTick->CMP;
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ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
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told = SysTick->CNT;
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while (1)
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{
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tnow = SysTick->CNT;
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if (tnow != told)
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{
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if (tnow > told)
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{
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tcnt += tnow - told;
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}
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else
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{
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tcnt += reload - told + tnow;
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}
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told = tnow;
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if (tcnt >= ticks)
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{
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break;
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}
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}
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}
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}
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static struct rt_spi_bit_ops ch32_soft_spi_ops =
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{
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.data = RT_NULL,
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.tog_sclk = ch32_tog_sclk,
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.set_sclk = ch32_set_sclk,
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.set_mosi = ch32_set_mosi,
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.set_miso = ch32_set_miso,
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.get_sclk = ch32_get_sclk,
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.get_mosi = ch32_get_mosi,
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.get_miso = ch32_get_miso,
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.dir_mosi = ch32_dir_mosi,
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.dir_miso = ch32_dir_miso,
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.udelay = ch32_udelay,
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.delay_us = 1,
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};
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static struct ch32_soft_spi spi_obj[sizeof(soft_spi_config) / sizeof(soft_spi_config[0])];
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/* Soft SPI initialization function */
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int rt_soft_spi_init(void)
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{
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rt_size_t obj_num = sizeof(spi_obj) / sizeof(struct ch32_soft_spi);
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rt_err_t result;
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for (int i = 0; i < obj_num; i++)
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{
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ch32_soft_spi_ops.data = (void *)&soft_spi_config[i];
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spi_obj[i].spi.ops = &ch32_soft_spi_ops;
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spi_obj[i].cfg = (void *)&soft_spi_config[i];
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ch32_spi_gpio_init(&spi_obj[i]);
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result = rt_spi_bit_add_bus(&spi_obj[i].spi, soft_spi_config[i].bus_name, &ch32_soft_spi_ops);
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RT_ASSERT(result == RT_EOK);
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}
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_soft_spi_init);
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2022-11-20 18:05:32 +08:00
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#endif /* BSP_USING_SOFT_SPI */
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