2021-08-23 10:13:53 +08:00
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/*
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2022-03-26 15:40:33 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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2021-08-23 10:13:53 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-23 AisinoChip the first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "board.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(RT_USING_SERIAL)
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#if defined(BSP_USING_UART1)
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#if defined(RT_SERIAL_USING_DMA)
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#if defined(BSP_UART1_RX_USING_DMA)
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#ifndef UART1_DMA_RX_CONFIG
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#define UART1_DMA_RX_CONFIG \
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{ \
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.Instance = UART1_RX_DMA_INSTANCE, \
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.dma_rcc = UART1_RX_DMA_RCC, \
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.dma_irq = UART1_RX_DMA_IRQ, \
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.channel = UART1_RX_DMA_CHANNEL, \
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.request = UART1_RX_DMA_REQUEST, \
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}
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#endif /* UART1_DMA_RX_CONFIG */
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#endif /* BSP_UART1_RX_USING_DMA */
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#if defined(BSP_UART1_TX_USING_DMA)
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#ifndef UART1_DMA_TX_CONFIG
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#define UART1_DMA_TX_CONFIG \
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{ \
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.Instance = UART1_TX_DMA_INSTANCE, \
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.dma_rcc = UART1_TX_DMA_RCC, \
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.dma_irq = UART1_TX_DMA_IRQ, \
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.channel = UART1_RX_DMA_CHANNEL, \
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.request = UART1_RX_DMA_REQUEST, \
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}
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#endif /* UART1_DMA_TX_CONFIG */
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#endif /* BSP_UART1_TX_USING_DMA */
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#endif /* RT_SERIAL_USING_DMA */
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#ifndef UART1_CONFIG
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.Instance = UART1, \
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.irq_type = UART1_IRQn, \
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.enable_id = EN_UART1, \
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.tx_port = UART1_TX_PORT, \
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.rx_port = UART1_RX_PORT, \
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.tx_pin = UART1_TX_PIN, \
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.rx_pin = UART1_RX_PIN, \
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}
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#endif /* UART1_CONFIG */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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#if defined(RT_SERIAL_USING_DMA)
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#if defined(BSP_UART2_RX_USING_DMA)
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#ifndef UART2_DMA_RX_CONFIG
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#define UART2_DMA_RX_CONFIG \
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{ \
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.Instance = UART2_RX_DMA_INSTANCE, \
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.dma_rcc = UART2_RX_DMA_RCC, \
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.dma_irq = UART2_RX_DMA_IRQ, \
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.channel = UART2_RX_DMA_CHANNEL, \
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.request = UART2_RX_DMA_REQUEST, \
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}
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#endif /* UART2_DMA_RX_CONFIG */
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#endif /* BSP_UART2_RX_USING_DMA */
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#if defined(BSP_UART2_TX_USING_DMA)
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#ifndef UART2_DMA_TX_CONFIG
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#define UART2_DMA_TX_CONFIG \
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{ \
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.Instance = UART2_TX_DMA_INSTANCE, \
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.dma_rcc = UART2_TX_DMA_RCC, \
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.dma_irq = UART2_TX_DMA_IRQ, \
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.channel = UART2_TX_DMA_CHANNEL, \
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.request = UART2_TX_DMA_REQUEST, \
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}
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#endif /* UART2_DMA_TX_CONFIG */
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#endif /* BSP_UART2_TX_USING_DMA */
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#endif /* RT_SERIAL_USING_DMA */
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#ifndef UART2_CONFIG
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#define UART2_CONFIG \
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{ \
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.name = "uart2", \
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.Instance = UART2, \
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.irq_type = UART2_IRQn, \
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.enable_id = EN_UART2, \
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.tx_port = UART2_TX_PORT, \
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.rx_port = UART2_RX_PORT, \
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.tx_pin = UART2_TX_PIN, \
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.rx_pin = UART2_RX_PIN, \
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}
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#endif /* UART2_CONFIG */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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#if defined(RT_SERIAL_USING_DMA)
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#if defined(BSP_UART3_RX_USING_DMA)
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#ifndef UART3_DMA_RX_CONFIG
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#define UART3_DMA_RX_CONFIG \
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{ \
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.Instance = UART3_RX_DMA_INSTANCE, \
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.dma_rcc = UART3_RX_DMA_RCC, \
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.dma_irq = UART3_RX_DMA_IRQ, \
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.channel = UART3_RX_DMA_CHANNEL, \
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.request = UART3_RX_DMA_REQUEST, \
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}
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#endif /* UART3_DMA_RX_CONFIG */
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#endif /* BSP_UART3_RX_USING_DMA */
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#if defined(BSP_UART3_TX_USING_DMA)
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#ifndef UART3_DMA_TX_CONFIG
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#define UART3_DMA_TX_CONFIG \
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{ \
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.Instance = UART3_TX_DMA_INSTANCE, \
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.dma_rcc = UART3_TX_DMA_RCC, \
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.dma_irq = UART3_TX_DMA_IRQ, \
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.channel = UART3_TX_DMA_CHANNEL, \
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.request = UART3_TX_DMA_REQUEST, \
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}
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#endif /* UART3_DMA_TX_CONFIG */
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#endif /* BSP_UART3_TX_USING_DMA */
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#endif /* RT_SERIAL_USING_DMA */
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#ifndef UART3_CONFIG
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#define UART3_CONFIG \
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{ \
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.name = "uart3", \
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.Instance = UART3, \
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.irq_type = UART3_IRQn, \
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.enable_id = EN_UART3, \
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.tx_port = UART3_TX_PORT, \
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.rx_port = UART3_RX_PORT, \
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.tx_pin = UART3_TX_PIN, \
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.rx_pin = UART3_RX_PIN, \
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}
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#endif /* UART3_CONFIG */
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#endif /* BSP_USING_UART3 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* RT_USING_SERIAL */
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#endif /* __UART_CONFIG_H__ */
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