2022-08-14 10:29:05 +08:00
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/*
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2022-08-17 00:43:24 +08:00
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* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
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2022-08-14 10:29:05 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-01 lik first version
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*/
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#include "drv_sdram.h"
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#ifdef BSP_USING_SDRAM
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#define DRV_DEBUG
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#define LOG_TAG "drv.sdram"
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#include <drv_log.h>
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int swm_sdram_init(void)
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{
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SDRAM_InitStructure SDRAM_InitStruct;
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PORT_Init(PORTM, PIN13, PORTM_PIN13_SDR_CLK, 0);
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PORT_Init(PORTM, PIN14, PORTM_PIN14_SDR_CKE, 0);
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PORT_Init(PORTB, PIN7, PORTB_PIN7_SDR_WE, 0);
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PORT_Init(PORTB, PIN8, PORTB_PIN8_SDR_CAS, 0);
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PORT_Init(PORTB, PIN9, PORTB_PIN9_SDR_RAS, 0);
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PORT_Init(PORTB, PIN10, PORTB_PIN10_SDR_CS, 0);
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PORT_Init(PORTE, PIN15, PORTE_PIN15_SDR_BA0, 0);
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PORT_Init(PORTE, PIN14, PORTE_PIN14_SDR_BA1, 0);
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PORT_Init(PORTN, PIN14, PORTN_PIN14_SDR_A0, 0);
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PORT_Init(PORTN, PIN13, PORTN_PIN13_SDR_A1, 0);
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PORT_Init(PORTN, PIN12, PORTN_PIN12_SDR_A2, 0);
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PORT_Init(PORTN, PIN11, PORTN_PIN11_SDR_A3, 0);
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PORT_Init(PORTN, PIN10, PORTN_PIN10_SDR_A4, 0);
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PORT_Init(PORTN, PIN9, PORTN_PIN9_SDR_A5, 0);
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PORT_Init(PORTN, PIN8, PORTN_PIN8_SDR_A6, 0);
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PORT_Init(PORTN, PIN7, PORTN_PIN7_SDR_A7, 0);
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PORT_Init(PORTN, PIN6, PORTN_PIN6_SDR_A8, 0);
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PORT_Init(PORTN, PIN3, PORTN_PIN3_SDR_A9, 0);
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PORT_Init(PORTN, PIN15, PORTN_PIN15_SDR_A10, 0);
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PORT_Init(PORTN, PIN2, PORTN_PIN2_SDR_A11, 0);
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PORT_Init(PORTM, PIN15, PORTM_PIN15_SDR_A12, 0);
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PORT_Init(PORTE, PIN7, PORTE_PIN7_SDR_D0, 1);
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PORT_Init(PORTE, PIN6, PORTE_PIN6_SDR_D1, 1);
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PORT_Init(PORTE, PIN5, PORTE_PIN5_SDR_D2, 1);
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PORT_Init(PORTE, PIN4, PORTE_PIN4_SDR_D3, 1);
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PORT_Init(PORTE, PIN3, PORTE_PIN3_SDR_D4, 1);
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PORT_Init(PORTE, PIN2, PORTE_PIN2_SDR_D5, 1);
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PORT_Init(PORTE, PIN1, PORTE_PIN1_SDR_D6, 1);
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PORT_Init(PORTE, PIN0, PORTE_PIN0_SDR_D7, 1);
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PORT_Init(PORTE, PIN8, PORTE_PIN8_SDR_D8, 1);
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PORT_Init(PORTE, PIN9, PORTE_PIN9_SDR_D9, 1);
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PORT_Init(PORTE, PIN10, PORTE_PIN10_SDR_D10, 1);
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PORT_Init(PORTE, PIN11, PORTE_PIN11_SDR_D11, 1);
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PORT_Init(PORTE, PIN12, PORTE_PIN12_SDR_D12, 1);
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PORT_Init(PORTE, PIN13, PORTE_PIN13_SDR_D13, 1);
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PORT_Init(PORTC, PIN14, PORTC_PIN14_SDR_D14, 1);
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PORT_Init(PORTC, PIN15, PORTC_PIN15_SDR_D15, 1);
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PORT_Init(PORTB, PIN6, PORTB_PIN6_SDR_LDQM, 0);
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PORT_Init(PORTM, PIN12, PORTM_PIN12_SDR_UDQM, 0);
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SDRAM_InitStruct.Size = SDRAM_SIZE_8MB;
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SDRAM_InitStruct.ClkDiv = SDRAM_CLKDIV_1;
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SDRAM_InitStruct.CASLatency = SDRAM_CASLATENCY_3;
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SDRAM_InitStruct.TimeTRP = SDRAM_TRP_2;
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SDRAM_InitStruct.TimeTRCD = SDRAM_TRCD_2;
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SDRAM_InitStruct.TimeTRFC = SDRAM_TRFC_9;
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SDRAM_Init(&SDRAM_InitStruct);
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return 0;
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}
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#endif /* BSP_USING_SDRAM */
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