2023-01-07 15:03:21 +08:00
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/*
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2023-01-08 15:26:31 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2023-01-07 15:03:21 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022/12/25 flyingcys first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_uart.h"
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struct device_uart
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{
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struct rt_serial_device serial;
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uint8_t port;
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uint8_t tx_pin;
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uint8_t rx_pin;
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};
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static void _uart_rx_irq(void *param)
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{
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struct device_uart *uart = (struct device_uart *)param;;
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struct rt_serial_device *serial = &uart->serial;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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static int uart_signal_get(uint8_t pin)
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{
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//TODO no magic number is allowed here
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if (pin >= 12 && pin <=23) {
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return (pin + 6) % 12;
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} else if (pin >= 36 && pin <=45) {
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return (pin + 6) % 12;
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}
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return (pin % 12);
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}
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static int uart_func_get(uint8_t id, GLB_UART_SIG_FUN_Type uartfunc)
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{
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switch (id) {
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case 0:
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return uartfunc;
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case 1:
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return (GLB_UART_SIG_FUN_UART1_RTS - GLB_UART_SIG_FUN_UART0_RTS) * 1 + uartfunc;
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case 2:
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return (GLB_UART_SIG_FUN_UART1_RTS - GLB_UART_SIG_FUN_UART0_RTS) * 1 + uartfunc;
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default:
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/*empty here*/
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//TODO should assert here?
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return uartfunc;
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}
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}
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static void uart_gpio_demo(uint8_t id, uint8_t tx_pin, uint8_t rx_pin, uint8_t cts_pin, uint8_t rts_pin)
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{
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GLB_GPIO_Cfg_Type gpio_cfg;
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uint8_t uart_func, uart_sig;
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//FIXME SWAP set is NOT put here
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GLB_UART_Sig_Swap_Set(GLB_UART_SIG_SWAP_GRP_GPIO12_GPIO23, 1);
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GLB_UART_Sig_Swap_Set(GLB_UART_SIG_SWAP_GRP_GPIO36_GPIO45, 1);
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//common GPIO cfg
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gpio_cfg.drive = 0;
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gpio_cfg.smtCtrl = 1;
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gpio_cfg.gpioMode = GPIO_MODE_AF;
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gpio_cfg.pullType = GPIO_PULL_UP;
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gpio_cfg.gpioFun = GPIO_FUN_UART;
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//cfg for UART Tx
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gpio_cfg.gpioPin = GLB_GPIO_PIN_0 + tx_pin;
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uart_func = uart_func_get(id, GLB_UART_SIG_FUN_UART0_TXD);
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uart_sig = uart_signal_get(gpio_cfg.gpioPin);
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GLB_UART_Fun_Sel((GLB_UART_SIG_Type)uart_sig, (GLB_UART_SIG_FUN_Type)uart_func);
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GLB_UART_Fun_Sel((GLB_UART_SIG_Type)uart_func, (GLB_UART_SIG_FUN_Type)uart_sig);
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GLB_GPIO_Init(&gpio_cfg);
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//cfg for UART Rx
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gpio_cfg.gpioPin = GLB_GPIO_PIN_0 + rx_pin;
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uart_func = uart_func_get(id, GLB_UART_SIG_FUN_UART0_RXD);
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uart_sig = uart_signal_get(gpio_cfg.gpioPin);
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GLB_UART_Fun_Sel((GLB_UART_SIG_Type)uart_sig, (GLB_UART_SIG_FUN_Type)uart_func);
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GLB_UART_Fun_Sel((GLB_UART_SIG_Type)uart_func, (GLB_UART_SIG_FUN_Type)uart_sig);
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GLB_GPIO_Init(&gpio_cfg);
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//Enable UART clock
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GLB_Set_UART_CLK(1, 0, 0);
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}
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static rt_err_t _uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct device_uart *uart;
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uint8_t id;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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id = uart->port;
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UART_CFG_Type uart_cfg = {
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80*1000*1000, /*UART clock from XTAL*/
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2000000, /* baudrate */
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UART_DATABITS_8, /* data bits */
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UART_STOPBITS_1, /* stop bits */
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UART_PARITY_NONE, /* parity */
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DISABLE, /* Disable auto flow control */
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DISABLE, /* Disable rx input de-glitch function */
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DISABLE, /* Disable RTS output SW control mode */
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DISABLE, /* Disable tx output SW control mode */
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DISABLE, /* Disable tx lin mode */
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DISABLE, /* Disable rx lin mode */
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0, /* Tx break bit count for lin mode */
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UART_LSB_FIRST, /* UART each data byte is send out LSB-first */
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};
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UART_FifoCfg_Type fifoCfg = {
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16, /* TX FIFO threshold */
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16, /* RX FIFO threshold */
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DISABLE, /* Disable tx dma req/ack interface */
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DISABLE /* Disable rx dma req/ack interface */
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};
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/* init debug uart gpio first */
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uart_gpio_demo(id, uart->tx_pin, uart->rx_pin, 0xff, 0xff);
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/* disable all interrupt */
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UART_IntMask(id, UART_INT_ALL, MASK);
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/* disable uart before config */
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UART_Disable(id, UART_TXRX);
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uart_cfg.baudRate = cfg->baud_rate;
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switch (cfg->data_bits)
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{
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case DATA_BITS_5:
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uart_cfg.dataBits = UART_DATABITS_5;
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break;
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case DATA_BITS_6:
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uart_cfg.dataBits = UART_DATABITS_6;
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break;
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case DATA_BITS_7:
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uart_cfg.dataBits = UART_DATABITS_7;
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break;
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case DATA_BITS_8:
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uart_cfg.dataBits = UART_DATABITS_8;
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break;
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default:
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uart_cfg.dataBits = UART_DATABITS_8;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1:
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uart_cfg.stopBits = UART_STOPBITS_1;
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break;
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2023-01-08 15:26:31 +08:00
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2023-01-07 15:03:21 +08:00
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case STOP_BITS_2:
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uart_cfg.stopBits = UART_STOPBITS_2;
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break;
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default:
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uart_cfg.stopBits = UART_STOPBITS_1;
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_NONE:
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uart_cfg.parity = UART_PARITY_NONE;
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break;
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case PARITY_ODD:
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uart_cfg.parity = UART_PARITY_ODD;
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break;
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case PARITY_EVEN:
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uart_cfg.parity = UART_PARITY_EVEN;
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break;
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default:
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uart_cfg.parity = UART_PARITY_NONE;
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break;
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}
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/* uart init with configuration */
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UART_Init(id, &uart_cfg);
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/* UART fifo configuration */
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UART_FifoConfig(id, &fifoCfg);
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/* Enable tx free run mode */
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UART_TxFreeRun(id, ENABLE);
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/* Set rx time-out value */
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UART_SetRxTimeoutValue(id, UART_DEFAULT_RTO_TIMEOUT);
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/* enable uart */
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UART_AutoBaudDetection(id, 0);
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2023-01-08 15:26:31 +08:00
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UART_Enable(id, UART_TXRX);
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2023-01-07 15:03:21 +08:00
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return RT_EOK;
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}
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static rt_err_t _uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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switch (cmd)
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{
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/* disable interrupt */
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case RT_DEVICE_CTRL_CLR_INT:
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2023-01-08 15:26:31 +08:00
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bl_uart_int_disable(uart->port);
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2023-01-07 15:03:21 +08:00
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bl_uart_int_rx_notify_unregister(uart->port, _uart_rx_irq, uart);
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break;
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/* enable interrupt */
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case RT_DEVICE_CTRL_SET_INT:
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bl_uart_int_rx_notify_register(uart->port, _uart_rx_irq, uart);
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bl_uart_int_enable(uart->port);
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break;
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}
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return RT_EOK;
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}
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static int _uart_putc(struct rt_serial_device *serial, char c)
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{
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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bl_uart_data_send(uart->port, c);
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return 1;
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}
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static int _uart_getc(struct rt_serial_device *serial)
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{
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int ch = -1;
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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ch = bl_uart_data_recv(uart->port);
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return ch;
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}
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static const struct rt_uart_ops _uart_ops =
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{
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.configure = _uart_configure,
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.control = _uart_control,
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.putc = _uart_putc,
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.getc = _uart_getc,
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.dma_transmit = RT_NULL
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};
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/*
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* UART Initiation
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*/
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int rt_hw_uart_init(void)
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{
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rt_err_t result = 0;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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struct rt_serial_device *serial;
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struct device_uart *uart;
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#ifdef BSP_USING_UART0
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static struct device_uart uart0;
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serial = &uart0.serial;
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uart = &uart0;
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serial->ops = &_uart_ops;
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serial->config = config;
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serial->config.baud_rate = 2000000;
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uart->port = 0;
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uart->tx_pin = BSP_UART0_TXD_PIN;
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uart->rx_pin = BSP_UART0_RXD_PIN;
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/* register USART device */
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result = rt_hw_serial_register(serial,
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"uart0",
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2023-01-08 15:26:31 +08:00
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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2023-01-07 15:03:21 +08:00
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uart);
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RT_ASSERT(result == RT_EOK);
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#endif
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return 0;
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2023-01-08 15:26:31 +08:00
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}
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