2022-05-19 14:06:35 +08:00
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/*
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2022-08-13 15:22:12 +08:00
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* Copyright 2017-2022 NXP
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2022-05-19 14:06:35 +08:00
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_QTMR_H_
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#define _FSL_QTMR_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup qtmr
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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2022-08-13 15:22:12 +08:00
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#define FSL_QTMR_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) /*!< Version */
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2022-05-19 14:06:35 +08:00
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/*@}*/
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/*! @brief Quad Timer primary clock source selection*/
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typedef enum _qtmr_primary_count_source
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{
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kQTMR_ClockCounter0InputPin = 0, /*!< Use counter 0 input pin */
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kQTMR_ClockCounter1InputPin, /*!< Use counter 1 input pin */
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kQTMR_ClockCounter2InputPin, /*!< Use counter 2 input pin */
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kQTMR_ClockCounter3InputPin, /*!< Use counter 3 input pin */
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kQTMR_ClockCounter0Output, /*!< Use counter 0 output */
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kQTMR_ClockCounter1Output, /*!< Use counter 1 output */
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kQTMR_ClockCounter2Output, /*!< Use counter 2 output */
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kQTMR_ClockCounter3Output, /*!< Use counter 3 output */
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kQTMR_ClockDivide_1, /*!< IP bus clock divide by 1 prescaler */
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kQTMR_ClockDivide_2, /*!< IP bus clock divide by 2 prescaler */
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kQTMR_ClockDivide_4, /*!< IP bus clock divide by 4 prescaler */
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kQTMR_ClockDivide_8, /*!< IP bus clock divide by 8 prescaler */
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kQTMR_ClockDivide_16, /*!< IP bus clock divide by 16 prescaler */
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kQTMR_ClockDivide_32, /*!< IP bus clock divide by 32 prescaler */
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kQTMR_ClockDivide_64, /*!< IP bus clock divide by 64 prescaler */
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kQTMR_ClockDivide_128 /*!< IP bus clock divide by 128 prescaler */
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} qtmr_primary_count_source_t;
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/*! @brief Quad Timer input sources selection*/
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typedef enum _qtmr_input_source
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{
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kQTMR_Counter0InputPin = 0, /*!< Use counter 0 input pin */
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kQTMR_Counter1InputPin, /*!< Use counter 1 input pin */
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kQTMR_Counter2InputPin, /*!< Use counter 2 input pin */
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kQTMR_Counter3InputPin /*!< Use counter 3 input pin */
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} qtmr_input_source_t;
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/*! @brief Quad Timer counting mode selection */
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typedef enum _qtmr_counting_mode
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{
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kQTMR_NoOperation = 0, /*!< No operation */
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kQTMR_PriSrcRiseEdge, /*!< Count rising edges of primary source */
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kQTMR_PriSrcRiseAndFallEdge, /*!< Count rising and falling edges of primary source */
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kQTMR_PriSrcRiseEdgeSecInpHigh, /*!< Count rise edges of pri SRC while sec inp high active */
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kQTMR_QuadCountMode, /*!< Quadrature count mode, uses pri and sec sources */
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kQTMR_PriSrcRiseEdgeSecDir, /*!< Count rising edges of pri SRC; sec SRC specifies dir */
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kQTMR_SecSrcTrigPriCnt, /*!< Edge of sec SRC trigger primary count until compare*/
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kQTMR_CascadeCount /*!< Cascaded count mode (up/down) */
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} qtmr_counting_mode_t;
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/*! @brief Quad Timer output mode selection*/
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typedef enum _qtmr_output_mode
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{
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kQTMR_AssertWhenCountActive = 0, /*!< Assert OFLAG while counter is active*/
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kQTMR_ClearOnCompare, /*!< Clear OFLAG on successful compare */
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kQTMR_SetOnCompare, /*!< Set OFLAG on successful compare */
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kQTMR_ToggleOnCompare, /*!< Toggle OFLAG on successful compare */
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kQTMR_ToggleOnAltCompareReg, /*!< Toggle OFLAG using alternating compare registers */
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kQTMR_SetOnCompareClearOnSecSrcInp, /*!< Set OFLAG on compare, clear on sec SRC input edge */
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kQTMR_SetOnCompareClearOnCountRoll, /*!< Set OFLAG on compare, clear on counter rollover */
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kQTMR_EnableGateClock /*!< Enable gated clock output while count is active */
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} qtmr_output_mode_t;
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/*! @brief Quad Timer input capture edge mode, rising edge, or falling edge */
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typedef enum _qtmr_input_capture_edge
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{
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kQTMR_NoCapture = 0, /*!< Capture is disabled */
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kQTMR_RisingEdge, /*!< Capture on rising edge (IPS=0) or falling edge (IPS=1)*/
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kQTMR_FallingEdge, /*!< Capture on falling edge (IPS=0) or rising edge (IPS=1)*/
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kQTMR_RisingAndFallingEdge /*!< Capture on both edges */
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} qtmr_input_capture_edge_t;
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/*! @brief Quad Timer input capture edge mode, rising edge, or falling edge */
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typedef enum _qtmr_preload_control
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{
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kQTMR_NoPreload = 0, /*!< Never preload */
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kQTMR_LoadOnComp1, /*!< Load upon successful compare with value in COMP1 */
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kQTMR_LoadOnComp2 /*!< Load upon successful compare with value in COMP2*/
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} qtmr_preload_control_t;
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/*! @brief List of Quad Timer run options when in Debug mode */
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typedef enum _qtmr_debug_action
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{
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kQTMR_RunNormalInDebug = 0U, /*!< Continue with normal operation */
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kQTMR_HaltCounter, /*!< Halt counter */
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kQTMR_ForceOutToZero, /*!< Force output to logic 0 */
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kQTMR_HaltCountForceOutZero /*!< Halt counter and force output to logic 0 */
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} qtmr_debug_action_t;
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/*! @brief List of Quad Timer interrupts */
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// typedef enum _qtmr_interrupt_enable
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typedef enum _qtmr_interrupt_enable
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{
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kQTMR_CompareInterruptEnable = (1U << 0), /*!< Compare interrupt.*/
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kQTMR_Compare1InterruptEnable = (1U << 1), /*!< Compare 1 interrupt.*/
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kQTMR_Compare2InterruptEnable = (1U << 2), /*!< Compare 2 interrupt.*/
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kQTMR_OverflowInterruptEnable = (1U << 3), /*!< Timer overflow interrupt.*/
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kQTMR_EdgeInterruptEnable = (1U << 4) /*!< Input edge interrupt.*/
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} qtmr_interrupt_enable_t;
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/*! @brief List of Quad Timer flags */
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typedef enum _qtmr_status_flags
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{
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kQTMR_CompareFlag = (1U << 0), /*!< Compare flag */
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kQTMR_Compare1Flag = (1U << 1), /*!< Compare 1 flag */
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kQTMR_Compare2Flag = (1U << 2), /*!< Compare 2 flag */
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kQTMR_OverflowFlag = (1U << 3), /*!< Timer overflow flag */
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kQTMR_EdgeFlag = (1U << 4) /*!< Input edge flag */
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} qtmr_status_flags_t;
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/*! @brief List of channel selection */
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typedef enum _qtmr_channel_selection
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{
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kQTMR_Channel_0 = 0U, /*!< TMR Channel 0 */
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kQTMR_Channel_1, /*!< TMR Channel 1 */
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kQTMR_Channel_2, /*!< TMR Channel 2 */
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kQTMR_Channel_3, /*!< TMR Channel 3 */
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} qtmr_channel_selection_t;
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/*! @brief List of Quad Timer DMA enable */
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typedef enum _qtmr_dma_enable
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{
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kQTMR_InputEdgeFlagDmaEnable = (1U << 0), /*!< Input Edge Flag DMA Enable.*/
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kQTMR_ComparatorPreload1DmaEnable = (1U << 1), /*!< Comparator Preload Register 1 DMA Enable.*/
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kQTMR_ComparatorPreload2DmaEnable = (1U << 2), /*!< Comparator Preload Register 2 DMA Enable.*/
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} qtmr_dma_enable_t;
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/*!
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* @brief Quad Timer config structure
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*
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* This structure holds the configuration settings for the Quad Timer peripheral. To initialize this
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* structure to reasonable defaults, call the QTMR_GetDefaultConfig() function and pass a
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* pointer to your config structure instance.
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*
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* The config struct can be made const so it resides in flash
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*/
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typedef struct _qtmr_config
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{
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qtmr_primary_count_source_t primarySource; /*!< Specify the primary count source */
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qtmr_input_source_t secondarySource; /*!< Specify the secondary count source */
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bool enableMasterMode; /*!< true: Broadcast compare function output to other counters;
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false no broadcast */
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bool enableExternalForce; /*!< true: Compare from another counter force state of OFLAG signal
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false: OFLAG controlled by local counter */
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uint8_t faultFilterCount; /*!< Fault filter count */
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uint8_t faultFilterPeriod; /*!< Fault filter period;value of 0 will bypass the filter */
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qtmr_debug_action_t debugMode; /*!< Operation in Debug mode */
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} qtmr_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the Quad Timer clock and configures the peripheral for basic operation.
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*
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* @note This API should be called at the beginning of the application using the Quad Timer driver.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param config Pointer to user's Quad Timer config structure
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*/
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void QTMR_Init(TMR_Type *base, qtmr_channel_selection_t channel, const qtmr_config_t *config);
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/*!
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* @brief Stops the counter and gates the Quad Timer clock
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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*/
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void QTMR_Deinit(TMR_Type *base, qtmr_channel_selection_t channel);
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/*!
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* @brief Fill in the Quad Timer config struct with the default settings
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*
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* The default values are:
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* @code
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* config->debugMode = kQTMR_RunNormalInDebug;
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* config->enableExternalForce = false;
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* config->enableMasterMode = false;
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* config->faultFilterCount = 0;
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* config->faultFilterPeriod = 0;
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* config->primarySource = kQTMR_ClockDivide_2;
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* config->secondarySource = kQTMR_Counter0InputPin;
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* @endcode
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* @param config Pointer to user's Quad Timer config structure.
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*/
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void QTMR_GetDefaultConfig(qtmr_config_t *config);
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/*! @}*/
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/*!
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* @brief Sets up Quad timer module for PWM signal output.
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*
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* The function initializes the timer module according to the parameters passed in by the user. The
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* function also sets up the value compare registers to match the PWM signal requirements.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param pwmFreqHz PWM signal frequency in Hz
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* @param dutyCyclePercent PWM pulse width, value should be between 0 to 100
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* 0=inactive signal(0% duty cycle)...
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* 100=active signal (100% duty cycle)
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* @param outputPolarity true: invert polarity of the output signal, false: no inversion
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* @param srcClock_Hz Main counter clock in Hz.
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*
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* @return Returns an error if there was error setting up the signal.
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*/
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status_t QTMR_SetupPwm(TMR_Type *base,
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qtmr_channel_selection_t channel,
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uint32_t pwmFreqHz,
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uint8_t dutyCyclePercent,
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bool outputPolarity,
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uint32_t srcClock_Hz);
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/*!
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* @brief Allows the user to count the source clock cycles until a capture event arrives.
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*
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* The count is stored in the capture register.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param capturePin Pin through which we receive the input signal to trigger the capture
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* @param inputPolarity true: invert polarity of the input signal, false: no inversion
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* @param reloadOnCapture true: reload the counter when an input capture occurs, false: no reload
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* @param captureMode Specifies which edge of the input signal triggers a capture
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*/
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void QTMR_SetupInputCapture(TMR_Type *base,
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qtmr_channel_selection_t channel,
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qtmr_input_source_t capturePin,
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bool inputPolarity,
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bool reloadOnCapture,
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qtmr_input_capture_edge_t captureMode);
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/*!
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* @name Interrupt Interface
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* @{
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*/
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/*!
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* @brief Enables the selected Quad Timer interrupts
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::qtmr_interrupt_enable_t
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*/
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void QTMR_EnableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
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/*!
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* @brief Disables the selected Quad Timer interrupts
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*
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* @param base Quad Timer peripheral base addres
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* @param channel Quad Timer channel number
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::qtmr_interrupt_enable_t
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*/
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void QTMR_DisableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
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/*!
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* @brief Gets the enabled Quad Timer interrupts
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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*
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* @return The enabled interrupts. This is the logical OR of members of the
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* enumeration ::qtmr_interrupt_enable_t
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*/
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uint32_t QTMR_GetEnabledInterrupts(TMR_Type *base, qtmr_channel_selection_t channel);
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/*! @}*/
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/*!
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* @name Status Interface
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* @{
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*/
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/*!
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* @brief Gets the Quad Timer status flags
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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*
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* @return The status flags. This is the logical OR of members of the
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* enumeration ::qtmr_status_flags_t
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*/
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uint32_t QTMR_GetStatus(TMR_Type *base, qtmr_channel_selection_t channel);
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/*!
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* @brief Clears the Quad Timer status flags.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param mask The status flags to clear. This is a logical OR of members of the
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* enumeration ::qtmr_status_flags_t
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*/
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void QTMR_ClearStatusFlags(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
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/*! @}*/
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/*!
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* @name Read and Write the timer period
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* @{
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*/
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/*!
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* @brief Sets the timer period in ticks.
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*
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* Timers counts from initial value till it equals the count value set here. The counter
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* will then reinitialize to the value specified in the Load register.
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*
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* @note
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* 1. This function will write the time period in ticks to COMP1 or COMP2 register
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* depending on the count direction
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* 2. User can call the utility macros provided in fsl_common.h to convert to ticks
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* 3. This function supports cases, providing only primary source clock without secondary source clock.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param ticks Timer period in units of ticks
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*/
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void QTMR_SetTimerPeriod(TMR_Type *base, qtmr_channel_selection_t channel, uint16_t ticks);
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2022-08-13 15:22:12 +08:00
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/*!
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* @brief Set compare value.
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*
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* This function sets the value used for comparison with the counter value.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param ticks Timer period in units of ticks.
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*/
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void QTMR_SetCompareValue(TMR_Type *base, qtmr_channel_selection_t channel, uint16_t ticks);
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/*!
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* @brief Set load value.
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*
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* This function sets the value used to initialize the counter after a counter comparison.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param value Load register initialization value.
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*/
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static inline void QTMR_SetLoadValue(TMR_Type *base, qtmr_channel_selection_t channel, uint16_t value)
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{
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base->CHANNEL[channel].LOAD &= (uint16_t)(~TMR_LOAD_LOAD_MASK);
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base->CHANNEL[channel].LOAD = value;
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}
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2022-05-19 14:06:35 +08:00
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/*!
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* @brief Reads the current timer counting value.
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*
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* This function returns the real-time timer counting value, in a range from 0 to a
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* timer period.
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*
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* @note User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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*
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* @return Current counter value in ticks
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*/
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static inline uint16_t QTMR_GetCurrentTimerCount(TMR_Type *base, qtmr_channel_selection_t channel)
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{
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return base->CHANNEL[channel].CNTR;
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}
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/*! @}*/
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/*!
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* @name Timer Start and Stop
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* @{
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*/
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/*!
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* @brief Starts the Quad Timer counter.
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*
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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* @param clockSource Quad Timer clock source
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*/
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static inline void QTMR_StartTimer(TMR_Type *base, qtmr_channel_selection_t channel, qtmr_counting_mode_t clockSource)
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{
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uint16_t reg = base->CHANNEL[channel].CTRL;
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reg &= (uint16_t)(~(TMR_CTRL_CM_MASK));
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reg |= TMR_CTRL_CM(clockSource);
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base->CHANNEL[channel].CTRL = reg;
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}
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/*!
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|
* @brief Stops the Quad Timer counter.
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*
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* @param base Quad Timer peripheral base address
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* @param channel Quad Timer channel number
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*/
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static inline void QTMR_StopTimer(TMR_Type *base, qtmr_channel_selection_t channel)
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|
{
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|
base->CHANNEL[channel].CTRL &= (uint16_t)(~TMR_CTRL_CM_MASK);
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}
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|
/*! @}*/
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/*!
|
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|
* @name Enable and Disable the Quad Timer DMA
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* @{
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*/
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|
|
/*!
|
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|
|
* @brief Enable the Quad Timer DMA.
|
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|
*
|
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|
|
* @param base Quad Timer peripheral base address
|
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|
|
* @param channel Quad Timer channel number
|
|
|
|
* @param mask The DMA to enable. This is a logical OR of members of the
|
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|
|
* enumeration ::qtmr_dma_enable_t
|
|
|
|
*/
|
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|
|
void QTMR_EnableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
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|
|
|
/*!
|
|
|
|
* @brief Disable the Quad Timer DMA.
|
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|
|
*
|
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|
|
* @param base Quad Timer peripheral base address
|
|
|
|
* @param channel Quad Timer channel number
|
|
|
|
* @param mask The DMA to enable. This is a logical OR of members of the
|
|
|
|
* enumeration ::qtmr_dma_enable_t
|
|
|
|
*/
|
|
|
|
void QTMR_DisableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
|
|
|
|
|
|
|
|
/*! @}*/
|
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|
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|
|
#if defined(__cplusplus)
|
|
|
|
}
|
|
|
|
#endif
|
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|
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|
|
/*! @}*/
|
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|
#endif /* _FSL_QTMR_H_ */
|