121 lines
5.6 KiB
C
121 lines
5.6 KiB
C
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/*!
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\file gd32e230_crc.h
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\brief definitions for the CRC
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\version 2018-06-19, V1.0.0, firmware for GD32E230
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*/
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/*
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Copyright (c) 2018, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32E230_CRC_H
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#define GD32E230_CRC_H
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#include "gd32e230.h"
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/* CRC definitions */
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#define CRC CRC_BASE
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/* registers definitions */
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#define CRC_DATA REG32((CRC) + 0x00U) /*!< CRC data register */
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#define CRC_FDATA REG32((CRC) + 0x04U) /*!< CRC free data register */
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#define CRC_CTL REG32((CRC) + 0x08U) /*!< CRC control register */
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#define CRC_IDATA REG32((CRC) + 0x10U) /*!< CRC initialization data register */
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#define CRC_POLY REG32((CRC) + 0x14U) /*!< CRC polynomial register */
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/* bits definitions */
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/* CRC_DATA */
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#define CRC_DATA_DATA BITS(0,31) /*!< CRC data bits */
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/* CRC_FDATA */
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#define CRC_FDATA_FDATA BITS(0,7) /*!< CRC free data bits */
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/* CRC_CTL */
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#define CRC_CTL_RST BIT(0) /*!< CRC reset bit */
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#define CRC_CTL_PS BITS(3,4) /*!< size of polynomial function bits */
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#define CRC_CTL_REV_I BITS(5,6) /*!< input data reverse function bits */
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#define CRC_CTL_REV_O BIT(7) /*!< output data reverse function bit */
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/* CRC_INIT */
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#define CRC_IDATA_IDATA BITS(0,31) /*!< CRC initialization data bits */
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/* CRC_POLY */
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#define CRC_POLY_POLY BITS(0,31) /*!< CRC polynomial value bits */
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/* constants definitions */
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/* size of polynomial function */
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#define CTL_PS(regval) (BITS(3, 4) & ((regval) << 3))
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#define CRC_CTL_PS_32 CTL_PS(0) /*!< 32-bit polynomial for CRC calculation */
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#define CRC_CTL_PS_16 CTL_PS(1) /*!< 16-bit polynomial for CRC calculation */
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#define CRC_CTL_PS_8 CTL_PS(2) /*!< 8-bit polynomial for CRC calculation */
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#define CRC_CTL_PS_7 CTL_PS(3) /*!< 7-bit polynomial for CRC calculation */
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/* input data reverse function */
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#define CTL_REV_I(regval) (BITS(5, 6) & ((regval) << 5))
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#define CRC_INPUT_DATA_NOT CTL_REV_I(0) /*!< input data not reverse */
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#define CRC_INPUT_DATA_BYTE CTL_REV_I(1) /*!< input data reversed by byte type */
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#define CRC_INPUT_DATA_HALFWORD CTL_REV_I(2) /*!< input data reversed by half-word type */
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#define CRC_INPUT_DATA_WORD CTL_REV_I(3) /*!< input data reversed by word type */
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/* function declarations */
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/* deinit CRC calculation unit */
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void crc_deinit(void);
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/* enable the reverse operation of output data */
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void crc_reverse_output_data_enable(void);
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/* disable the reverse operation of output data */
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void crc_reverse_output_data_disable(void);
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/* reset data register to the value of initializaiton data register */
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void crc_data_register_reset(void);
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/* read the data register */
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uint32_t crc_data_register_read(void);
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/* read the free data register */
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uint8_t crc_free_data_register_read(void);
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/* write the free data register */
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void crc_free_data_register_write(uint8_t free_data);
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/* write the initial value register */
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void crc_init_data_register_write(uint32_t init_data);
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/* configure the CRC input data function */
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void crc_input_data_reverse_config(uint32_t data_reverse);
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/* configure the CRC size of polynomial function */
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void crc_polynomial_size_set(uint32_t poly_size);
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/* configure the CRC polynomial value function */
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void crc_polynomial_set(uint32_t poly);
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/* CRC calculate a 32-bit data */
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uint32_t crc_single_data_calculate(uint32_t sdata);
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/* CRC calculate a 32-bit data array */
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uint32_t crc_block_data_calculate(uint32_t array[], uint32_t size);
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#endif /* GD32E230_CRC_H */
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