2021-05-17 16:23:41 +08:00
|
|
|
/**************************************************************************//**
|
|
|
|
|
*
|
|
|
|
|
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
|
|
|
|
|
*
|
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
*
|
|
|
|
|
* Change Logs:
|
|
|
|
|
* Date Author Notes
|
|
|
|
|
* 2020-9-1 Philo First version
|
|
|
|
|
*
|
|
|
|
|
******************************************************************************/
|
|
|
|
|
|
|
|
|
|
#ifndef __BOARD_H__
|
|
|
|
|
#define __BOARD_H__
|
|
|
|
|
|
|
|
|
|
// <o> Internal SRAM memory size[Kbytes] <8-64>
|
|
|
|
|
#define SRAM_SIZE (96)
|
|
|
|
|
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
|
|
|
|
|
|
2021-12-30 03:14:07 +08:00
|
|
|
#if defined(__ARMCC_VERSION)
|
2021-05-17 16:23:41 +08:00
|
|
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
|
|
|
|
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
|
|
|
|
#elif __ICCARM__
|
|
|
|
|
#pragma section="CSTACK"
|
|
|
|
|
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
|
|
|
|
#else
|
|
|
|
|
extern int __bss_end;
|
|
|
|
|
#define HEAP_BEGIN ((void *)&__bss_end)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#define HEAP_END (void *)SRAM_END
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void rt_hw_board_init(void);
|
|
|
|
|
void rt_hw_cpu_reset(void);
|
|
|
|
|
|
|
|
|
|
#endif /* BOARD_H_ */
|
