2017-08-22 15:52:57 +08:00
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/*!
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2021-06-09 16:24:20 +08:00
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\file gd32f4xx_ipa.c
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\brief IPA driver
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\version 2016-08-15, V1.0.0, firmware for GD32F4xx
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\version 2018-12-12, V2.0.0, firmware for GD32F4xx
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\version 2020-09-30, V2.1.0, firmware for GD32F4xx
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2017-08-22 15:52:57 +08:00
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*/
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/*
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2021-06-09 16:24:20 +08:00
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Copyright (c) 2020, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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2017-08-22 15:52:57 +08:00
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2021-06-09 16:24:20 +08:00
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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2017-08-22 15:52:57 +08:00
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*/
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#include "gd32f4xx_ipa.h"
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2021-06-09 16:24:20 +08:00
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#define IPA_DEFAULT_VALUE 0x00000000U
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2017-08-22 15:52:57 +08:00
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/*!
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2021-06-09 16:24:20 +08:00
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\brief deinitialize IPA registers
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2017-08-22 15:52:57 +08:00
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ipa_deinit(void)
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{
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2021-06-09 16:24:20 +08:00
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rcu_periph_reset_enable(RCU_IPARST);
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rcu_periph_reset_disable(RCU_IPARST);
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2017-08-22 15:52:57 +08:00
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief enable IPA transfer
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2017-08-22 15:52:57 +08:00
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ipa_transfer_enable(void)
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{
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IPA_CTL |= IPA_CTL_TEN;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief enable IPA transfer hang up
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_transfer_hangup_enable(void)
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{
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IPA_CTL |= IPA_CTL_THU;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief disable IPA transfer hang up
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_transfer_hangup_disable(void)
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{
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IPA_CTL &= ~(IPA_CTL_THU);
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief enable IPA transfer stop
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_transfer_stop_enable(void)
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{
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IPA_CTL |= IPA_CTL_TST;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief disable IPA transfer stop
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_transfer_stop_disable(void)
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{
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IPA_CTL &= ~(IPA_CTL_TST);
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief enable IPA foreground LUT loading
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_foreground_lut_loading_enable(void)
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{
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IPA_FPCTL |= IPA_FPCTL_FLLEN;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief enable IPA background LUT loading
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\param[in] none
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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void ipa_background_lut_loading_enable(void)
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{
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IPA_BPCTL |= IPA_BPCTL_BLLEN;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief set pixel format convert mode, the function is invalid when the IPA transfer is enabled
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\param[in] pfcm: pixel format convert mode
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only one parameter can be selected which is shown as below:
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\arg IPA_FGTODE: foreground memory to destination memory without pixel format convert
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\arg IPA_FGTODE_PF_CONVERT: foreground memory to destination memory with pixel format convert
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\arg IPA_FGBGTODE: blending foreground and background memory to destination memory
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\arg IPA_FILL_UP_DE: fill up destination memory with specific color
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2017-08-22 15:52:57 +08:00
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\param[out] none
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\retval none
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*/
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2021-06-09 16:24:20 +08:00
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void ipa_pixel_format_convert_mode_set(uint32_t pfcm)
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2017-08-22 15:52:57 +08:00
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{
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IPA_CTL |= pfcm;
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief initialize the structure of IPA foreground parameter struct with the default values, it is
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suggested that call this function after an ipa_foreground_parameter_struct structure is defined
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\param[in] none
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\param[out] foreground_struct: the data needed to initialize foreground
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foreground_memaddr: foreground memory base address
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foreground_lineoff: foreground line offset
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foreground_prealpha: foreground pre-defined alpha value
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foreground_alpha_algorithm: IPA_FG_ALPHA_MODE_0,IPA_FG_ALPHA_MODE_1,IPA_FG_ALPHA_MODE_2
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foreground_pf: foreground pixel format(FOREGROUND_PPF_ARGB8888,FOREGROUND_PPF_RGB888,FOREGROUND_PPF_RGB565,
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FOREGROUND_PPF_ARG1555,FOREGROUND_PPF_ARGB4444,FOREGROUND_PPF_L8,FOREGROUND_PPF_AL44,
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FOREGROUND_PPF_AL88,FOREGROUND_PPF_L4,FOREGROUND_PPF_A8,FOREGROUND_PPF_A4)
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foreground_prered: foreground pre-defined red value
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foreground_pregreen: foreground pre-defined green value
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foreground_preblue: foreground pre-defined blue value
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\retval none
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*/
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void ipa_foreground_struct_para_init(ipa_foreground_parameter_struct* foreground_struct)
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{
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/* initialize the struct parameters with default values */
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foreground_struct->foreground_memaddr = IPA_DEFAULT_VALUE;
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foreground_struct->foreground_lineoff = IPA_DEFAULT_VALUE;
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foreground_struct->foreground_prealpha = IPA_DEFAULT_VALUE;
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foreground_struct->foreground_alpha_algorithm = IPA_FG_ALPHA_MODE_0;
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foreground_struct->foreground_pf = FOREGROUND_PPF_ARGB8888;
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foreground_struct->foreground_prered = IPA_DEFAULT_VALUE;
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foreground_struct->foreground_pregreen = IPA_DEFAULT_VALUE;
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foreground_struct->foreground_preblue = IPA_DEFAULT_VALUE;
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}
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/*!
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\brief initialize foreground parameters
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\param[in] foreground_struct: the data needed to initialize foreground
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2017-08-22 15:52:57 +08:00
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foreground_memaddr: foreground memory base address
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foreground_lineoff: foreground line offset
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2021-06-09 16:24:20 +08:00
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foreground_prealpha: foreground pre-defined alpha value
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2017-08-22 15:52:57 +08:00
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foreground_alpha_algorithm: IPA_FG_ALPHA_MODE_0,IPA_FG_ALPHA_MODE_1,IPA_FG_ALPHA_MODE_2
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2021-06-09 16:24:20 +08:00
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foreground_pf: foreground pixel format(FOREGROUND_PPF_ARGB8888,FOREGROUND_PPF_RGB888,FOREGROUND_PPF_RGB565,
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FOREGROUND_PPF_ARG1555,FOREGROUND_PPF_ARGB4444,FOREGROUND_PPF_L8,FOREGROUND_PPF_AL44,
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FOREGROUND_PPF_AL88,FOREGROUND_PPF_L4,FOREGROUND_PPF_A8,FOREGROUND_PPF_A4)
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2017-08-22 15:52:57 +08:00
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foreground_prered: foreground pre-defined red value
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2021-06-09 16:24:20 +08:00
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foreground_pregreen: foreground pre-defined green value
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2017-08-22 15:52:57 +08:00
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foreground_preblue: foreground pre-defined blue value
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\param[out] none
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\retval none
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*/
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void ipa_foreground_init(ipa_foreground_parameter_struct* foreground_struct)
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{
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2021-06-09 16:24:20 +08:00
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FlagStatus tempflag = RESET;
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if(RESET != (IPA_CTL & IPA_CTL_TEN)){
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tempflag = SET;
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/* reset the TEN in order to configure the following bits */
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IPA_CTL &= ~IPA_CTL_TEN;
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}
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2017-08-22 15:52:57 +08:00
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/* foreground memory base address configuration */
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IPA_FMADDR &= ~(IPA_FMADDR_FMADDR);
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IPA_FMADDR = foreground_struct->foreground_memaddr;
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/* foreground line offset configuration */
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IPA_FLOFF &= ~(IPA_FLOFF_FLOFF);
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IPA_FLOFF = foreground_struct->foreground_lineoff;
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2021-06-09 16:24:20 +08:00
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/* foreground pixel format pre-defined alpha, alpha calculation algorithm configuration */
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IPA_FPCTL &= ~(IPA_FPCTL_FPDAV|IPA_FPCTL_FAVCA|IPA_FPCTL_FPF);
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2017-08-22 15:52:57 +08:00
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IPA_FPCTL |= (foreground_struct->foreground_prealpha<<24U);
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IPA_FPCTL |= foreground_struct->foreground_alpha_algorithm;
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IPA_FPCTL |= foreground_struct->foreground_pf;
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2021-06-09 16:24:20 +08:00
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/* foreground pre-defined red green blue configuration */
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2017-08-22 15:52:57 +08:00
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IPA_FPV &= ~(IPA_FPV_FPDRV|IPA_FPV_FPDGV|IPA_FPV_FPDBV);
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2021-06-09 16:24:20 +08:00
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IPA_FPV |= ((foreground_struct->foreground_prered<<16U)|(foreground_struct->foreground_pregreen<<8U)
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|(foreground_struct->foreground_preblue));
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if(SET == tempflag){
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/* restore the state of TEN */
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IPA_CTL |= IPA_CTL_TEN;
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}
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}
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/*!
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\brief initialize the structure of IPA background parameter struct with the default values, it is
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suggested that call this function after an ipa_background_parameter_struct structure is defined
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\param[in] none
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\param[out] background_struct: the data needed to initialize background
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background_memaddr: background memory base address
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background_lineoff: background line offset
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background_prealpha: background pre-defined alpha value
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background_alpha_algorithm: IPA_BG_ALPHA_MODE_0,IPA_BG_ALPHA_MODE_1,IPA_BG_ALPHA_MODE_2
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background_pf: background pixel format(BACKGROUND_PPF_ARGB8888,BACKGROUND_PPF_RGB888,BACKGROUND_PPF_RGB565,
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BACKGROUND_PPF_ARG1555,BACKGROUND_PPF_ARGB4444,BACKGROUND_PPF_L8,BACKGROUND_PPF_AL44,
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BACKGROUND_PPF_AL88,BACKGROUND_PPF_L4,BACKGROUND_PPF_A8,BACKGROUND_PPF_A4)
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background_prered: background pre-defined red value
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background_pregreen: background pre-defined green value
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background_preblue: background pre-defined blue value
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\retval none
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*/
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void ipa_background_struct_para_init(ipa_background_parameter_struct* background_struct)
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{
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/* initialize the struct parameters with default values */
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background_struct->background_memaddr = IPA_DEFAULT_VALUE;
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background_struct->background_lineoff = IPA_DEFAULT_VALUE;
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background_struct->background_prealpha = IPA_DEFAULT_VALUE;
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background_struct->background_alpha_algorithm = IPA_BG_ALPHA_MODE_0;
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background_struct->background_pf = BACKGROUND_PPF_ARGB8888;
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background_struct->background_prered = IPA_DEFAULT_VALUE;
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background_struct->background_pregreen = IPA_DEFAULT_VALUE;
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background_struct->background_preblue = IPA_DEFAULT_VALUE;
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2017-08-22 15:52:57 +08:00
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}
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/*!
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2021-06-09 16:24:20 +08:00
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\brief initialize background parameters
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\param[in] background_struct: the data needed to initialize background
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2017-08-22 15:52:57 +08:00
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background_memaddr: background memory base address
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background_lineoff: background line offset
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2021-06-09 16:24:20 +08:00
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background_prealpha: background pre-defined alpha value
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2017-08-22 15:52:57 +08:00
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background_alpha_algorithm: IPA_BG_ALPHA_MODE_0,IPA_FG_ALPHA_MODE_1,IPA_FG_ALPHA_MODE_2
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2021-06-09 16:24:20 +08:00
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background_pf: background pixel format(BACKGROUND_PPF_ARGB8888,BACKGROUND_PPF_RGB888,BACKGROUND_PPF_RGB565,
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BACKGROUND_PPF_ARG1555,BACKGROUND_PPF_ARGB4444,BACKGROUND_PPF_L8,BACKGROUND_PPF_AL44,
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BACKGROUND_PPF_AL88,BACKGROUND_PPF_L4,BACKGROUND_PPF_A8,BACKGROUND_PPF_A4)
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2017-08-22 15:52:57 +08:00
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background_prered: background pre-defined red value
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2021-06-09 16:24:20 +08:00
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background_pregreen: background pre-defined green value
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2017-08-22 15:52:57 +08:00
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background_preblue: background pre-defined blue value
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\param[out] none
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\retval none
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*/
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void ipa_background_init(ipa_background_parameter_struct* background_struct)
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{
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2021-06-09 16:24:20 +08:00
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FlagStatus tempflag = RESET;
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if(RESET != (IPA_CTL & IPA_CTL_TEN)){
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tempflag = SET;
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/* reset the TEN in order to configure the following bits */
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IPA_CTL &= ~IPA_CTL_TEN;
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}
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2017-08-22 15:52:57 +08:00
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/* background memory base address configuration */
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IPA_BMADDR &= ~(IPA_BMADDR_BMADDR);
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IPA_BMADDR = background_struct->background_memaddr;
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/* background line offset configuration */
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IPA_BLOFF &= ~(IPA_BLOFF_BLOFF);
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2021-06-09 16:24:20 +08:00
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IPA_BLOFF = background_struct->background_lineoff;
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/* background pixel format pre-defined alpha, alpha calculation algorithm configuration */
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IPA_BPCTL &= ~(IPA_BPCTL_BPDAV|IPA_BPCTL_BAVCA|IPA_BPCTL_BPF);
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2017-08-22 15:52:57 +08:00
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IPA_BPCTL |= (background_struct->background_prealpha<<24U);
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IPA_BPCTL |= background_struct->background_alpha_algorithm;
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2021-06-09 16:24:20 +08:00
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IPA_BPCTL |= background_struct->background_pf;
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/* background pre-defined red green blue configuration */
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2017-08-22 15:52:57 +08:00
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IPA_BPV &= ~(IPA_BPV_BPDRV|IPA_BPV_BPDGV|IPA_BPV_BPDBV);
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2021-06-09 16:24:20 +08:00
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IPA_BPV |= ((background_struct->background_prered<<16U)|(background_struct->background_pregreen<<8U)
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|
|
|(background_struct->background_preblue));
|
|
|
|
|
|
|
|
if(SET == tempflag){
|
|
|
|
/* restore the state of TEN */
|
|
|
|
IPA_CTL |= IPA_CTL_TEN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
|
|
|
\brief initialize the structure of IPA destination parameter struct with the default values, it is
|
|
|
|
suggested that call this function after an ipa_destination_parameter_struct structure is defined
|
|
|
|
\param[in] none
|
|
|
|
\param[out] destination_struct: the data needed to initialize destination parameter
|
|
|
|
destination_pf: IPA_DPF_ARGB8888,IPA_DPF_RGB888,IPA_DPF_RGB565,IPA_DPF_ARGB1555,
|
|
|
|
IPA_DPF_ARGB4444,refer to ipa_dpf_enum
|
|
|
|
destination_lineoff: destination line offset
|
|
|
|
destination_prealpha: destination pre-defined alpha value
|
|
|
|
destination_prered: destination pre-defined red value
|
|
|
|
destination_pregreen: destination pre-defined green value
|
|
|
|
destination_preblue: destination pre-defined blue value
|
|
|
|
destination_memaddr: destination memory base address
|
|
|
|
image_width: width of the image to be processed
|
|
|
|
image_height: height of the image to be processed
|
|
|
|
\retval none
|
|
|
|
*/
|
|
|
|
void ipa_destination_struct_para_init(ipa_destination_parameter_struct* destination_struct)
|
|
|
|
{
|
|
|
|
/* initialize the struct parameters with default values */
|
|
|
|
destination_struct->destination_pf = IPA_DPF_ARGB8888;
|
|
|
|
destination_struct->destination_lineoff = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->destination_prealpha = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->destination_prered = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->destination_pregreen = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->destination_preblue = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->destination_memaddr = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->image_width = IPA_DEFAULT_VALUE;
|
|
|
|
destination_struct->image_height = IPA_DEFAULT_VALUE;
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief initialize destination parameters
|
|
|
|
\param[in] destination_struct: the data needed to initialize destination parameters
|
|
|
|
destination_pf: IPA_DPF_ARGB8888,IPA_DPF_RGB888,IPA_DPF_RGB565,IPA_DPF_ARGB1555,
|
|
|
|
IPA_DPF_ARGB4444,refer to ipa_dpf_enum
|
2017-08-22 15:52:57 +08:00
|
|
|
destination_lineoff: destination line offset
|
2021-06-09 16:24:20 +08:00
|
|
|
destination_prealpha: destination pre-defined alpha value
|
2017-08-22 15:52:57 +08:00
|
|
|
destination_prered: destination pre-defined red value
|
|
|
|
destination_pregreen: destination pre-defined green value
|
|
|
|
destination_preblue: destination pre-defined blue value
|
2021-06-09 16:24:20 +08:00
|
|
|
destination_memaddr: destination memory base address
|
2017-08-22 15:52:57 +08:00
|
|
|
image_width: width of the image to be processed
|
|
|
|
image_height: height of the image to be processed
|
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
|
|
|
void ipa_destination_init(ipa_destination_parameter_struct* destination_struct)
|
|
|
|
{
|
|
|
|
uint32_t destination_pixelformat;
|
2021-06-09 16:24:20 +08:00
|
|
|
FlagStatus tempflag = RESET;
|
|
|
|
if(RESET != (IPA_CTL & IPA_CTL_TEN)){
|
|
|
|
tempflag = SET;
|
|
|
|
/* reset the TEN in order to configure the following bits */
|
|
|
|
IPA_CTL &= ~IPA_CTL_TEN;
|
|
|
|
}
|
|
|
|
|
2017-08-22 15:52:57 +08:00
|
|
|
/* destination pixel format configuration */
|
|
|
|
IPA_DPCTL &= ~(IPA_DPCTL_DPF);
|
|
|
|
IPA_DPCTL = destination_struct->destination_pf;
|
|
|
|
destination_pixelformat = destination_struct->destination_pf;
|
|
|
|
/* destination pixel format ARGB8888 */
|
|
|
|
switch(destination_pixelformat){
|
|
|
|
case IPA_DPF_ARGB8888:
|
|
|
|
IPA_DPV &= ~(IPA_DPV_DPDBV_0|(IPA_DPV_DPDGV_0)|(IPA_DPV_DPDRV_0)|(IPA_DPV_DPDAV_0));
|
|
|
|
IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<8U)
|
|
|
|
|(destination_struct->destination_prered<<16U)
|
|
|
|
|(destination_struct->destination_prealpha<<24U));
|
|
|
|
break;
|
|
|
|
/* destination pixel format RGB888 */
|
|
|
|
case IPA_DPF_RGB888:
|
|
|
|
IPA_DPV &= ~(IPA_DPV_DPDBV_1|(IPA_DPV_DPDGV_1)|(IPA_DPV_DPDRV_1));
|
|
|
|
IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<8U)
|
|
|
|
|(destination_struct->destination_prered<<16U));
|
|
|
|
break;
|
|
|
|
/* destination pixel format RGB565 */
|
|
|
|
case IPA_DPF_RGB565:
|
|
|
|
IPA_DPV &= ~(IPA_DPV_DPDBV_2|(IPA_DPV_DPDGV_2)|(IPA_DPV_DPDRV_2));
|
|
|
|
IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<5U)
|
|
|
|
|(destination_struct->destination_prered<<11U));
|
|
|
|
break;
|
|
|
|
/* destination pixel format ARGB1555 */
|
|
|
|
case IPA_DPF_ARGB1555:
|
|
|
|
IPA_DPV &= ~(IPA_DPV_DPDBV_3|(IPA_DPV_DPDGV_3)|(IPA_DPV_DPDRV_3)|(IPA_DPV_DPDAV_3));
|
|
|
|
IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<5U)
|
|
|
|
|(destination_struct->destination_prered<<10U)
|
|
|
|
|(destination_struct->destination_prealpha<<15U));
|
|
|
|
break;
|
|
|
|
/* destination pixel format ARGB4444 */
|
|
|
|
case IPA_DPF_ARGB4444:
|
|
|
|
IPA_DPV &= ~(IPA_DPV_DPDBV_4|(IPA_DPV_DPDGV_4)|(IPA_DPV_DPDRV_4)|(IPA_DPV_DPDAV_4));
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<4U)
|
|
|
|
|(destination_struct->destination_prered<<8U)
|
|
|
|
|(destination_struct->destination_prealpha<<12U));
|
2017-08-22 15:52:57 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* destination memory base address configuration */
|
|
|
|
IPA_DMADDR &= ~(IPA_DMADDR_DMADDR);
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_DMADDR = destination_struct->destination_memaddr;
|
|
|
|
/* destination line offset configuration */
|
2017-08-22 15:52:57 +08:00
|
|
|
IPA_DLOFF &= ~(IPA_DLOFF_DLOFF);
|
|
|
|
IPA_DLOFF =destination_struct->destination_lineoff;
|
2021-06-09 16:24:20 +08:00
|
|
|
/* image size configuration */
|
2017-08-22 15:52:57 +08:00
|
|
|
IPA_IMS &= ~(IPA_IMS_HEIGHT|IPA_IMS_WIDTH);
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_IMS |= ((destination_struct->image_width<<16U)|(destination_struct->image_height));
|
|
|
|
|
|
|
|
if(SET == tempflag){
|
|
|
|
/* restore the state of TEN */
|
|
|
|
IPA_CTL |= IPA_CTL_TEN;
|
|
|
|
}
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief initialize IPA foreground LUT parameters
|
|
|
|
\param[in] fg_lut_num: foreground LUT number of pixel
|
|
|
|
\param[in] fg_lut_pf: foreground LUT pixel format(IPA_LUT_PF_ARGB8888, IPA_LUT_PF_RGB888)
|
|
|
|
\param[in] fg_lut_addr: foreground LUT memory base address
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_foreground_lut_init(uint8_t fg_lut_num, uint8_t fg_lut_pf, uint32_t fg_lut_addr)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
FlagStatus tempflag = RESET;
|
|
|
|
if(RESET != (IPA_FPCTL & IPA_FPCTL_FLLEN)){
|
|
|
|
tempflag = SET;
|
|
|
|
/* reset the FLLEN in order to configure the following bits */
|
|
|
|
IPA_FPCTL &= ~IPA_FPCTL_FLLEN;
|
|
|
|
}
|
|
|
|
|
2017-08-22 15:52:57 +08:00
|
|
|
/* foreground LUT number of pixel configuration */
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_FPCTL |= ((uint32_t)fg_lut_num<<8U);
|
2017-08-22 15:52:57 +08:00
|
|
|
/* foreground LUT pixel format configuration */
|
|
|
|
if(IPA_LUT_PF_RGB888 == fg_lut_pf){
|
|
|
|
IPA_FPCTL |= IPA_FPCTL_FLPF;
|
|
|
|
}else{
|
|
|
|
IPA_FPCTL &= ~(IPA_FPCTL_FLPF);
|
|
|
|
}
|
|
|
|
/* foreground LUT memory base address configuration */
|
|
|
|
IPA_FLMADDR &= ~(IPA_FLMADDR_FLMADDR);
|
|
|
|
IPA_FLMADDR = fg_lut_addr;
|
2021-06-09 16:24:20 +08:00
|
|
|
|
|
|
|
if(SET == tempflag){
|
|
|
|
/* restore the state of FLLEN */
|
|
|
|
IPA_FPCTL |= IPA_FPCTL_FLLEN;
|
|
|
|
}
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief initialize IPA background LUT parameters
|
|
|
|
\param[in] bg_lut_num: background LUT number of pixel
|
|
|
|
\param[in] bg_lut_pf: background LUT pixel format(IPA_LUT_PF_ARGB8888, IPA_LUT_PF_RGB888)
|
|
|
|
\param[in] bg_lut_addr: background LUT memory base address
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_background_lut_init(uint8_t bg_lut_num, uint8_t bg_lut_pf, uint32_t bg_lut_addr)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
FlagStatus tempflag = RESET;
|
|
|
|
if(RESET != (IPA_BPCTL & IPA_BPCTL_BLLEN)){
|
|
|
|
tempflag = SET;
|
|
|
|
/* reset the BLLEN in order to configure the following bits */
|
|
|
|
IPA_BPCTL &= ~IPA_BPCTL_BLLEN;
|
|
|
|
}
|
|
|
|
|
2017-08-22 15:52:57 +08:00
|
|
|
/* background LUT number of pixel configuration */
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_BPCTL |= ((uint32_t)bg_lut_num<<8U);
|
2017-08-22 15:52:57 +08:00
|
|
|
/* background LUT pixel format configuration */
|
|
|
|
if(IPA_LUT_PF_RGB888 == bg_lut_pf){
|
|
|
|
IPA_BPCTL |= IPA_BPCTL_BLPF;
|
|
|
|
}else{
|
|
|
|
IPA_BPCTL &= ~(IPA_BPCTL_BLPF);
|
|
|
|
}
|
|
|
|
/* background LUT memory base address configuration */
|
|
|
|
IPA_BLMADDR &= ~(IPA_BLMADDR_BLMADDR);
|
|
|
|
IPA_BLMADDR = bg_lut_addr;
|
2021-06-09 16:24:20 +08:00
|
|
|
|
|
|
|
if(SET == tempflag){
|
|
|
|
/* restore the state of BLLEN */
|
|
|
|
IPA_BPCTL |= IPA_BPCTL_BLLEN;
|
|
|
|
}
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief configure IPA line mark
|
|
|
|
\param[in] line_num: line number
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_line_mark_config(uint16_t line_num)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
|
|
|
IPA_LM &= ~(IPA_LM_LM);
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_LM = line_num;
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief inter-timer enable or disable
|
|
|
|
\param[in] timer_cfg: IPA_INTER_TIMER_ENABLE,IPA_INTER_TIMER_DISABLE
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_inter_timer_config(uint8_t timer_cfg)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
if(IPA_INTER_TIMER_ENABLE == timer_cfg){
|
2017-08-22 15:52:57 +08:00
|
|
|
IPA_ITCTL |= IPA_ITCTL_ITEN;
|
|
|
|
}else{
|
|
|
|
IPA_ITCTL &= ~(IPA_ITCTL_ITEN);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief configure the number of clock cycles interval
|
|
|
|
\param[in] clk_num: the number of clock cycles
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_interval_clock_num_config(uint8_t clk_num)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
/* NCCI[7:0] bits have no meaning if ITEN is '0' */
|
2017-08-22 15:52:57 +08:00
|
|
|
IPA_ITCTL &= ~(IPA_ITCTL_NCCI);
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_ITCTL |= ((uint32_t)clk_num<<8U);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
|
|
|
\brief get IPA flag status in IPA_INTF register
|
|
|
|
\param[in] flag: IPA flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_FLAG_TAE: transfer access error interrupt flag
|
|
|
|
\arg IPA_FLAG_FTF: full transfer finish interrupt flag
|
|
|
|
\arg IPA_FLAG_TLM: transfer line mark interrupt flag
|
|
|
|
\arg IPA_FLAG_LAC: LUT access conflict interrupt flag
|
|
|
|
\arg IPA_FLAG_LLF: LUT loading finish interrupt flag
|
|
|
|
\arg IPA_FLAG_WCF: wrong configuration interrupt flag
|
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
|
|
|
FlagStatus ipa_flag_get(uint32_t flag)
|
|
|
|
{
|
|
|
|
if(RESET != (IPA_INTF & flag)){
|
|
|
|
return SET;
|
|
|
|
}else{
|
|
|
|
return RESET;
|
|
|
|
}
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief clear IPA flag in IPA_INTF register
|
|
|
|
\param[in] flag: IPA flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_FLAG_TAE: transfer access error interrupt flag
|
|
|
|
\arg IPA_FLAG_FTF: full transfer finish interrupt flag
|
|
|
|
\arg IPA_FLAG_TLM: transfer line mark interrupt flag
|
|
|
|
\arg IPA_FLAG_LAC: LUT access conflict interrupt flag
|
|
|
|
\arg IPA_FLAG_LLF: LUT loading finish interrupt flag
|
|
|
|
\arg IPA_FLAG_WCF: wrong configuration interrupt flag
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_flag_clear(uint32_t flag)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_INTC |= (flag);
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief enable IPA interrupt
|
|
|
|
\param[in] int_flag: IPA interrupt flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_INT_TAE: transfer access error interrupt
|
|
|
|
\arg IPA_INT_FTF: full transfer finish interrupt
|
|
|
|
\arg IPA_INT_TLM: transfer line mark interrupt
|
|
|
|
\arg IPA_INT_LAC: LUT access conflict interrupt
|
|
|
|
\arg IPA_INT_LLF: LUT loading finish interrupt
|
|
|
|
\arg IPA_INT_WCF: wrong configuration interrupt
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_interrupt_enable(uint32_t int_flag)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_CTL |= (int_flag);
|
2017-08-22 15:52:57 +08:00
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|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief disable IPA interrupt
|
|
|
|
\param[in] int_flag: IPA interrupt flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_INT_TAE: transfer access error interrupt
|
|
|
|
\arg IPA_INT_FTF: full transfer finish interrupt
|
|
|
|
\arg IPA_INT_TLM: transfer line mark interrupt
|
|
|
|
\arg IPA_INT_LAC: LUT access conflict interrupt
|
|
|
|
\arg IPA_INT_LLF: LUT loading finish interrupt
|
|
|
|
\arg IPA_INT_WCF: wrong configuration interrupt
|
2017-08-22 15:52:57 +08:00
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|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_interrupt_disable(uint32_t int_flag)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_CTL &= ~(int_flag);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
|
|
|
\brief get IPA interrupt flag
|
|
|
|
\param[in] int_flag: IPA interrupt flag flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_INT_FLAG_TAE: transfer access error interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_FTF: full transfer finish interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_TLM: transfer line mark interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_LAC: LUT access conflict interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_LLF: LUT loading finish interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_WCF: wrong configuration interrupt flag
|
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
|
|
|
FlagStatus ipa_interrupt_flag_get(uint32_t int_flag)
|
|
|
|
{
|
|
|
|
if(0U != (IPA_INTF & int_flag)){
|
2017-08-22 15:52:57 +08:00
|
|
|
return SET;
|
|
|
|
}else{
|
|
|
|
return RESET;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*!
|
2021-06-09 16:24:20 +08:00
|
|
|
\brief clear IPA interrupt flag
|
|
|
|
\param[in] int_flag: IPA interrupt flag flags
|
|
|
|
one or more parameters can be selected which are shown as below:
|
|
|
|
\arg IPA_INT_FLAG_TAE: transfer access error interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_FTF: full transfer finish interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_TLM: transfer line mark interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_LAC: LUT access conflict interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_LLF: LUT loading finish interrupt flag
|
|
|
|
\arg IPA_INT_FLAG_WCF: wrong configuration interrupt flag
|
2017-08-22 15:52:57 +08:00
|
|
|
\param[out] none
|
|
|
|
\retval none
|
|
|
|
*/
|
2021-06-09 16:24:20 +08:00
|
|
|
void ipa_interrupt_flag_clear(uint32_t int_flag)
|
2017-08-22 15:52:57 +08:00
|
|
|
{
|
2021-06-09 16:24:20 +08:00
|
|
|
IPA_INTC |= (int_flag);
|
2017-08-22 15:52:57 +08:00
|
|
|
}
|