2021-05-17 16:23:41 +08:00
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/**************************************************************************//**
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-9-16 Philo First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#include <rtdevice.h>
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#include "NuMicro.h"
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#ifdef BSP_USING_ADC
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/* Private define ---------------------------------------------------------------*/
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/* Private Typedef --------------------------------------------------------------*/
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struct nu_adc
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{
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struct rt_adc_device dev;
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char *name;
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ADC_T *adc_base;
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int adc_reg_tab;
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int adc_max_ch_num;
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};
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typedef struct nu_adc *nu_adc_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled);
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static rt_err_t nu_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
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/* Public functions ------------------------------------------------------------*/
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int rt_hw_adc_init(void);
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/* Private variables ------------------------------------------------------------*/
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static struct nu_adc nu_adc_arr [] =
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{
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#if defined(BSP_USING_ADC0)
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{
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.name = "adc0",
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.adc_base = ADC,
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.adc_max_ch_num = 15,
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},
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#endif
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{0}
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};
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static const struct rt_adc_ops nu_adc_ops =
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{
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nu_adc_enabled,
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nu_get_adc_value,
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};
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typedef struct rt_adc_ops *rt_adc_ops_t;
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/* nu_adc_enabled - Enable ADC clock and wait for ready */
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static rt_err_t nu_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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ADC_T *adc_base = ((nu_adc_t)device)->adc_base;
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int *padc_reg_tab = &((nu_adc_t)device)->adc_reg_tab;
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RT_ASSERT(device != RT_NULL);
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if (channel >= ((nu_adc_t)device)->adc_max_ch_num)
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return -(RT_EINVAL);
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if (enabled)
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{
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ADC_POWER_ON(adc_base);
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if (*padc_reg_tab == 0)
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{
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ADC_Open(adc_base, ADC_ADCR_DIFFEN_SINGLE_END, ADC_ADCR_ADMD_SINGLE, (0x1 << channel));
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}
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*padc_reg_tab |= (0x1 << channel);
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}
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else
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{
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*padc_reg_tab &= ~(0x1 << channel);
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if (*padc_reg_tab == 0)
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{
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ADC_Close(adc_base);
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}
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ADC_POWER_DOWN(adc_base);
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}
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return RT_EOK;
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}
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static rt_err_t nu_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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ADC_T *adc_base = ((nu_adc_t)device)->adc_base;
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int *padc_reg_tab = &((nu_adc_t)device)->adc_reg_tab;
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if (channel >= ((nu_adc_t)device)->adc_max_ch_num)
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{
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*value = 0xFFFFFFFF;
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return -(RT_EINVAL);
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}
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if ((*padc_reg_tab & (1 << channel)) == 0)
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{
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*value = 0xFFFFFFFF;
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return -(RT_EBUSY);
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}
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ADC_SET_INPUT_CHANNEL(adc_base, (0x1<<channel));
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ADC_CLR_INT_FLAG(adc_base, ADC_ADF_INT);
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ADC_ENABLE_INT(adc_base, ADC_ADF_INT);
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ADC_START_CONV(adc_base);
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while (ADC_GET_INT_FLAG(adc_base, ADC_ADF_INT) == 0);
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*value = ADC_GET_CONVERSION_DATA(adc_base, channel);
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return RT_EOK;
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}
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int rt_hw_adc_init(void)
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{
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2023-03-17 12:12:16 +08:00
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rt_err_t result = -RT_ERROR;
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2021-05-17 16:23:41 +08:00
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int nu_sel = 0;
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while (nu_adc_arr[nu_sel].name != 0)
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{
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nu_adc_arr[nu_sel].adc_reg_tab = 0;
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result = rt_hw_adc_register(&nu_adc_arr[nu_sel].dev, nu_adc_arr[nu_sel].name, &nu_adc_ops, NULL);
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RT_ASSERT(result == RT_EOK);
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nu_sel++;
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}
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return (int)result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif //#if defined(BSP_USING_ADC)
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