2022-05-06 09:28:21 +08:00
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/**
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*******************************************************************************
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* @file template/source/hc32f4xx_conf.h
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* @brief This file contains HC32 Series Device Driver Library usage management.
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@verbatim
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Change Logs:
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Date Author Notes
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2024-01-09 21:56:37 +08:00
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2022-03-31 CDT First version
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2022-05-06 09:28:21 +08:00
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@endverbatim
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*******************************************************************************
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2024-01-09 21:56:37 +08:00
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* Copyright (C) 2022-2023, Xiaohua Semiconductor Co., Ltd. All rights reserved.
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2022-05-06 09:28:21 +08:00
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*
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* This software component is licensed by XHSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __HC32F4XX_CONF_H__
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#define __HC32F4XX_CONF_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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2024-01-09 21:56:37 +08:00
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#include <rtconfig.h>
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @brief This is the list of modules to be used in the Device Driver Library.
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* Select the modules you need to use to DDL_ON.
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* @note LL_ICG_ENABLE must be turned on(DDL_ON) to ensure that the chip works
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* properly.
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* @note LL_UTILITY_ENABLE must be turned on(DDL_ON) if using Device Driver
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* Library.
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* @note LL_PRINT_ENABLE must be turned on(DDL_ON) if using printf function.
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*/
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#define LL_ICG_ENABLE (DDL_ON)
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#define LL_UTILITY_ENABLE (DDL_ON)
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#define LL_PRINT_ENABLE (DDL_OFF)
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#define LL_ADC_ENABLE (DDL_ON)
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#define LL_AES_ENABLE (DDL_ON)
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#define LL_AOS_ENABLE (DDL_ON)
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#define LL_CAN_ENABLE (DDL_ON)
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#define LL_CLK_ENABLE (DDL_ON)
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#define LL_CMP_ENABLE (DDL_ON)
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#define LL_CRC_ENABLE (DDL_ON)
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#define LL_CTC_ENABLE (DDL_ON)
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#define LL_DAC_ENABLE (DDL_ON)
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#define LL_DBGC_ENABLE (DDL_OFF)
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#define LL_DCU_ENABLE (DDL_ON)
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#define LL_DMA_ENABLE (DDL_ON)
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#define LL_DMC_ENABLE (DDL_ON)
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#define LL_DVP_ENABLE (DDL_ON)
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#define LL_EFM_ENABLE (DDL_ON)
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#define LL_EMB_ENABLE (DDL_ON)
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#define LL_ETH_ENABLE (DDL_ON)
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#define LL_EVENT_PORT_ENABLE (DDL_OFF)
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#define LL_FCG_ENABLE (DDL_ON)
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#define LL_FCM_ENABLE (DDL_ON)
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#define LL_FMAC_ENABLE (DDL_ON)
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#define LL_GPIO_ENABLE (DDL_ON)
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#define LL_HASH_ENABLE (DDL_ON)
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#define LL_HRPWM_ENABLE (DDL_ON)
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#define LL_I2C_ENABLE (DDL_ON)
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#define LL_I2S_ENABLE (DDL_ON)
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#define LL_INTERRUPTS_ENABLE (DDL_ON)
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#define LL_INTERRUPTS_SHARE_ENABLE (DDL_ON)
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#define LL_KEYSCAN_ENABLE (DDL_ON)
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#define LL_MAU_ENABLE (DDL_ON)
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#define LL_MPU_ENABLE (DDL_ON)
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#define LL_NFC_ENABLE (DDL_ON)
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#define LL_OTS_ENABLE (DDL_ON)
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#define LL_PWC_ENABLE (DDL_ON)
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#define LL_QSPI_ENABLE (DDL_ON)
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#define LL_RMU_ENABLE (DDL_ON)
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#define LL_RTC_ENABLE (DDL_ON)
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#define LL_SDIOC_ENABLE (DDL_ON)
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#define LL_SMC_ENABLE (DDL_ON)
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#define LL_SPI_ENABLE (DDL_ON)
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#define LL_SRAM_ENABLE (DDL_ON)
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#define LL_SWDT_ENABLE (DDL_ON)
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#define LL_TMR0_ENABLE (DDL_ON)
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#define LL_TMR2_ENABLE (DDL_ON)
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#define LL_TMR4_ENABLE (DDL_ON)
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#define LL_TMR6_ENABLE (DDL_ON)
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#define LL_TMRA_ENABLE (DDL_ON)
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#define LL_TRNG_ENABLE (DDL_ON)
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#define LL_USART_ENABLE (DDL_ON)
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#define LL_USB_ENABLE (DDL_ON)
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#define LL_WDT_ENABLE (DDL_ON)
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/**
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* @brief The following is a list of currently supported BSP boards.
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*/
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#define BSP_EV_HC32F4A0_LQFP176 (1U)
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/**
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* @brief The macro BSP_EV_HC32F4XX is used to specify the BSP board currently
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* in use.
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* The value should be set to one of the list of currently supported BSP boards.
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* @note If there is no supported BSP board or the BSP function is not used,
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* the value needs to be set to 0U.
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*/
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#define BSP_EV_HC32F4XX (BSP_EV_HC32F4A0_LQFP176)
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/**
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* @brief This is the list of BSP components to be used.
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* Select the components you need to use to DDL_ON.
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*/
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#define BSP_24CXX_ENABLE (DDL_OFF)
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#define BSP_GT9XX_ENABLE (DDL_OFF)
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#define BSP_IS42S16400J7TLI_ENABLE (DDL_OFF)
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#define BSP_IS62WV51216_ENABLE (DDL_OFF)
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#define BSP_MT29F2G08AB_ENABLE (DDL_OFF)
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#define BSP_NT35510_ENABLE (DDL_OFF)
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#define BSP_OV5640_ENABLE (DDL_OFF)
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#define BSP_TCA9539_ENABLE (DDL_OFF)
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#define BSP_W25QXX_ENABLE (DDL_OFF)
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#define BSP_WM8731_ENABLE (DDL_OFF)
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/**
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* @brief Ethernet and PHY Configuration.
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*/
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/* MAC ADDRESS */
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#define ETH_MAC_ADDR0 (0x02U)
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#define ETH_MAC_ADDR1 (0x00U)
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#define ETH_MAC_ADDR2 (0x00U)
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#define ETH_MAC_ADDR3 (0x00U)
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#define ETH_MAC_ADDR4 (0x00U)
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#define ETH_MAC_ADDR5 (0x00U)
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/* Common PHY Registers */
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#define PHY_BCR (0x00U) /*!< Basic Control Register */
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#define PHY_BSR (0x01U) /*!< Basic Status Register */
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#define PHY_SOFT_RESET (0x8000U) /*!< PHY Soft Reset */
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#define PHY_LOOPBACK (0x4000U) /*!< Select loop-back mode */
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#define PHY_FULLDUPLEX_100M (0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
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#define PHY_HALFDUPLEX_100M (0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
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#define PHY_FULLDUPLEX_10M (0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
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#define PHY_HALFDUPLEX_10M (0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
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#define PHY_AUTONEGOTIATION (0x1000U) /*!< Enable auto-negotiation function */
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#define PHY_POWERDOWN (0x0800U) /*!< Select the power down mode */
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#define PHY_ISOLATE (0x0400U) /*!< Isolate PHY from MII */
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#define PHY_RESTART_AUTONEGOTIATION (0x0200U) /*!< Restart auto-negotiation function */
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#define PHY_100BASE_TX_FD (0x4000U) /*!< 100Base-TX full duplex support */
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#define PHY_100BASE_TX_HD (0x2000U) /*!< 100Base-TX half duplex support */
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#define PHY_10BASE_T_FD (0x1000U) /*!< 10Base-T full duplex support */
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#define PHY_10BASE_T_HD (0x0800U) /*!< 10Base-T half duplex support */
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#define PHY_AUTONEGO_COMPLETE (0x0020U) /*!< Auto-Negotiation process completed */
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#define PHY_LINK_STATUS (0x0004U) /*!< Valid link established */
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#define PHY_JABBER_DETECTION (0x0002U) /*!< Jabber condition detected */
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#if defined (ETH_PHY_USING_RTL8201F)
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/* PHY(RTL8201F) Address*/
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#define ETH_PHY_ADDR (0x00U)
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/* PHY Configuration delay(ms) */
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#define ETH_PHY_RST_DELAY (0x0080UL)
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#define ETH_PHY_CONFIG_DELAY (0x0800UL)
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#define ETH_PHY_RD_TIMEOUT (0x0005UL)
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#define ETH_PHY_WR_TIMEOUT (0x0005UL)
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/* PHY Status Register */
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#define PHY_SR (PHY_BCR) /*!< PHY status register */
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#define PHY_DUPLEX_STATUS (PHY_FULLDUPLEX_10M) /*!< PHY Duplex mask */
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#define PHY_SPEED_STATUS (PHY_HALFDUPLEX_100M) /*!< PHY Speed mask */
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#endif
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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* Global function prototypes (definition in C source)
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******************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HC32F4XX_CONF_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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