2022-05-31 11:53:56 +08:00
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/*
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2024-01-09 21:56:37 +08:00
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* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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2022-05-31 11:53:56 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __BOARD_CONFIG_H__
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#define __BOARD_CONFIG_H__
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#include <rtconfig.h>
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#include "hc32_ll.h"
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#include "drv_config.h"
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2024-01-09 21:56:37 +08:00
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/************************* XTAL port **********************/
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#define XTAL_PORT (GPIO_PORT_H)
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#define XTAL_IN_PIN (GPIO_PIN_01)
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#define XTAL_OUT_PIN (GPIO_PIN_00)
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2022-05-31 11:53:56 +08:00
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2024-01-09 21:56:37 +08:00
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/************************ USART port **********************/
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2022-05-31 11:53:56 +08:00
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#if defined(BSP_USING_UART2)
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#define USART2_RX_PORT (GPIO_PORT_A)
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2022-06-08 14:55:28 +08:00
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#define USART2_RX_PIN (GPIO_PIN_03)
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2024-01-09 21:56:37 +08:00
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#define USART2_RX_FUNC (GPIO_FUNC_37)
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2022-05-31 11:53:56 +08:00
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#define USART2_TX_PORT (GPIO_PORT_A)
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#define USART2_TX_PIN (GPIO_PIN_02)
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2024-01-09 21:56:37 +08:00
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#define USART2_TX_FUNC (GPIO_FUNC_36)
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2022-05-31 11:53:56 +08:00
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#endif
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#if defined(BSP_USING_UART4)
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#define USART4_RX_PORT (GPIO_PORT_B)
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#define USART4_RX_PIN (GPIO_PIN_09)
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2024-01-09 21:56:37 +08:00
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#define USART4_RX_FUNC (GPIO_FUNC_37)
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2022-05-31 11:53:56 +08:00
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#define USART4_TX_PORT (GPIO_PORT_E)
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#define USART4_TX_PIN (GPIO_PIN_06)
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2024-01-09 21:56:37 +08:00
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#define USART4_TX_FUNC (GPIO_FUNC_36)
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#endif
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/************************ I2C port **********************/
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#if defined(BSP_USING_I2C3)
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#define I2C3_SDA_PORT (GPIO_PORT_B)
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#define I2C3_SDA_PIN (GPIO_PIN_05)
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#define I2C3_SDA_FUNC (GPIO_FUNC_48)
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#define I2C3_SCL_PORT (GPIO_PORT_E)
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#define I2C3_SCL_PIN (GPIO_PIN_15)
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#define I2C3_SCL_FUNC (GPIO_FUNC_49)
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#endif
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/*********** ADC configure *********/
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#if defined(BSP_USING_ADC1)
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#define ADC1_CH_PORT (GPIO_PORT_C)
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#define ADC1_CH_PIN (GPIO_PIN_00)
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#endif
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#if defined(BSP_USING_ADC2)
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#define ADC2_CH_PORT (GPIO_PORT_C)
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#define ADC2_CH_PIN (GPIO_PIN_01)
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2022-05-31 11:53:56 +08:00
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#endif
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2022-06-08 12:10:58 +08:00
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/*********** CAN configure *********/
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#if defined(BSP_USING_CAN1)
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2024-01-09 21:56:37 +08:00
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#define CAN1_TX_PORT (GPIO_PORT_B)
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#define CAN1_TX_PIN (GPIO_PIN_07)
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#define CAN1_TX_PIN_FUNC (GPIO_FUNC_50)
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2024-01-09 21:56:37 +08:00
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#define CAN1_RX_PORT (GPIO_PORT_B)
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#define CAN1_RX_PIN (GPIO_PIN_06)
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#define CAN1_RX_PIN_FUNC (GPIO_FUNC_51)
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2024-01-09 21:56:37 +08:00
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#define CAN1_STB_PORT (GPIO_PORT_D)
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#define CAN1_STB_PIN (GPIO_PIN_15)
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#endif
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2024-01-09 21:56:37 +08:00
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/************************* SPI port ***********************/
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#if defined(BSP_USING_SPI3)
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#define SPI3_CS_PORT (GPIO_PORT_C)
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#define SPI3_CS_PIN (GPIO_PIN_07)
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#define SPI3_SCK_PORT (GPIO_PORT_C)
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#define SPI3_SCK_PIN (GPIO_PIN_06)
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#define SPI3_SCK_FUNC (GPIO_FUNC_43)
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2022-06-13 21:13:51 +08:00
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2024-01-09 21:56:37 +08:00
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#define SPI3_MOSI_PORT (GPIO_PORT_D)
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#define SPI3_MOSI_PIN (GPIO_PIN_08)
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#define SPI3_MOSI_FUNC (GPIO_FUNC_40)
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2022-06-13 21:13:51 +08:00
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2024-01-09 21:56:37 +08:00
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#define SPI3_MISO_PORT (GPIO_PORT_D)
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#define SPI3_MISO_PIN (GPIO_PIN_09)
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#define SPI3_MISO_FUNC (GPIO_FUNC_41)
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#define SPI3_WP_PORT (GPIO_PORT_D)
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#define SPI3_WP_PIN (GPIO_PIN_10)
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#define SPI3_HOLD_PORT (GPIO_PORT_D)
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#define SPI3_HOLD_PIN (GPIO_PIN_11)
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2022-06-13 21:13:51 +08:00
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#endif
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2024-01-09 21:56:37 +08:00
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/************************ SDIOC port **********************/
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#if defined(BSP_USING_SDIO1)
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#define SDIOC1_CK_PORT (GPIO_PORT_C)
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#define SDIOC1_CK_PIN (GPIO_PIN_12)
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#define SDIOC1_CK_FUNC (GPIO_FUNC_9)
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#define SDIOC1_CMD_PORT (GPIO_PORT_D)
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#define SDIOC1_CMD_PIN (GPIO_PIN_02)
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#define SDIOC1_CMD_FUNC (GPIO_FUNC_9)
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#define SDIOC1_D0_PORT (GPIO_PORT_C)
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#define SDIOC1_D0_PIN (GPIO_PIN_08)
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#define SDIOC1_D0_FUNC (GPIO_FUNC_9)
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#define SDIOC1_D1_PORT (GPIO_PORT_C)
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#define SDIOC1_D1_PIN (GPIO_PIN_09)
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#define SDIOC1_D1_FUNC (GPIO_FUNC_9)
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#define SDIOC1_D2_PORT (GPIO_PORT_C)
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#define SDIOC1_D2_PIN (GPIO_PIN_10)
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#define SDIOC1_D2_FUNC (GPIO_FUNC_9)
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#define SDIOC1_D3_PORT (GPIO_PORT_C)
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#define SDIOC1_D3_PIN (GPIO_PIN_11)
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#define SDIOC1_D3_FUNC (GPIO_FUNC_9)
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#endif
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/************************ RTC/PM *****************************/
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#if defined(BSP_USING_RTC) || defined(RT_USING_PM)
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#if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM)
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#define XTAL32_PORT (GPIO_PORT_C)
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#define XTAL32_IN_PIN (GPIO_PIN_15)
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#define XTAL32_OUT_PIN (GPIO_PIN_14)
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#endif
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2022-06-13 21:13:51 +08:00
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#endif
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2024-01-09 21:56:37 +08:00
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#if defined(RT_USING_PWM)
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/*********** PWM_TMRA configure *********/
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#if defined(BSP_USING_PWM_TMRA_4)
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#if defined(BSP_USING_PWM_TMRA_4_CH1)
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#define PWM_TMRA_4_CH1_PORT (GPIO_PORT_D)
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#define PWM_TMRA_4_CH1_PIN (GPIO_PIN_12)
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#define PWM_TMRA_4_CH1_PIN_FUNC (GPIO_FUNC_4)
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#endif
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#if defined(BSP_USING_PWM_TMRA_4_CH2)
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#define PWM_TMRA_4_CH2_PORT (GPIO_PORT_D)
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#define PWM_TMRA_4_CH2_PIN (GPIO_PIN_13)
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#define PWM_TMRA_4_CH2_PIN_FUNC (GPIO_FUNC_4)
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#endif
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#if defined(BSP_USING_PWM_TMRA_4_CH3)
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#define PWM_TMRA_4_CH3_PORT (GPIO_PORT_D)
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#define PWM_TMRA_4_CH3_PIN (GPIO_PIN_14)
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#define PWM_TMRA_4_CH3_PIN_FUNC (GPIO_FUNC_4)
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#endif
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#if defined(BSP_USING_PWM_TMRA_4_CH4)
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#define PWM_TMRA_4_CH4_PORT (GPIO_PORT_D)
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#define PWM_TMRA_4_CH4_PIN (GPIO_PIN_15)
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#define PWM_TMRA_4_CH4_PIN_FUNC (GPIO_FUNC_4)
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#endif
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#endif
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2022-06-29 00:00:58 +08:00
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2024-01-09 21:56:37 +08:00
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#if defined(BSP_USING_PWM_TMRA_5)
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#if defined(BSP_USING_PWM_TMRA_5_CH1)
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#define PWM_TMRA_5_CH1_PORT (GPIO_PORT_C)
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#define PWM_TMRA_5_CH1_PIN (GPIO_PIN_10)
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#define PWM_TMRA_5_CH1_PIN_FUNC (GPIO_FUNC_5)
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#endif
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#if defined(BSP_USING_PWM_TMRA_5_CH2)
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#define PWM_TMRA_5_CH2_PORT (GPIO_PORT_C)
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#define PWM_TMRA_5_CH2_PIN (GPIO_PIN_11)
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#define PWM_TMRA_5_CH2_PIN_FUNC (GPIO_FUNC_5)
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#endif
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#if defined(BSP_USING_PWM_TMRA_5_CH3)
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#define PWM_TMRA_5_CH3_PORT (GPIO_PORT_C)
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#define PWM_TMRA_5_CH3_PIN (GPIO_PIN_12)
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#define PWM_TMRA_5_CH3_PIN_FUNC (GPIO_FUNC_5)
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#endif
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#if defined(BSP_USING_PWM_TMRA_5_CH4)
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#define PWM_TMRA_5_CH4_PORT (GPIO_PORT_D)
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#define PWM_TMRA_5_CH4_PIN (GPIO_PIN_00)
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#define PWM_TMRA_5_CH4_PIN_FUNC (GPIO_FUNC_5)
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#endif
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#endif
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/*********** PWM_TMR4 configure *********/
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#if defined(BSP_USING_PWM_TMR4_1)
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#if defined(BSP_USING_PWM_TMR4_1_OUH)
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#define PWM_TMR4_1_OUH_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OUH_PIN (GPIO_PIN_09)
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#define PWM_TMR4_1_OUH_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#if defined(BSP_USING_PWM_TMR4_1_OUL)
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#define PWM_TMR4_1_OUL_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OUL_PIN (GPIO_PIN_08)
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#define PWM_TMR4_1_OUL_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#if defined(BSP_USING_PWM_TMR4_1_OVH)
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#define PWM_TMR4_1_OVH_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OVH_PIN (GPIO_PIN_11)
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#define PWM_TMR4_1_OVH_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#if defined(BSP_USING_PWM_TMR4_1_OVL)
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#define PWM_TMR4_1_OVL_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OVL_PIN (GPIO_PIN_10)
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#define PWM_TMR4_1_OVL_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#if defined(BSP_USING_PWM_TMR4_1_OWH)
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#define PWM_TMR4_1_OWH_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OWH_PIN (GPIO_PIN_13)
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#define PWM_TMR4_1_OWH_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#if defined(BSP_USING_PWM_TMR4_1_OWL)
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#define PWM_TMR4_1_OWL_PORT (GPIO_PORT_E)
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#define PWM_TMR4_1_OWL_PIN (GPIO_PIN_12)
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#define PWM_TMR4_1_OWL_PIN_FUNC (GPIO_FUNC_2)
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#endif
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#endif
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/*********** PWM_TMR6 configure *********/
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#if defined(BSP_USING_PWM_TMR6_1)
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#if defined(BSP_USING_PWM_TMR6_1_A)
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#define PWM_TMR6_1_A_PORT (GPIO_PORT_A)
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#define PWM_TMR6_1_A_PIN (GPIO_PIN_08)
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#define PWM_TMR6_1_A_PIN_FUNC (GPIO_FUNC_3)
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#endif
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#if defined(BSP_USING_PWM_TMR6_1_B)
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#define PWM_TMR6_1_B_PORT (GPIO_PORT_A)
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#define PWM_TMR6_1_B_PIN (GPIO_PIN_07)
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#define PWM_TMR6_1_B_PIN_FUNC (GPIO_FUNC_3)
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#endif
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#endif
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2022-06-29 00:00:58 +08:00
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#endif
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2024-01-09 21:56:37 +08:00
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#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
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#if defined(BSP_USING_USBFS)
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/* USBFS Core*/
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#define USBF_DP_PORT (GPIO_PORT_A)
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#define USBF_DP_PIN (GPIO_PIN_12)
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#define USBF_DP_FUNC (GPIO_FUNC_10)
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#define USBF_DM_PORT (GPIO_PORT_A)
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#define USBF_DM_PIN (GPIO_PIN_11)
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#define USBF_DM_FUNC (GPIO_FUNC_10)
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#define USBF_VBUS_PORT (GPIO_PORT_A)
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#define USBF_VBUS_PIN (GPIO_PIN_09)
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#define USBF_VBUS_FUNC (GPIO_FUNC_10)
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#define USBF_DRVVBUS_PORT (GPIO_PORT_B)
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#define USBF_DRVVBUS_PIN (GPIO_PIN_08)
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#define USBF_DRVVBUS_FUNC (GPIO_FUNC_10)
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#endif
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2022-05-31 11:53:56 +08:00
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#endif
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2024-01-09 21:56:37 +08:00
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#if defined(BSP_USING_QSPI)
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#ifndef BSP_QSPI_USING_SOFT_CS
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/* QSSN */
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#define QSPI_FLASH_CS_PORT (GPIO_PORT_C)
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#define QSPI_FLASH_CS_PIN (GPIO_PIN_07)
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#define QSPI_FLASH_CS_FUNC (GPIO_FUNC_7)
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#endif
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/* QSCK */
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#define QSPI_FLASH_SCK_PORT (GPIO_PORT_C)
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#define QSPI_FLASH_SCK_PIN (GPIO_PIN_06)
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#define QSPI_FLASH_SCK_FUNC (GPIO_FUNC_7)
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/* QSIO0 */
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#define QSPI_FLASH_IO0_PORT (GPIO_PORT_D)
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#define QSPI_FLASH_IO0_PIN (GPIO_PIN_08)
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#define QSPI_FLASH_IO0_FUNC (GPIO_FUNC_7)
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/* QSIO1 */
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#define QSPI_FLASH_IO1_PORT (GPIO_PORT_D)
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#define QSPI_FLASH_IO1_PIN (GPIO_PIN_09)
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#define QSPI_FLASH_IO1_FUNC (GPIO_FUNC_7)
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/* QSIO2 */
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#define QSPI_FLASH_IO2_PORT (GPIO_PORT_D)
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#define QSPI_FLASH_IO2_PIN (GPIO_PIN_10)
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#define QSPI_FLASH_IO2_FUNC (GPIO_FUNC_7)
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/* QSIO3 */
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#define QSPI_FLASH_IO3_PORT (GPIO_PORT_D)
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#define QSPI_FLASH_IO3_PIN (GPIO_PIN_11)
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#define QSPI_FLASH_IO3_FUNC (GPIO_FUNC_7)
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#endif
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/*********** TMRA_PULSE_ENCODER configure *********/
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#if defined(RT_USING_PULSE_ENCODER)
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#if defined(BSP_USING_TMRA_PULSE_ENCODER)
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#if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
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#define PULSE_ENCODER_TMRA_1_A_PORT (GPIO_PORT_A)
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#define PULSE_ENCODER_TMRA_1_A_PIN (GPIO_PIN_08)
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#define PULSE_ENCODER_TMRA_1_A_PIN_FUNC (GPIO_FUNC_4)
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#define PULSE_ENCODER_TMRA_1_B_PORT (GPIO_PORT_A)
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#define PULSE_ENCODER_TMRA_1_B_PIN (GPIO_PIN_09)
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#define PULSE_ENCODER_TMRA_1_B_PIN_FUNC (GPIO_FUNC_4)
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#endif /* BSP_USING_PULSE_ENCODER_TMRA_1 */
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#endif /* BSP_USING_TMRA_PULSE_ENCODER */
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#if defined(BSP_USING_TMR6_PULSE_ENCODER)
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#if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
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#define PULSE_ENCODER_TMR6_1_A_PORT (GPIO_PORT_E)
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#define PULSE_ENCODER_TMR6_1_A_PIN (GPIO_PIN_09)
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#define PULSE_ENCODER_TMR6_1_A_PIN_FUNC (GPIO_FUNC_3)
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#define PULSE_ENCODER_TMR6_1_B_PORT (GPIO_PORT_E)
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#define PULSE_ENCODER_TMR6_1_B_PIN (GPIO_PIN_08)
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#define PULSE_ENCODER_TMR6_1_B_PIN_FUNC (GPIO_FUNC_3)
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#endif /* BSP_USING_PULSE_ENCODER_TMR6_1 */
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#endif /* BSP_USING_TMR6_PULSE_ENCODER */
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#endif /* RT_USING_PULSE_ENCODER */
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#endif
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