2020-03-09 15:10:16 +08:00
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/*
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2021-03-14 15:15:52 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2020-03-09 15:10:16 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2022-05-19 11:07:28 +08:00
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* 2022-05-16 shelton first version
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2020-03-09 15:10:16 +08:00
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*/
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2022-05-19 11:07:28 +08:00
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#include "drv_common.h"
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2020-03-09 15:10:16 +08:00
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#include "drv_soft_i2c.h"
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#ifdef RT_USING_I2C
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#define LOG_TAG "drv.i2c"
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#include <drv_log.h>
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2022-03-25 22:54:51 +08:00
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#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && \
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!defined(BSP_USING_I2C3)
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2020-03-09 15:10:16 +08:00
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#error "Please define at least one BSP_USING_I2Cx"
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2022-04-08 16:01:38 +08:00
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/* this driver can be disabled at menuconfig RT-Thread Components Device Drivers */
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2020-03-09 15:10:16 +08:00
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#endif
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static const struct at32_soft_i2c_config soft_i2c_config[] =
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{
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#ifdef BSP_USING_I2C1
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I2C1_BUS_CONFIG,
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#endif
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#ifdef BSP_USING_I2C2
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2022-03-25 22:54:51 +08:00
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I2C2_BUS_CONFIG,
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2020-03-09 15:10:16 +08:00
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#endif
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#ifdef BSP_USING_I2C3
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I2C3_BUS_CONFIG,
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#endif
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};
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static struct at32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
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/**
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2022-03-25 22:54:51 +08:00
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* this function initializes the i2c pin.
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2020-03-09 15:10:16 +08:00
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*
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2022-03-25 22:54:51 +08:00
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* @param at32 i2c dirver class.
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2020-03-09 15:10:16 +08:00
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*/
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static void at32_i2c_gpio_init(struct at32_i2c *i2c)
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{
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struct at32_soft_i2c_config* cfg = (struct at32_soft_i2c_config*)i2c->ops.data;
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rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
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rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
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rt_pin_write(cfg->scl, PIN_HIGH);
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rt_pin_write(cfg->sda, PIN_HIGH);
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}
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2024-04-30 08:46:12 +08:00
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static void at32_i2c_pin_init(void)
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{
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rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct at32_i2c);
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for(rt_size_t i = 0; i < obj_num; i++)
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{
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at32_i2c_gpio_init(&i2c_obj[i]);
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}
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}
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2020-03-09 15:10:16 +08:00
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/**
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2022-03-25 22:54:51 +08:00
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* this function sets the sda pin.
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2020-03-09 15:10:16 +08:00
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*
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2022-03-25 22:54:51 +08:00
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* @param at32 config class.
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* @param the sda pin state.
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2020-03-09 15:10:16 +08:00
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*/
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static void at32_set_sda(void *data, rt_int32_t state)
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{
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struct at32_soft_i2c_config* cfg = (struct at32_soft_i2c_config*)data;
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if (state)
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{
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rt_pin_write(cfg->sda, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->sda, PIN_LOW);
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}
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}
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/**
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2022-03-25 22:54:51 +08:00
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* this function sets the scl pin.
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2020-03-09 15:10:16 +08:00
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*
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2022-03-25 22:54:51 +08:00
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* @param at32 config class.
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* @param the scl pin state.
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2020-03-09 15:10:16 +08:00
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*/
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static void at32_set_scl(void *data, rt_int32_t state)
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{
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struct at32_soft_i2c_config* cfg = (struct at32_soft_i2c_config*)data;
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if (state)
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{
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rt_pin_write(cfg->scl, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->scl, PIN_LOW);
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}
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}
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/**
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2022-03-25 22:54:51 +08:00
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* this function gets the sda pin state.
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2020-03-09 15:10:16 +08:00
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*
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2022-03-25 22:54:51 +08:00
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* @param the sda pin state.
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2020-03-09 15:10:16 +08:00
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*/
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static rt_int32_t at32_get_sda(void *data)
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{
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struct at32_soft_i2c_config* cfg = (struct at32_soft_i2c_config*)data;
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return rt_pin_read(cfg->sda);
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}
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/**
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2022-03-25 22:54:51 +08:00
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* this function gets the scl pin state.
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2020-03-09 15:10:16 +08:00
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*
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2022-03-25 22:54:51 +08:00
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* @param the scl pin state.
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2020-03-09 15:10:16 +08:00
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*/
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static rt_int32_t at32_get_scl(void *data)
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{
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struct at32_soft_i2c_config* cfg = (struct at32_soft_i2c_config*)data;
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return rt_pin_read(cfg->scl);
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}
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2022-03-25 22:54:51 +08:00
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2020-03-09 15:10:16 +08:00
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/**
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2022-03-25 22:54:51 +08:00
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* the time delay function.
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2020-03-09 15:10:16 +08:00
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*
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* @param microseconds.
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*/
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static void at32_udelay(rt_uint32_t us)
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{
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rt_uint32_t ticks;
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rt_uint32_t told, tnow, tcnt = 0;
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rt_uint32_t reload = SysTick->LOAD;
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ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1)
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{
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tnow = SysTick->VAL;
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if (tnow != told)
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{
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if (tnow < told)
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{
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tcnt += told - tnow;
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}
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else
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{
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tcnt += reload - tnow + told;
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}
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told = tnow;
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if (tcnt >= ticks)
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{
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break;
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}
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}
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}
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}
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static const struct rt_i2c_bit_ops at32_bit_ops_default =
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{
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.data = RT_NULL,
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2024-04-30 08:46:12 +08:00
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.pin_init = at32_i2c_pin_init,
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2020-03-09 15:10:16 +08:00
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.set_sda = at32_set_sda,
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.set_scl = at32_set_scl,
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.get_sda = at32_get_sda,
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.get_scl = at32_get_scl,
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.udelay = at32_udelay,
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.delay_us = 1,
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2024-04-30 08:46:12 +08:00
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.timeout = 100,
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.i2c_pin_init_flag = RT_FALSE
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2020-03-09 15:10:16 +08:00
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};
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/**
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* if i2c is locked, this function will unlock it
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*
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* @param at32 config class
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*
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* @return RT_EOK indicates successful unlock.
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*/
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static rt_err_t at32_i2c_bus_unlock(const struct at32_soft_i2c_config *cfg)
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{
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rt_int32_t i = 0;
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if (PIN_LOW == rt_pin_read(cfg->sda))
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{
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while (i++ < 9)
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{
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rt_pin_write(cfg->scl, PIN_HIGH);
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at32_udelay(100);
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rt_pin_write(cfg->scl, PIN_LOW);
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at32_udelay(100);
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}
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}
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if (PIN_LOW == rt_pin_read(cfg->sda))
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{
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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2022-03-25 22:54:51 +08:00
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/* i2c initialization function */
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2020-03-09 15:10:16 +08:00
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int rt_hw_i2c_init(void)
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{
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rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct at32_i2c);
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rt_err_t result;
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2024-04-30 08:46:12 +08:00
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for (rt_size_t i = 0; i < obj_num; i++)
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2020-03-09 15:10:16 +08:00
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{
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i2c_obj[i].ops = at32_bit_ops_default;
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i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
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i2c_obj[i].i2c_bus.priv = &i2c_obj[i].ops;
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2024-04-30 08:46:12 +08:00
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2020-03-09 15:10:16 +08:00
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result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name);
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RT_ASSERT(result == RT_EOK);
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at32_i2c_bus_unlock(&soft_i2c_config[i]);
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2021-03-14 15:15:52 +08:00
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2020-03-09 15:10:16 +08:00
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LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
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2021-03-14 15:15:52 +08:00
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soft_i2c_config[i].bus_name,
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soft_i2c_config[i].scl,
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2020-03-09 15:10:16 +08:00
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soft_i2c_config[i].sda);
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}
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_i2c_init);
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#endif /* RT_USING_I2C */
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