2015-08-09 09:36:12 +08:00
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/*
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2018-10-22 11:02:14 +08:00
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* COPYRIGHT (C) 2018, Real-Thread Information Technology Ltd
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2021-04-09 10:52:34 +08:00
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*
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2018-10-22 11:02:14 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2021-04-09 10:52:34 +08:00
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*
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2015-08-09 09:36:12 +08:00
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* Change Logs:
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* Date Author Notes
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* 2015-07-15 Bernard The first version
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*/
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#include <rtthread.h>
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#include <netif/ethernetif.h>
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#include <soc_memory_map.h>
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#include <stdint.h>
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#include <enet/enet.h>
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#include <lwipopts.h>
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#include "emac_drv.h"
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2021-04-09 10:52:34 +08:00
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#define MAX_ADDR_LEN 6
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#define IMX_EMAC_DEVICE(eth) (struct emac_device*)(eth)
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2015-08-09 09:36:12 +08:00
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struct emac_device
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{
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2021-04-09 10:52:34 +08:00
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/* inherit from Ethernet device */
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struct eth_device parent;
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2015-08-09 09:36:12 +08:00
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2021-04-09 10:52:34 +08:00
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imx_enet_priv_t enet_priv;
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/* interface address info. */
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rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* MAC address */
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2015-08-09 09:36:12 +08:00
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};
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static struct emac_device _emac;
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#define ENET_PHY_ADDR 1
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extern int imx_enet_mii_type(imx_enet_priv_t * dev, enum imx_mii_type mii_type);
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extern void imx_enet_iomux(void);
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extern void imx_enet_phy_reset(void);
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static unsigned char s_pkt_send[2048];
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static unsigned char s_pkt_recv[2048];
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void init_enet(struct emac_device* emac)
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{
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// setup iomux for ENET
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imx_enet_iomux();
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imx_enet_phy_reset();
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// init enet0
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imx_enet_init(&emac->enet_priv, ENET_BASE_ADDR, ENET_PHY_ADDR);
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imx_enet_mii_type(&emac->enet_priv, RGMII);
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// init phy0.
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imx_enet_phy_init(&emac->enet_priv);
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// Check PHY link status.
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if (!(emac->enet_priv.status & ENET_STATUS_LINK_ON))
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{
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2021-04-09 10:52:34 +08:00
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rt_kprintf("ENET link status check fail\n");
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2015-08-09 09:36:12 +08:00
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}
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imx_enet_start(&emac->enet_priv, emac->dev_addr);
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}
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void imx_enet_isr(int vector, void *param)
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{
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2021-04-09 10:52:34 +08:00
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unsigned int value = 0;
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imx_enet_priv_t * dev = &(_emac.enet_priv);
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volatile hw_enet_t *enet_reg = dev->enet_reg;
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2015-08-09 09:36:12 +08:00
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value = enet_reg->EIR.U;
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enet_reg->EIR.U = value & (~ENET_EVENT_MII);
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if (value & ENET_EVENT_TX_ERR)
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2021-04-09 10:52:34 +08:00
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{
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2015-08-09 09:36:12 +08:00
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dev->tx_busy = 0;
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}
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2021-04-09 10:52:34 +08:00
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else if (value & ENET_EVENT_TX)
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{
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2015-08-09 09:36:12 +08:00
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dev->tx_busy = 0;
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}
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if (value & ENET_EVENT_RX)
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2021-04-09 10:52:34 +08:00
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{
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eth_device_ready(&(_emac.parent));
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2015-08-09 09:36:12 +08:00
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}
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if (value & ENET_EVENT_HBERR)
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2021-04-09 10:52:34 +08:00
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{
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2015-08-09 09:36:12 +08:00
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// printf("WARNGING[POLL]: Hearbeat error!\n");
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}
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if (value & ENET_EVENT_EBERR)
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2021-04-09 10:52:34 +08:00
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{
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2015-08-09 09:36:12 +08:00
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// printf("WARNING[POLL]: Ethernet Bus Error!\n");
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}
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}
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static rt_err_t imx_emac_init(rt_device_t dev)
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{
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2021-04-09 10:52:34 +08:00
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struct emac_device *emac;
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2015-08-09 09:36:12 +08:00
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2021-04-09 10:52:34 +08:00
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emac = IMX_EMAC_DEVICE(dev);
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2015-08-09 09:36:12 +08:00
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2021-04-09 10:52:34 +08:00
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/* initialize enet */
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init_enet(emac);
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return RT_EOK;
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2015-08-09 09:36:12 +08:00
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}
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static rt_err_t imx_emac_open(rt_device_t dev, rt_uint16_t oflag)
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{
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2021-04-09 10:52:34 +08:00
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return RT_EOK;
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2015-08-09 09:36:12 +08:00
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}
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static rt_err_t imx_emac_close(rt_device_t dev)
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{
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2021-04-09 10:52:34 +08:00
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return RT_EOK;
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2015-08-09 09:36:12 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t imx_emac_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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2015-08-09 09:36:12 +08:00
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{
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2021-04-09 10:52:34 +08:00
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rt_set_errno(-RT_ENOSYS);
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return 0;
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2015-08-09 09:36:12 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t imx_emac_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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2015-08-09 09:36:12 +08:00
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{
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2021-04-09 10:52:34 +08:00
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rt_set_errno(-RT_ENOSYS);
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return 0;
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2015-08-09 09:36:12 +08:00
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}
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2017-10-16 13:23:03 +08:00
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static rt_err_t imx_emac_control(rt_device_t dev, int cmd, void *args)
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2015-08-09 09:36:12 +08:00
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{
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struct emac_device *emac;
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emac = IMX_EMAC_DEVICE(dev);
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RT_ASSERT(emac != RT_NULL);
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2021-04-09 10:52:34 +08:00
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switch(cmd)
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{
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case NIOCTL_GADDR:
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/* get MAC address */
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if(args) rt_memcpy(args, emac->dev_addr, 6);
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else return -RT_ERROR;
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break;
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default :
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break;
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}
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2015-08-09 09:36:12 +08:00
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2021-04-09 10:52:34 +08:00
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return RT_EOK;
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2015-08-09 09:36:12 +08:00
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}
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/* Ethernet device interface */
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/* transmit packet. */
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rt_err_t imx_emac_tx(rt_device_t dev, struct pbuf* p)
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{
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rt_err_t result = RT_EOK;
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struct emac_device *emac;
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emac = IMX_EMAC_DEVICE(dev);
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RT_ASSERT(emac != RT_NULL);
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/* copy pbuf to a whole ETH frame */
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pbuf_copy_partial(p, s_pkt_send, p->tot_len, 0);
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2021-04-09 10:52:34 +08:00
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/* send to the enet */
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imx_enet_send(&emac->enet_priv, s_pkt_send, p->tot_len, 1);
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2015-08-09 09:36:12 +08:00
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return result;
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}
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/* reception packet. */
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struct pbuf *imx_emac_rx(rt_device_t dev)
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{
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2021-04-09 10:52:34 +08:00
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int len;
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2015-08-09 09:36:12 +08:00
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struct pbuf* p = RT_NULL;
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struct emac_device *emac;
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emac = IMX_EMAC_DEVICE(dev);
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RT_ASSERT(emac != RT_NULL);
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2021-04-09 10:52:34 +08:00
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imx_enet_recv(&emac->enet_priv, s_pkt_recv, &len);
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if (len > 0)
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{
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/* We allocate a pbuf chain of pbufs from the pool. */
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p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
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if (p != RT_NULL)
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{
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pbuf_take(p, s_pkt_recv, len);
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}
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}
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2015-08-09 09:36:12 +08:00
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return p;
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}
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int imx_emac_hw_init(void)
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{
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/* test MAC address */
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2021-04-09 10:52:34 +08:00
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_emac.dev_addr[0] = 0x00;
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_emac.dev_addr[1] = 0x11;
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_emac.dev_addr[2] = 0x22;
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_emac.dev_addr[3] = 0x33;
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_emac.dev_addr[4] = 0x44;
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_emac.dev_addr[5] = 0x55;
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_emac.parent.parent.init = imx_emac_init;
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_emac.parent.parent.open = imx_emac_open;
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_emac.parent.parent.close = imx_emac_close;
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_emac.parent.parent.read = imx_emac_read;
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_emac.parent.parent.write = imx_emac_write;
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_emac.parent.parent.control = imx_emac_control;
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_emac.parent.parent.user_data = RT_NULL;
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_emac.parent.eth_rx = imx_emac_rx;
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_emac.parent.eth_tx = imx_emac_tx;
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2015-08-09 09:36:12 +08:00
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/* register ETH device */
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eth_device_init(&(_emac.parent), "e0");
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2021-04-09 10:52:34 +08:00
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return 0;
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2015-08-09 09:36:12 +08:00
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}
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INIT_DEVICE_EXPORT(imx_emac_hw_init);
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