2022-07-05 16:45:32 +08:00
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import os
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import rtconfig
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from building import *
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Import('SDK_LIB')
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objs = []
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cwd = GetCurrentDir()
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list = os.listdir(cwd)
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# add general drivers
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src = Split('''
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board.c
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''')
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2022-07-20 12:39:42 +08:00
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if GetDepend(['BSP_USING_SPI3_SAMPLE']):
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src += Glob('ports/spi_sample.c')
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if GetDepend(['BSP_USING_RW007']):
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src += Glob('ports/drv_rw007.c')
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2023-05-08 15:00:41 +08:00
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if GetDepend(['BSP_USING_SLIDER_SAMPLE']):
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2022-07-28 15:16:35 +08:00
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src += Glob('ports/slider_sample.c')
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2022-07-05 16:45:32 +08:00
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path = [cwd]
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2022-07-27 15:41:25 +08:00
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path += [cwd + '/ports']
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2022-07-05 16:45:32 +08:00
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startup_path_prefix = SDK_LIB
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2022-08-15 22:32:27 +08:00
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if rtconfig.PLATFORM in ['gcc']:
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2022-08-10 00:36:36 +08:00
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src += [startup_path_prefix +
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2023-04-11 15:40:48 +08:00
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'/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_ext.S']
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2023-01-12 15:12:14 +08:00
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elif rtconfig.PLATFORM in ['armclang']:
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2022-08-10 00:36:36 +08:00
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src += [startup_path_prefix +
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2023-04-11 15:40:48 +08:00
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'/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_ext.S']
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2022-07-05 16:45:32 +08:00
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2023-04-11 15:40:48 +08:00
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CPPDEFINES = ['CY8C624ABZI_S2D44', 'CORE_NAME_CM0P_0', 'CORE_NAME_CM4_0', 'CY_USING_PREBUILT_CM0P_IMAGE', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS']
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2022-07-05 16:45:32 +08:00
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group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES)
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2023-01-09 10:14:23 +08:00
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Return('group')
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