382 lines
9.7 KiB
C
382 lines
9.7 KiB
C
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/*
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* File : drv_usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2018-04-19 misonyo Porting for gd32f30x
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*/
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#include <rthw.h>
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#include <drv_usart.h>
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#include <rtthread.h>
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#include "gd32e230.h"
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#ifdef RT_USING_SERIAL
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#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
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#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
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#if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) && \
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!defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \
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!defined(RT_USING_UART4)
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#error "Please define at least one UARTx"
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#endif
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#include <rtdevice.h>
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/* GD32 uart driver */
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// Todo: compress uart info
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struct gd32_uart
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{
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uint32_t uart_periph;
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IRQn_Type irqn;
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rcu_periph_enum per_clk;
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rcu_periph_enum tx_gpio_clk;
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rcu_periph_enum rx_gpio_clk;
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uint32_t tx_port;
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uint16_t tx_pin;
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uint32_t rx_port;
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uint16_t rx_pin;
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struct rt_serial_device * serial;
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char *device_name;
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};
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static void uart_isr(struct rt_serial_device *serial);
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#if defined(RT_USING_USART0)
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struct rt_serial_device serial0;
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void USART0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial0);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_USART0 */
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#if defined(RT_USING_USART1)
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struct rt_serial_device serial1;
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void USART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART1 */
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#if defined(RT_USING_USART2)
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART2 */
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#if defined(RT_USING_UART3)
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struct rt_serial_device serial3;
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void UART3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial3);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART3 */
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#if defined(RT_USING_UART4)
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struct rt_serial_device serial4;
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void UART4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial4);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* RT_USING_UART4 */
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static const struct gd32_uart uarts[] = {
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#ifdef RT_USING_USART0
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{
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USART0, // uart peripheral index
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USART0_IRQn, // uart iqrn
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RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_PIN_9, // tx port, tx pin
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GPIOA, GPIO_PIN_10, // rx port, rx pin
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&serial0,
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"uart0",
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},
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#endif
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#ifdef RT_USING_USART1
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{
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USART1, // uart peripheral index
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USART1_IRQn, // uart iqrn
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RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_PIN_2, // tx port, tx pin
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GPIOA, GPIO_PIN_3, // rx port, rx pin
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&serial1,
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"uart1",
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},
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#endif
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#ifdef RT_USING_USART2
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{
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USART2, // uart peripheral index
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USART2_IRQn, // uart iqrn
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RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOB, GPIO_PIN_11, // rx port, rx alternate, rx pin
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&serial2,
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"uart2",
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},
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#endif
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#ifdef RT_USING_UART3
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{
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UART3, // uart peripheral index
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UART3_IRQn, // uart iqrn
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RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOC, GPIO_PIN_11, // rx port, rx alternate, rx pin
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&serial3,
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"uart3",
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},
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#endif
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#ifdef RT_USING_UART4
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{
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UART4, // uart peripheral index
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UART4_IRQn, // uart iqrn
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RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_PIN_12, // tx port, tx alternate, tx pin
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GPIOD, GPIO_PIN_2, // rx port, rx alternate, rx pin
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&serial4,
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"uart4",
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},
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#endif
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};
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/**
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* @brief UART MSP Initialization
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* This function configures the hardware resources used in this example:
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* - Peripheral's clock enable
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* - Peripheral's GPIO Configuration
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* - NVIC configuration for UART interrupt request enable
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* @param uart: UART handle pointer
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* @retval None
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*/
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void gd32_uart_gpio_init(struct gd32_uart *uart)
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{
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/* enable USART clock */
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rcu_periph_clock_enable(uart->tx_gpio_clk);
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rcu_periph_clock_enable(uart->rx_gpio_clk);
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rcu_periph_clock_enable(uart->per_clk);
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/* connect port to USARTx_Tx */
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gpio_mode_set(uart->tx_port, GPIO_MODE_AF, GPIO_PUPD_NONE, uart->tx_pin);
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gpio_output_options_set(uart->tx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->tx_pin);
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/* connect port to USARTx_Rx */
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gpio_mode_set(uart->rx_port, GPIO_MODE_INPUT, GPIO_PUPD_NONE, uart->rx_pin);
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NVIC_SetPriority(uart->irqn, 0);
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NVIC_EnableIRQ(uart->irqn);
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}
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static rt_err_t gd32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = (struct gd32_uart *)serial->parent.user_data;
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gd32_uart_gpio_init(uart);
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usart_baudrate_set(uart->uart_periph, cfg->baud_rate);
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switch (cfg->data_bits)
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{
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case DATA_BITS_9:
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usart_word_length_set(uart->uart_periph, USART_WL_9BIT);
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break;
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default:
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usart_word_length_set(uart->uart_periph, USART_WL_8BIT);
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_2:
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usart_stop_bit_set(uart->uart_periph, USART_STB_2BIT);
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break;
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default:
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usart_stop_bit_set(uart->uart_periph, USART_STB_1BIT);
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_ODD:
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usart_parity_config(uart->uart_periph, USART_PM_ODD);
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break;
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case PARITY_EVEN:
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usart_parity_config(uart->uart_periph, USART_PM_EVEN);
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break;
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default:
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usart_parity_config(uart->uart_periph, USART_PM_NONE);
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break;
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}
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usart_receive_config(uart->uart_periph, USART_RECEIVE_ENABLE);
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usart_transmit_config(uart->uart_periph, USART_TRANSMIT_ENABLE);
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usart_enable(uart->uart_periph);
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return RT_EOK;
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}
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static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct gd32_uart *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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NVIC_DisableIRQ(uart->irqn);
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/* disable interrupt */
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usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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NVIC_EnableIRQ(uart->irqn);
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/* enable interrupt */
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usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE);
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break;
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}
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return RT_EOK;
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}
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static int gd32_putc(struct rt_serial_device *serial, char ch)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct gd32_uart *)serial->parent.user_data;
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usart_data_transmit(uart->uart_periph, ch);
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while((usart_flag_get(uart->uart_periph, USART_FLAG_TC) == RESET));
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return 1;
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}
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static int gd32_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct gd32_uart *)serial->parent.user_data;
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ch = -1;
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if (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)
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ch = usart_data_receive(uart->uart_periph);
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return ch;
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}
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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/* UART in mode Receiver */
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if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE) != RESET) &&
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(usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET))
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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/* Clear RXNE interrupt flag */
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usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE);
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}
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}
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static const struct rt_uart_ops gd32_uart_ops =
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{
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gd32_configure,
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gd32_control,
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gd32_putc,
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gd32_getc
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};
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int gd32_hw_usart_init(void)
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{
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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int i;
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for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
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{
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uarts[i].serial->ops = &gd32_uart_ops;
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uarts[i].serial->config = config;
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/* register UART device */
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rt_hw_serial_register(uarts[i].serial,
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uarts[i].device_name,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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(void *)&uarts[i]);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(gd32_hw_usart_init);
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#endif
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