250 lines
9.3 KiB
C
250 lines
9.3 KiB
C
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/*
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** ###################################################################
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** Version: rev. 1.0, 2016-05-09
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** Build: b180327
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**
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** Abstract:
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** Chip specific module features.
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**
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** The Clear BSD License
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2018 NXP
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** All rights reserved.
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**
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** Redistribution and use in source and binary forms, with or without
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** modification, are permitted (subject to the limitations in the
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** disclaimer below) provided that the following conditions are met:
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**
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** * Redistributions of source code must retain the above copyright
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** notice, this list of conditions and the following disclaimer.
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**
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** * Redistributions in binary form must reproduce the above copyright
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** notice, this list of conditions and the following disclaimer in the
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** documentation and/or other materials provided with the distribution.
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**
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** * Neither the name of the copyright holder nor the names of its
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** contributors may be used to endorse or promote products derived from
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** this software without specific prior written permission.
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**
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** NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
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** GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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** HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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** WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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** BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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** OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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** IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2016-05-09)
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** Initial version.
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**
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** ###################################################################
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*/
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#ifndef _LPC54114_cm4_FEATURES_H_
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#define _LPC54114_cm4_FEATURES_H_
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/* SOC module features */
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/* @brief ADC availability on the SoC. */
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#define FSL_FEATURE_SOC_ADC_COUNT (1)
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/* @brief ASYNC_SYSCON availability on the SoC. */
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#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
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/* @brief CRC availability on the SoC. */
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#define FSL_FEATURE_SOC_CRC_COUNT (1)
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/* @brief CTIMER availability on the SoC. */
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#define FSL_FEATURE_SOC_CTIMER_COUNT (5)
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/* @brief DMA availability on the SoC. */
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#define FSL_FEATURE_SOC_DMA_COUNT (1)
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/* @brief DMIC availability on the SoC. */
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#define FSL_FEATURE_SOC_DMIC_COUNT (1)
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/* @brief FLEXCOMM availability on the SoC. */
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#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (8)
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/* @brief GINT availability on the SoC. */
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#define FSL_FEATURE_SOC_GINT_COUNT (2)
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/* @brief GPIO availability on the SoC. */
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#define FSL_FEATURE_SOC_GPIO_COUNT (1)
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/* @brief I2C availability on the SoC. */
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#define FSL_FEATURE_SOC_I2C_COUNT (8)
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/* @brief I2S availability on the SoC. */
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#define FSL_FEATURE_SOC_I2S_COUNT (2)
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/* @brief INPUTMUX availability on the SoC. */
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#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
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/* @brief IOCON availability on the SoC. */
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#define FSL_FEATURE_SOC_IOCON_COUNT (1)
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/* @brief MAILBOX availability on the SoC. */
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#define FSL_FEATURE_SOC_MAILBOX_COUNT (1)
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/* @brief MRT availability on the SoC. */
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#define FSL_FEATURE_SOC_MRT_COUNT (1)
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/* @brief PINT availability on the SoC. */
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#define FSL_FEATURE_SOC_PINT_COUNT (1)
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/* @brief RTC availability on the SoC. */
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#define FSL_FEATURE_SOC_RTC_COUNT (1)
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/* @brief SCT availability on the SoC. */
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#define FSL_FEATURE_SOC_SCT_COUNT (1)
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/* @brief SPI availability on the SoC. */
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#define FSL_FEATURE_SOC_SPI_COUNT (8)
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/* @brief SPIFI availability on the SoC. */
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#define FSL_FEATURE_SOC_SPIFI_COUNT (1)
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/* @brief SYSCON availability on the SoC. */
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#define FSL_FEATURE_SOC_SYSCON_COUNT (1)
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/* @brief USART availability on the SoC. */
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#define FSL_FEATURE_SOC_USART_COUNT (8)
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/* @brief USB availability on the SoC. */
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#define FSL_FEATURE_SOC_USB_COUNT (1)
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/* @brief UTICK availability on the SoC. */
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#define FSL_FEATURE_SOC_UTICK_COUNT (1)
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/* @brief WWDT availability on the SoC. */
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#define FSL_FEATURE_SOC_WWDT_COUNT (1)
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/* ADC module features */
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/* @brief Do not has input select (register INSEL). */
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#define FSL_FEATURE_ADC_HAS_NO_INSEL (0)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (1)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_RESOL (1)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (1)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (1)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (0)
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/* @brief Has ASYNMODE bitfile in CTRL reigster. */
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#define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0)
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/* @brief Has startup register. */
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#define FSL_FEATURE_ADC_HAS_STARTUP_REG (1)
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/* @brief Has ADTrim register */
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#define FSL_FEATURE_ADC_HAS_TRIM_REG (0)
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/* @brief Has Calibration register. */
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#define FSL_FEATURE_ADC_HAS_CALIB_REG (1)
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/* DMA module features */
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/* @brief Number of channels */
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#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (20)
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/* FLEXCOMM module features */
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/* @brief FLEXCOMM0 USART INDEX 0 */
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#define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0)
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/* @brief FLEXCOMM0 SPI INDEX 0 */
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#define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0)
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/* @brief FLEXCOMM0 I2C INDEX 0 */
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#define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0)
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/* @brief FLEXCOMM1 USART INDEX 1 */
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#define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1)
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/* @brief FLEXCOMM1 SPI INDEX 1 */
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#define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1)
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/* @brief FLEXCOMM1 I2C INDEX 1 */
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#define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1)
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/* @brief FLEXCOMM2 USART INDEX 2 */
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#define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2)
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/* @brief FLEXCOMM2 SPI INDEX 2 */
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#define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2)
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/* @brief FLEXCOMM2 I2C INDEX 2 */
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#define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2)
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/* @brief FLEXCOMM3 USART INDEX 3 */
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#define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3)
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/* @brief FLEXCOMM3 SPI INDEX 3 */
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#define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3)
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/* @brief FLEXCOMM3 I2C INDEX 3 */
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#define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3)
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/* @brief FLEXCOMM4 USART INDEX 4 */
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#define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4)
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/* @brief FLEXCOMM4 SPI INDEX 4 */
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#define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4)
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/* @brief FLEXCOMM4 I2C INDEX 4 */
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#define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4)
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/* @brief FLEXCOMM5 USART INDEX 5 */
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#define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5)
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/* @brief FLEXCOMM5 SPI INDEX 5 */
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#define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5)
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/* @brief FLEXCOMM5 I2C INDEX 5 */
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#define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5)
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/* @brief FLEXCOMM6 USART INDEX 6 */
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#define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6)
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/* @brief FLEXCOMM6 SPI INDEX 6 */
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#define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6)
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/* @brief FLEXCOMM6 I2C INDEX 6 */
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#define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6)
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/* @brief FLEXCOMM7 I2S INDEX 0 */
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#define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (0)
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/* @brief FLEXCOMM7 USART INDEX 7 */
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#define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7)
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/* @brief FLEXCOMM7 SPI INDEX 7 */
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#define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7)
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/* @brief FLEXCOMM7 I2C INDEX 7 */
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#define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7)
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/* @brief FLEXCOMM7 I2S INDEX 1 */
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#define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (1)
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/* MAILBOX module features */
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/* @brief Mailbox side for current core. */
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#define FSL_FEATURE_MAILBOX_SIDE_A (1)
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/* MRT module features */
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/* @brief number of channels. */
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#define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4)
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/* interrupt module features */
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/* @brief Lowest interrupt request number. */
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#define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
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/* @brief Highest interrupt request number. */
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#define FSL_FEATURE_INTERRUPT_IRQ_MAX (105)
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/* PINT module features */
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/* @brief Number of connected outputs */
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#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8)
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/* SCT module features */
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/* @brief Number of events */
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#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
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/* @brief Number of states */
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#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
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/* @brief Number of match capture */
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#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
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/* @brief Number of outputs */
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#define FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS (8)
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/* SYSCON module features */
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/* @brief Pointer to ROM IAP entry functions */
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#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
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/* @brief Flash page size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
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/* @brief Flash sector size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
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/* @brief Flash size in bytes */
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#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (262144)
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/* SysTick module features */
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/* @brief Systick has external reference clock. */
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#define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0)
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/* @brief Systick external reference clock is core clock divided by this value. */
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#define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0)
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/* USB module features */
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/* @brief Number of the endpoint in USB FS */
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#define FSL_FEATURE_USB_EP_NUM (5)
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#endif /* _LPC54114_cm4_FEATURES_H_ */
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