191 lines
6.9 KiB
C
191 lines
6.9 KiB
C
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/* ------------------------------------------
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* Copyright (c) 2017, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1) Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* \version 2017.03
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* \date 2014-06-25
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* \author Huaqi Fang(Huaqi.Fang@synopsys.com)
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--------------------------------------------- */
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/**
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* \file
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* \brief DesignWare SPI driver header file
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* \ingroup DEVICE_DW_SPI
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*/
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#ifndef _DEVICE_DW_SPI_H_
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#define _DEVICE_DW_SPI_H_
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#include "device/device_hal/inc/dev_spi.h"
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/**
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* if this header file is included,
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* will indicate that this designware spi device
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* is used
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*/
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#define DEVICE_USE_DESIGNWARE_SPI
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#define DW_SPI_IN_FREE (0) /*!< Currently not in spi transfer */
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#define DW_SPI_IN_XFER (DEV_IN_TX|DEV_IN_RX|DEV_IN_XFER) /*!< Currently in spi transfer */
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#define DW_SPI_IN_TX (DEV_IN_TX|DEV_IN_XFER) /*!< Currently in spi tx */
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#define DW_SPI_IN_RX (DEV_IN_RX|DEV_IN_XFER) /*!< Currently in spi rx */
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#define DW_SPI_GINT_DISABLED (0) /*!< designware interrupt disabled for control iic irq/fiq */
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#define DW_SPI_GINT_ENABLE (1<<0) /*!< designware interrupt enabled for control iic irq/fiq */
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#define DW_SPI_MASTER_SUPPORTED (0x1) /*!< Support Designware SPI Master Mode */
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#define DW_SPI_SLAVE_SUPPORTED (0x2) /*!< Support Designware SPI Slave Mode */
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/*!< Support Designware SPI Both Master and Slave Mode */
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#define DW_SPI_BOTH_SUPPORTED (DW_SPI_MASTER_SUPPORTED|DW_SPI_SLAVE_SUPPORTED)
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/**
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* \defgroup DEVICE_DW_SPI_REGSTRUCT DesignWare SPI Register Structure
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* \ingroup DEVICE_DW_SPI
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* \brief contains definitions of DesignWare SPI register structure.
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* \details detailed description of DesignWare SPI register information
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* @{
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*/
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/**
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* \brief DesignWare SPI register structure
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* \details Detailed struct description of DesignWare SPI
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* block register information, implementation of dev_spi_info::spi_regs
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*/
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typedef volatile struct dw_spi_reg
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{
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/*!< Control Register */
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/*!< SPI Control Register 0 (0x0) */
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uint32_t CTRLR0;
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/*!< SPI Control Register 1 (0x4) */
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uint32_t CTRLR1;
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/*!< Enable Register */
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/*!< SPI Enable Register (0x8) */
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uint32_t SSIENR;
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/*!< SPI Microwire Control Register (0xC) */
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uint32_t MWCR;
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/*!< SPI Slave Enable Register (0x10) */
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uint32_t SER;
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/*!< SPI Baud Rate Select Register (0x14) */
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uint32_t BAUDR;
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/*!< TX and RX FIFO Control Register */
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/*!< SPI Transmit FIFO Threshold Level Register (0x18) */
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uint32_t TXFTLR;
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/*!< SPI Receive FIFO Threshold Level Register (0x1C) */
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uint32_t RXFTLR;
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/*!< SPI Transmit FIFO Level Register (0x20) */
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uint32_t TXFLR;
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/*!< SPI Receive FIFO Level Register (0x24) */
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uint32_t RXFLR;
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/*!< SPI Status Register (0x28) */
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uint32_t SR;
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/*!< Interrupt Enable/Disable/Control Registers */
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/*!< SPI Interrupt Mask Register (0x2C) */
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uint32_t IMR;
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/*!< SPI Interrupt Status Register (0x30) */
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uint32_t ISR;
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/*!< SPI Raw Interrupt Status Register (0x34) */
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uint32_t RISR;
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/*!< SPI Transmit FIFO Overflow Interrupt Clear Register (0x38) */
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uint32_t TXOICR;
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/*!< SPI Receive FIFO Overflow Interrupt Clear Register (0x3C) */
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uint32_t RXOICR;
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/*!< SPI Receive FIFO Underflow Interrupt Clear Register (0x40) */
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uint32_t RXUICR;
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/*!< SPI Multi-Master Interrupt Clear Register (0x44) */
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uint32_t MSTICR;
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/*!< SPI Interrupt Clear Register (0x48) */
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uint32_t ICR;
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/*!< DMA Control Register (0x4C) */
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uint32_t DMACR;
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/*!< DMA Transmit Data Level (0x50) */
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uint32_t DMATDLR;
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/*!< DMA Receive Data Level (0x54) */
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uint32_t DMARDLR;
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/*!< SPI Identification Register (0x58) */
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uint32_t IDR;
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/*!< SPI CoreKit ID Register (Value after Reset : 0x3332322A) (0x5C) */
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uint32_t SSI_VER_ID;
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/*!< Data Register */
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/*!< SPI DATA Register for both Read and Write (0x60) */
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uint32_t DATAREG;
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} DW_SPI_REG, *DW_SPI_REG_PTR;
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/** @} */
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/** Designware SPI Message Transfer */
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typedef struct dw_spi_transfer {
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uint32_t xfer_len;
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uint32_t tx_idx;
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uint32_t rx_idx;
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uint32_t nbytes;
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DEV_SPI_TRANSFER *tx_xfer;
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DEV_SPI_TRANSFER *rx_xfer;
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} DW_SPI_TRANSFER, *DW_SPI_TRANSFER_PTR;
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/**
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* \brief DesignWare SPI control structure definition
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* \details implement of dev_spi_info::dev_spi_info
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*/
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typedef struct dw_spi_ctrl {
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DW_SPI_REG *dw_spi_regs; /*!< spi register */
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/* Variables which should be set during object implementation */
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uint32_t support_modes; /*!< supported spi modes */
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uint32_t intno; /*!< interrupt no */
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uint32_t dw_apb_bus_freq; /*!< spi ip apb bus frequency */
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uint32_t tx_fifo_len; /*!< transmit fifo length */
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uint32_t rx_fifo_len; /*!< receive fifo length */
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INT_HANDLER dw_spi_int_handler; /*!< spi interrupt handler */
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/* Variables which always change during iic operation */
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uint32_t int_status; /*!< iic interrupt status */
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DW_SPI_TRANSFER dw_xfer; /*!< designware spi transfer */
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} DW_SPI_CTRL, *DW_SPI_CTRL_PTR;
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \defgroup DEVICE_DW_SPI_FUNCDLR DesignWare SPI Function Declaration
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* \ingroup DEVICE_DW_SPI
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* \brief contains declarations of designware spi functions.
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* \details This are only used in \ref dw_spi_obj.c
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* @{
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*/
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extern int32_t dw_spi_open (DEV_SPI *spi_obj, uint32_t mode, uint32_t param);
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extern int32_t dw_spi_close (DEV_SPI *spi_obj);
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extern int32_t dw_spi_control (DEV_SPI *spi_obj, uint32_t ctrl_cmd, void *param);
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extern int32_t dw_spi_write (DEV_SPI *spi_obj, const void *data, uint32_t len);
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extern int32_t dw_spi_read (DEV_SPI *spi_obj, void *data, uint32_t len);
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extern void dw_spi_isr(DEV_SPI *spi_obj, void *ptr);
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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#endif /* _DEVICE_DW_SPI_H_ */
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