2020-11-28 18:27:24 +08:00
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/*
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2021-03-14 12:58:10 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2020-11-28 18:27:24 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-11-28 bigmagic first version
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*/
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#include "drv_i2c.h"
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#include "drv_gpio.h"
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#include "raspi4.h"
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#include "mbox.h"
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/*
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* (3.3v) -1 2-
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* (SDA1/SDA3) -3 4-
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2021-03-14 12:58:10 +08:00
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* (SCL1/SCL3) -5 6-
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2020-11-28 18:27:24 +08:00
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* (SDA3) -7 8-
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* -9 10-
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* -11 12-
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* -13 14-
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* -15 16-
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* -17 18-
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* -19 20-
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* (SCL4) -21 22-
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* -23 24- (SDA4)
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* -25 26- (SCL4)
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* -27 28-
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* (SCL3) -29 30-
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* (SDA4) -31 32-
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*/
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#define DBG_TAG "drv.i2c"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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struct raspi_i2c_hw_config
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{
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rt_uint32_t bsc_num;
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rt_uint32_t bsc_rate;
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rt_uint32_t bsc_address;
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rt_uint32_t sda_pin;
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rt_uint32_t scl_pin;
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rt_uint32_t sda_mode;
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rt_uint32_t scl_mode;
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};
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rt_uint8_t i2c_read_or_write(volatile rt_uint32_t base, rt_uint8_t* buf, rt_uint32_t len, rt_uint8_t flag)
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{
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rt_uint32_t status;
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rt_uint32_t remaining = len;
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rt_uint32_t i = 0;
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rt_uint8_t reason = I2C_REASON_OK;
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/* Clear FIFO */
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BSC_C(base) |= (BSC_C_CLEAR_1 & BSC_C_CLEAR_1);
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/* Clear Status */
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BSC_S(base) = BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE;
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/* Set Data Length */
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BSC_DLEN(base) = len;
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if (flag)
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{
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/* Start read */
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BSC_C(base) = BSC_C_I2CEN | BSC_C_ST | BSC_C_READ;
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/* wait for transfer to complete */
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while (!(BSC_S(base) & BSC_S_DONE))
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{
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/* we must empty the FIFO as it is populated and not use any delay */
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while (remaining && (BSC_S(base) & BSC_S_RXD))
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{
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/* Read from FIFO, no barrier */
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buf[i] = BSC_FIFO(base);
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i++;
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remaining--;
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}
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}
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/* transfer has finished - grab any remaining stuff in FIFO */
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while (remaining && (BSC_S(base) & BSC_S_RXD))
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{
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/* Read from FIFO, no barrier */
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buf[i] = BSC_FIFO(base);
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i++;
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remaining--;
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}
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}
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else
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{
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LOG_D("i2c%d write start", flag);
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/* pre populate FIFO with max buffer */
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while (remaining && (i < BSC_FIFO_SIZE))
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{
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BSC_FIFO(base) = buf[i];
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i++;
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remaining--;
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}
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/* Enable device and start transfer */
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BSC_C(base) = BSC_C_I2CEN | BSC_C_ST;
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/* Transfer is over when BCM2835_BSC_S_DONE */
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while (!(BSC_S(base) & BSC_S_DONE))
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{
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while (remaining && (BSC_S(base) & BSC_S_TXD))
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{
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/* Write to FIFO */
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BSC_FIFO(base) = buf[i];
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i++;
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remaining--;
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}
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}
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LOG_D("i2c%d write end", flag);
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}
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status = BSC_S(base);
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if (status & BSC_S_ERR)
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{
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reason = I2C_REASON_ERROR_NACK;
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}
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else if (status & BSC_S_CLKT)
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{
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reason = I2C_REASON_ERROR_CLKT;
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}
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else if (remaining)
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{
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reason = I2C_REASON_ERROR_DATA;
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}
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BSC_C(base) |= (BSC_S_DONE & BSC_S_DONE);
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return reason;
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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2020-11-28 18:27:24 +08:00
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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rt_size_t i;
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rt_uint8_t reason;
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RT_ASSERT(bus != RT_NULL);
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struct raspi_i2c_hw_config *i2c_hw_config = (struct raspi_i2c_hw_config*)(bus->priv);
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//Slave Address
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BSC_A(i2c_hw_config->bsc_address) = msgs->addr;
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for (i = 0; i < num; i++)
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{
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if (msgs[i].flags & RT_I2C_RD)
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reason = i2c_read_or_write(i2c_hw_config->bsc_address, msgs->buf, msgs->len, 1);
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else
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reason = i2c_read_or_write(i2c_hw_config->bsc_address, msgs->buf, msgs->len, 0);
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}
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return (reason == 0)? i : 0;
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
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2020-11-28 18:27:24 +08:00
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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return 0;
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}
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static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
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2023-07-14 09:57:40 +08:00
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int cmd,
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void *args)
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2020-11-28 18:27:24 +08:00
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{
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return RT_EOK;
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}
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static rt_err_t raspi_i2c_configure(struct raspi_i2c_hw_config *cfg)
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{
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RT_ASSERT(cfg != RT_NULL);
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rt_uint32_t apb_clock = 0;
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prev_raspi_pin_mode(cfg->sda_pin, cfg->sda_mode);//sda
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prev_raspi_pin_mode(cfg->scl_pin, cfg->scl_mode);//scl
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/* use 0xFFFE mask to limit a max value and round down any odd number */
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apb_clock = bcm271x_mbox_clock_get_rate(CORE_CLK_ID);
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rt_uint32_t divider = (apb_clock / cfg->bsc_rate) & 0xFFFE;
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BSC_DIV(cfg->bsc_address) = (rt_uint16_t)divider;
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return RT_EOK;
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}
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static const struct rt_i2c_bus_device_ops raspi_i2c_ops =
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{
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.master_xfer = raspi_i2c_mst_xfer,
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.slave_xfer = raspi_i2c_slv_xfer,
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.i2c_bus_control = raspi_i2c_bus_control,
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};
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#if defined (BSP_USING_I2C0)
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#define I2C0_BUS_NAME "i2c0"
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static struct raspi_i2c_hw_config hw_device0 =
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{
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.bsc_num = 0,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC0_BASE,
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.sda_pin = GPIO_PIN_0,
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.scl_pin = GPIO_PIN_1,
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.sda_mode = ALT0,
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.scl_mode = ALT0,
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};
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struct rt_i2c_bus_device device0 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device0,
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};
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#endif
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#if defined (BSP_USING_I2C1)
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#define I2C1_BUS_NAME "i2c1"
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static struct raspi_i2c_hw_config hw_device1 =
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{
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.bsc_num = 1,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC1_BASE,
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.sda_pin = GPIO_PIN_2,
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.scl_pin = GPIO_PIN_3,
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.sda_mode = ALT0,
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.scl_mode = ALT0,
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};
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struct rt_i2c_bus_device device1 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device1,
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};
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#endif
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#if defined (BSP_USING_I2C3)
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#define I2C3_BUS_NAME "i2c3"
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static struct raspi_i2c_hw_config hw_device3 =
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{
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.bsc_num = 3,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC3_BASE,
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#ifndef BSP_USING_I2C3_0
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.sda_pin = GPIO_PIN_2,
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.scl_pin = GPIO_PIN_3,
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#else
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.sda_pin = GPIO_PIN_4,
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.scl_pin = GPIO_PIN_5,
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#endif
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.sda_mode = ALT5,
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.scl_mode = ALT5,
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};
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struct rt_i2c_bus_device device3 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device3,
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};
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#endif
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#if defined (BSP_USING_I2C4)
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#define I2C4_BUS_NAME "i2c4"
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static struct raspi_i2c_hw_config hw_device4 =
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{
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.bsc_num = 4,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC4_BASE,
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#ifdef BSP_USING_I2C4_0
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.sda_pin = GPIO_PIN_6,
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.scl_pin = GPIO_PIN_7,
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#else
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.sda_pin = GPIO_PIN_8,
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2021-03-14 12:58:10 +08:00
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.scl_pin = GPIO_PIN_9,
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2020-11-28 18:27:24 +08:00
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#endif
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.sda_mode = ALT5,
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.scl_mode = ALT5,
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};
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struct rt_i2c_bus_device device4 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device4,
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};
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#endif
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#if defined (BSP_USING_I2C5)
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#define I2C5_BUS_NAME "i2c5"
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static struct raspi_i2c_hw_config hw_device5 =
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{
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.bsc_num = 5,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC5_BASE,
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#ifdef BSP_USING_I2C5_0
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.sda_pin = GPIO_PIN_10,
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.scl_pin = GPIO_PIN_11,
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#else
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.sda_pin = GPIO_PIN_12,
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.scl_pin = GPIO_PIN_13,
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#endif
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.sda_mode = ALT5,
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.scl_mode = ALT5,
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};
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struct rt_i2c_bus_device device5 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device5,
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};
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#endif
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#if defined (BSP_USING_I2C6)
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#define I2C6_BUS_NAME "i2c6"
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static struct raspi_i2c_hw_config hw_device6 =
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{
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.bsc_num = 6,
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.bsc_rate = 100000,//100k
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.bsc_address = BSC6_BASE,
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#ifdef BSP_USING_I2C5_0
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.sda_pin = GPIO_PIN_0,
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.scl_pin = GPIO_PIN_1,
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#else
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.sda_pin = GPIO_PIN_22,
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.scl_pin = GPIO_PIN_23,
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#endif
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.sda_mode = ALT5,
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.scl_mode = ALT5,
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};
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struct rt_i2c_bus_device device6 =
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{
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.ops = &raspi_i2c_ops,
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.priv = (void *)&hw_device6,
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};
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#endif
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int rt_hw_i2c_init(void)
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{
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#if defined(BSP_USING_I2C0)
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raspi_i2c_configure(&hw_device0);
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rt_i2c_bus_device_register(&device0, I2C0_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C1)
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raspi_i2c_configure(&hw_device1);
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rt_i2c_bus_device_register(&device1, I2C1_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C3)
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raspi_i2c_configure(&hw_device3);
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rt_i2c_bus_device_register(&device3, I2C3_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C4)
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raspi_i2c_configure(&hw_device4);
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rt_i2c_bus_device_register(&device4, I2C4_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C5)
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raspi_i2c_configure(&hw_device5);
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rt_i2c_bus_device_register(&device5, I2C5_BUS_NAME);
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#endif
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#if defined(BSP_USING_I2C6)
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raspi_i2c_configure(&hw_device6);
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rt_i2c_bus_device_register(&device6, I2C6_BUS_NAME);
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#endif
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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