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rt-thread-official/bsp/rm48x50/HALCoGen/include/htu.h

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add rm48x50 bsp and libcpu We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.
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/** @file htu.h
* @brief HTU Driver Definition File
rm48x50: update HALCoGen file
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* @date 29.May.2013
* @version 03.05.02
add rm48x50 bsp and libcpu We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.
2013-05-24 10:04:51 +08:00
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __HTU_H__
#define __HTU_H__
#include "reg_htu.h"
/* HTU General Definitions */
#define HTU1PARLOC (*(volatile uint32 *)0xFF4E0200U)
#define HTU2PARLOC (*(volatile uint32 *)0xFF4C0200U)
#define HTU1RAMLOC (*(volatile uint32 *)0xFF4E0000U)
#define HTU2RAMLOC (*(volatile uint32 *)0xFF4C0000U)
#endif
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