1118 lines
30 KiB
C
1118 lines
30 KiB
C
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/**************************************************************************//**
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* @file pwm.c
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* @brief N9H30 series PWM driver source file
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include "N9H30.h"
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#include "nu_sys.h"
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#include "nu_pwm.h"
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/** @addtogroup N9H30_Device_Driver N9H30 Device Driver
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@{
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*/
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/** @addtogroup N9H30_PWM_Driver PWM Driver
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@{
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*/
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/** @addtogroup N9H30_PWM_EXPORTED_FUNCTIONS PWM Exported Functions
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@{
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*/
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//Internal function definition
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/// @cond HIDDEN_SYMBOLS
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void pwmISR(PVOID pvParam);
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static INT pwmInitGPIO(const INT nTimerIdentity, const INT nValue);
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static INT pwmInitTimer(const INT nTimerIdentity);
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static INT pwmStartTimer(const INT nTimerIdentity);
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static INT pwmStopTimer(const INT nTimerIdentity, const INT nMethod);
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// Register operation
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static INT pwmSetCP(const INT nTimerIdentity, const INT nValue);
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static INT pwmSetDZI(const INT nTimerIdentity, const INT nValue);
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static INT pwmSetCSR(const INT nTimerIdentity, const INT nValue);
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static INT pwmSetDZGenerator(const INT nTimerIdentity, const INT nStatus);
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static INT pwmSetTimerState(const INT nTimerIdentity, const INT nStatus);
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static INT pwmSetInverter(const INT nTimerIdentity, const INT nStatus);
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static INT pwmSetMode(const INT nTimerIdentity, const INT nStatus);
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static INT pwmSetCNR(const INT nTimerIdentity, const INT nValue);
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static INT pwmSetCMR(const INT nTimerIdentity, const INT nValue);
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static UINT pwmGetPDR(const INT nTimerIdentity);
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static INT pwmSetPIER(const INT nTimerIdentity, const INT value);
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static INT pwmCleanPIIR(const INT nTimerIdentity);
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//Global variable
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static BOOL bPWMIRQFlag = FALSE; //IRQ enable flag, set after PWM IRQ enable
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static BOOL bPWMTimerOpenStatus[PWM_TIMER_NUM]; //timer flag which set after open(for disable IRQ decision)
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static BOOL bPWMTimerStartStatus[PWM_TIMER_NUM]; //timer flag which set after Start count(to avoid incorrectly stop procedure)
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static BOOL bPWMTimerMode[PWM_TIMER_NUM]; //PWM timer toggle/one shot mode
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static BOOL volatile bPWMIntFlag[PWM_TIMER_NUM]; //interrupt flag which set by ISR
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/// @endcond /* HIDDEN_SYMBOLS */
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/**
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* @brief The init function of PWM device driver
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*/
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INT pwmInit(void)
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{
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UINT temp;
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// Enable PWM clock
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temp = inpw(REG_CLK_PCLKEN1);
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temp = temp | 0x8000000;
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outpw(REG_CLK_PCLKEN1, temp);
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sysInstallISR(IRQ_LEVEL_1, PWM_IRQn, (PVOID)pwmISR);
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sysSetLocalInterrupt(ENABLE_IRQ); // Enable CPSR I bit
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return 0;
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}
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/**
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* @brief The exit function of PWM device driver
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*/
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INT pwmExit(void)
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{
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return 0;
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}
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/**
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* @brief The open function of PWM device driver
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* @param[in] nTimerIdentity PWM Timer channel identity
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* @retval Successful PWM successfully opened
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* @retval pwmTimerBusy PWM timer already open
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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*/
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INT pwmOpen(const INT nTimerIdentity)
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{
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// nTimerIdentity value error
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}
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if (bPWMTimerOpenStatus[nTimerIdentity] == TRUE)
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{
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return pwmTimerBusy;
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}
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if (bPWMIRQFlag == FALSE)
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{
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sysEnableInterrupt(PWM_IRQn);
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bPWMIRQFlag = TRUE;
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}
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bPWMTimerOpenStatus[nTimerIdentity] = TRUE;
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// Set PWM timer default value(CSR->PPR->PCR->CMR->CNR)
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pwmInitTimer(nTimerIdentity);
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//Enable PIER
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pwmSetPIER(nTimerIdentity, PWM_ENABLE);
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//Reset PIIR
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pwmCleanPIIR(nTimerIdentity);
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//Reset PWM timer start count flag
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bPWMTimerStartStatus[nTimerIdentity] = FALSE;
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return Successful;
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}
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/**
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* @brief The close function of PWM device driver
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* @param[in] nTimerIdentity PWM Timer channel identity
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* @retval Successful PWM successfully closed
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* @retval pwmTimerNotOpen PWM timer not open
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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*/
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INT pwmClose(const INT nTimerIdentity)
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{
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INT nLoop;
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BOOL uAllTimerClose = TRUE;
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// nTimerIdentity value error
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}
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if (bPWMTimerOpenStatus[nTimerIdentity] == FALSE)
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{
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return pwmTimerNotOpen;
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}
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bPWMTimerOpenStatus[nTimerIdentity] = FALSE;
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//Check if all timer stop, IRQ can be disable
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for (nLoop = PWM_TIMER_MIN; nLoop < PWM_TIMER_NUM; nLoop++)
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{
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if (bPWMTimerOpenStatus[nLoop] == TRUE)
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{
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uAllTimerClose = FALSE;
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}
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}
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//All timer stop, disable IRQs
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if (uAllTimerClose == TRUE)
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{
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sysDisableInterrupt(PWM_IRQn);
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bPWMIRQFlag = FALSE;
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}
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pwmSetPIER(nTimerIdentity, PWM_DISABLE);
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pwmCleanPIIR(nTimerIdentity);
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return Successful;
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}
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/**
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* @brief The read function of PWM device driver
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* @param[in] nTimerIdentity PWM Timer channel identity
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* @param[out] pucStatusValue The point of typePWMSTATUS
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* @param[in] uLength The length of typePWMSTATUS
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* @retval Successful Read PWM value successfully
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* @retval pwmTimerNotOpen PWM timer not open
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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* @retval pwmInvalidStructLength Struct length error(struct type error)
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*/
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INT pwmRead(const INT nTimerIdentity, PUCHAR pucStatusValue, const UINT uLength)
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{
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// nTimerIdentity value error
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}
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if (bPWMTimerOpenStatus[nTimerIdentity] == FALSE)
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{
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return pwmTimerNotOpen;
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}
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if (uLength != sizeof(typePWMSTATUS))
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{
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return pwmInvalidStructLength;// Struct length error(struct type error)
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}
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if (sizeof(*((typePWMSTATUS *)pucStatusValue)) != sizeof(typePWMSTATUS))
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{
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return pwmInvalidStructLength;// Struct length error(struct type error)
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}
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((typePWMSTATUS *)pucStatusValue)->PDR = pwmGetPDR(nTimerIdentity);
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if (bPWMIntFlag[nTimerIdentity] == TRUE)
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{
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bPWMIntFlag[nTimerIdentity] = FALSE;
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((typePWMSTATUS *)pucStatusValue)->InterruptFlag = TRUE;
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}
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else
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{
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((typePWMSTATUS *)pucStatusValue)->InterruptFlag = FALSE;
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}
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return Successful;
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}
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/**
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* @brief The write function of PWM device driver
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* @param[in] nTimerIdentity PWM Timer channel identity
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* @param[in] pucCNRCMRValue The value of CNR and CMR
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* @param[in] uLength For future usage
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* @retval Successful Write PWM setting successfully
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* @retval pwmTimerNotOpen PWM timer not open
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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*/
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INT pwmWrite(const INT nTimerIdentity, PUCHAR pucCNRCMRValue, const UINT uLength)
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{
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typePWMVALUE pwmvalue;
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INT nStatus;
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// nTimerIdentity value error
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}
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if (bPWMTimerOpenStatus[nTimerIdentity] == FALSE)
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{
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return pwmTimerNotOpen;
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}
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if (uLength != sizeof(typePWMVALUE))
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{
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return pwmInvalidStructLength;// Struct length error(struct type error)
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}
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pwmvalue.value = ((typePWMVALUE *)pucCNRCMRValue)->value;
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nStatus = pwmSetCNR(nTimerIdentity, pwmvalue.field.cnr);
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if (nStatus != Successful)
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{
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return nStatus;
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}
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nStatus = pwmSetCMR(nTimerIdentity, pwmvalue.field.cmr);
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if (nStatus != Successful)
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{
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return nStatus;
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}
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return Successful;
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}
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/**
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* @brief The ioctl function of PWM device driver
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* @param[in] nTimerIdentity PWM Timer channel identity
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* @param[in] uCommand Ioctl command which indicates different operation
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* @param[in] uIndication Not use in PWM
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* @param[in] uValue The value which use with uCommand
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* @retval Successful PWM ioctl execute successfully
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* @retval pwmTimerNotOpen PWM timer not open
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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* @retval pwmInvalidIoctlCommand Ioctl command error
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* @retval Others Error according to different uCommand
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*/
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INT pwmIoctl(const INT nTimerIdentity, const UINT uCommand, const UINT uIndication, UINT uValue)
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{
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INT nStatus;
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// nTimerIdentity value error
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}
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if (bPWMTimerOpenStatus[nTimerIdentity] == FALSE)
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{
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return pwmTimerNotOpen;
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}
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switch (uCommand)
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{
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case START_PWMTIMER:
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{
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nStatus = pwmStartTimer(nTimerIdentity);
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break;
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}
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case STOP_PWMTIMER:
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{
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// default stop method is 2
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nStatus = pwmStopTimer(nTimerIdentity, PWM_STOP_METHOD2);
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break;
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}
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case SET_CSR:
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{
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nStatus = pwmSetCSR(nTimerIdentity, uValue);
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break;
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}
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case SET_CP:
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{
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nStatus = pwmSetCP(nTimerIdentity, uValue);
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break;
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}
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case SET_DZI:
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{
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nStatus = pwmSetDZI(nTimerIdentity, uValue);
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break;
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}
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case SET_INVERTER:
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{
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nStatus = pwmSetInverter(nTimerIdentity, uValue);
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break;
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}
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case SET_MODE:
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{
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nStatus = pwmSetMode(nTimerIdentity, uValue);
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break;
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}
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case ENABLE_DZ_GENERATOR:
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{
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nStatus = pwmSetDZGenerator(nTimerIdentity, PWM_ENABLE);
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break;
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}
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case DISABLE_DZ_GENERATOR:
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{
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nStatus = pwmSetDZGenerator(nTimerIdentity, PWM_DISABLE);
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break;
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}
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case ENABLE_PWMGPIOOUTPUT:
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{
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nStatus = pwmInitGPIO(nTimerIdentity, uValue);
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break;
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}
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default:
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{
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return pwmInvalidIoctlCommand;
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}
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}
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return nStatus;
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}
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/// @cond HIDDEN_SYMBOLS
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/**
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* @brief The interrupt service routines of PWM
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* @param[in] pvParam IRQ Parameter(not use in PWM)
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*/
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VOID pwmISR(PVOID pvParam)
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{
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INT i;
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UINT32 uRegisterValue = 0;
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uRegisterValue = inpw(REG_PWM_PIIR);// Get PIIR value
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for (i = 0; i < PWM_TIMER_NUM ; i++)
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{
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if (uRegisterValue & (1 << i))
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{
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bPWMIntFlag[i] = 1;
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outpw(REG_PWM_PIIR, (1 << i));
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}
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}
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}
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/**
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* @brief This function set corresponding GPIO as PWM function according to the
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* parameter nTimerIdentity
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* @param[in] nTimerIdentity Timer channel number
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* @retval Successful PWM init GPIO successfully
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* @retval pwmInvalidTimerChannel PWM Timer channel number error
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* @retval pwmInvalidPin PWM output pin setting error
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*/
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static INT pwmInitGPIO(const INT nTimerIdentity, const INT nValue)
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{
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UINT temp = 0;
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if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
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{
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return pwmInvalidTimerChannel;// Timer_num value error
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}
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if (nTimerIdentity == PWM_TIMER0)
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{
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if (nValue == PWM0_GPA12)
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{
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temp = inpw(REG_SYS_GPA_MFPH);
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temp = (temp & ~0x000F0000) | 0xD0000;
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outpw(REG_SYS_GPA_MFPH, temp);
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}
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else if (nValue == PWM0_GPB2)
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{
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temp = inpw(REG_SYS_GPB_MFPL);
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temp = (temp & ~0xF00) | 0xD00;
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outpw(REG_SYS_GPB_MFPL, temp);
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}
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else
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return pwmInvalidPin;
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}
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else if (nTimerIdentity == PWM_TIMER1)
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{
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if (nValue == PWM1_GPA13)
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{
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temp = inpw(REG_SYS_GPA_MFPH);
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temp = (temp & ~0x00F00000) | 0xD00000;
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outpw(REG_SYS_GPA_MFPH, temp);
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}
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else if (nValue == PWM1_GPB3)
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{
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temp = inpw(REG_SYS_GPB_MFPL);
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temp = (temp & ~0xF000) | 0xD000;
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outpw(REG_SYS_GPB_MFPL, temp);
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}
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else
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return pwmInvalidPin;
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}
|
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else if (nTimerIdentity == PWM_TIMER2)
|
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{
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if (nValue == PWM2_GPA14)
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{
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temp = inpw(REG_SYS_GPA_MFPH);
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temp = (temp & ~0x0F000000) | 0xD000000;
|
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outpw(REG_SYS_GPA_MFPH, temp);
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}
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else if (nValue == PWM2_GPH2)
|
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{
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temp = inpw(REG_SYS_GPH_MFPL);
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temp = (temp & ~0xF00) | 0xD00;
|
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outpw(REG_SYS_GPH_MFPL, temp);
|
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}
|
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|
else
|
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return pwmInvalidPin;
|
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}
|
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else
|
||
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{
|
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if (nValue == PWM3_GPA15)
|
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|
{
|
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temp = inpw(REG_SYS_GPA_MFPH);
|
||
|
temp = (temp & ~0xF0000000) | 0xD0000000;
|
||
|
outpw(REG_SYS_GPA_MFPH, temp);
|
||
|
}
|
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|
else if (nValue == PWM3_GPH3)
|
||
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{
|
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|
temp = inpw(REG_SYS_GPH_MFPL);
|
||
|
temp = (temp & ~0xF000) | 0xD000;
|
||
|
outpw(REG_SYS_GPH_MFPL, temp);
|
||
|
}
|
||
|
else
|
||
|
return pwmInvalidPin;
|
||
|
}
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* @brief This function initiates PWM timer n and set the default setting to CSR,
|
||
|
* PPR, PCR, CNR, CMR
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @retval Successful PWM init timer successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmInitTimer(const INT nTimerIdentity)
|
||
|
{
|
||
|
typePPR PWMPPR;
|
||
|
INT nStatus;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// nTimerIdentity value error
|
||
|
}
|
||
|
|
||
|
//Set CSR
|
||
|
nStatus = pwmSetCSR(nTimerIdentity, DEFAULT_CSR);
|
||
|
|
||
|
if (nStatus != Successful)
|
||
|
{
|
||
|
return nStatus;
|
||
|
}
|
||
|
|
||
|
//Set PPR
|
||
|
PWMPPR.value = (UINT)inpw(REG_PWM_PPR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
if (PWMPPR.field.cp0 == 0)
|
||
|
{
|
||
|
pwmSetCP(nTimerIdentity, DEFAULT_CP);
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
if (PWMPPR.field.cp0 == 0)
|
||
|
{
|
||
|
pwmSetCP(nTimerIdentity, DEFAULT_CP);
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
if (PWMPPR.field.cp1 == 0)
|
||
|
{
|
||
|
pwmSetCP(nTimerIdentity, DEFAULT_CP);
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
if (PWMPPR.field.cp1 == 0)
|
||
|
{
|
||
|
pwmSetCP(nTimerIdentity, DEFAULT_CP);
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
//Set PCR
|
||
|
nStatus = pwmSetMode(nTimerIdentity, DEFAULT_MODE);
|
||
|
|
||
|
if (nStatus != Successful)
|
||
|
{
|
||
|
return nStatus;
|
||
|
}
|
||
|
bPWMTimerMode[nTimerIdentity] = DEFAULT_MODE;
|
||
|
|
||
|
//Set CMR
|
||
|
nStatus = pwmSetCMR(nTimerIdentity, DEFAULT_CMR);
|
||
|
|
||
|
if (nStatus != Successful)
|
||
|
{
|
||
|
return nStatus;
|
||
|
}
|
||
|
|
||
|
//Set CNR
|
||
|
nStatus = pwmSetCNR(nTimerIdentity, DEFAULT_CNR);
|
||
|
|
||
|
if (nStatus != Successful)
|
||
|
{
|
||
|
return nStatus;
|
||
|
}
|
||
|
|
||
|
return Successful;
|
||
|
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* @brief This function starts PWM timer according to the parameter
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @retval Successful PWM start timer successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmStartTimer(const INT nTimerIdentity)
|
||
|
{
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
pwmSetTimerState(nTimerIdentity, PWM_ENABLE);
|
||
|
if (bPWMTimerMode[nTimerIdentity] == PWM_TOGGLE)
|
||
|
{
|
||
|
bPWMTimerStartStatus[nTimerIdentity] = TRUE;
|
||
|
}
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function stops PWM timer n using method 1, 2, or 3 according to the
|
||
|
* parameter nTimerIdentity and nStatus
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nMethod Stop PWM timer method
|
||
|
* @retval Successful PWM stop timer successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidStopMethod Stop method error
|
||
|
*/
|
||
|
static INT pwmStopTimer(const INT nTimerIdentity, INT nMethod)
|
||
|
{
|
||
|
typeCNR PWMCNR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
// Timer_num value error
|
||
|
return pwmInvalidTimerChannel;
|
||
|
}
|
||
|
//Can't stop before open PWM timer
|
||
|
if (bPWMTimerOpenStatus[nTimerIdentity] == FALSE)
|
||
|
{
|
||
|
return Successful;
|
||
|
}
|
||
|
// one shot mode didn't need stop procedure
|
||
|
if (bPWMTimerMode[nTimerIdentity] == PWM_ONESHOT)
|
||
|
{
|
||
|
return Successful;
|
||
|
}
|
||
|
// Timer stop already, no need to stop again
|
||
|
if (bPWMTimerStartStatus[nTimerIdentity] == FALSE)
|
||
|
{
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
// Set CNR as 0
|
||
|
PWMCNR.field.cnr = 0;
|
||
|
outpw(REG_PWM_CNR0 + (PWM_OFFSET * nTimerIdentity), PWMCNR.value);
|
||
|
|
||
|
switch (nMethod)
|
||
|
{
|
||
|
case PWM_STOP_METHOD1:
|
||
|
{
|
||
|
while (1)
|
||
|
{
|
||
|
if (pwmGetPDR(nTimerIdentity) == 0) // Wait PDR reach to 0
|
||
|
{
|
||
|
pwmSetTimerState(nTimerIdentity, PWM_DISABLE);// Disable pwm timer
|
||
|
bPWMIntFlag[nTimerIdentity] = FALSE;
|
||
|
bPWMTimerStartStatus[nTimerIdentity] = FALSE;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
case PWM_STOP_METHOD2:
|
||
|
{
|
||
|
while (1)
|
||
|
{
|
||
|
if (bPWMIntFlag[nTimerIdentity] == TRUE) // Wait interrupt happen
|
||
|
{
|
||
|
pwmSetTimerState(nTimerIdentity, PWM_DISABLE);// Disable pwm timer
|
||
|
bPWMIntFlag[nTimerIdentity] = FALSE;
|
||
|
bPWMTimerStartStatus[nTimerIdentity] = FALSE;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
/*case PWM_STOP_METHOD3:
|
||
|
{
|
||
|
pwmSetPCRState(nTimerIdentity, PWM_DISABLE);// Disable pwm timer
|
||
|
bPWMIntFlag[nTimerIdentity] = FALSE;
|
||
|
bPWMTimerStartStatus[nTimerIdentity] = FALSE;
|
||
|
break;
|
||
|
}*/
|
||
|
default:
|
||
|
{
|
||
|
return pwmInvalidStopMethod;// Stop method value error
|
||
|
}
|
||
|
}
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set CPn value according to the parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue The value which want to set in CSRn
|
||
|
* @retval Successful Set CPn successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidCPValue PWM_PPR CPn value out of range
|
||
|
*/
|
||
|
static INT pwmSetCP(const INT nTimerIdentity, const INT nValue)
|
||
|
{
|
||
|
typePPR PWMPPR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nValue < CP_MIN || nValue > CP_MAX)
|
||
|
{
|
||
|
return pwmInvalidCPValue;// CP value error
|
||
|
}
|
||
|
PWMPPR.value = (UINT)inpw(REG_PWM_PPR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPPR.field.cp0 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPPR.field.cp0 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPPR.field.cp1 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPPR.field.cp1 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PPR, PWMPPR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set DZIn value according to the parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue The value which want to set in DZIn
|
||
|
* @retval Successful Set DZIn successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidDZIValue PWM_PPR DZIn value out of range
|
||
|
*/
|
||
|
static INT pwmSetDZI(const INT nTimerIdentity, const INT nValue)
|
||
|
{
|
||
|
typePPR PWMPPR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nValue < DZI_MIN || nValue > DZI_MAX)
|
||
|
{
|
||
|
return pwmInvalidDZIValue;// CSR value error
|
||
|
}
|
||
|
PWMPPR.value = (UINT)inpw(REG_PWM_PPR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPPR.field.dzi0 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPPR.field.dzi0 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPPR.field.dzi1 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPPR.field.dzi1 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PPR, PWMPPR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set CSRn value according to the parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue The value which want to set in CSRn
|
||
|
* @retval Successful Set CSRn successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmSetCSR(const INT nTimerIdentity, const INT nValue)
|
||
|
{
|
||
|
typeCSR PWMCSR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nValue < CSR_MIN || nValue > CSR_MAX)
|
||
|
{
|
||
|
return pwmInvalidCSRValue;// CSR value error
|
||
|
}
|
||
|
PWMCSR.value = (UINT)inpw(REG_PWM_CSR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMCSR.field.csr0 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMCSR.field.csr1 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMCSR.field.csr2 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMCSR.field.csr3 = nValue;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_CSR, PWMCSR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function enable/disable PWM channel n dead zone function according to the
|
||
|
* parameter nTimerIdentity and nStatus
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nStatus PWMDZG_ENABLE/PWMDZG_DISABLE
|
||
|
* @retval Successful Set dead zone successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidDZGStatus PWM Dead-Zone Generator enable/disable status error
|
||
|
*/
|
||
|
static INT pwmSetDZGenerator(const INT nTimerIdentity, INT nStatus)
|
||
|
{
|
||
|
typePCR PWMPCR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nStatus != PWMDZG_ENABLE && nStatus != PWMDZG_DISABLE)
|
||
|
{
|
||
|
return pwmInvalidDZGStatus;// PCR inverter value error
|
||
|
}
|
||
|
PWMPCR.value = (UINT)inpw(REG_PWM_PCR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPCR.field.grpup0_dzen = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPCR.field.grpup0_dzen = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPCR.field.grpup1_dzen = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPCR.field.grpup1_dzen = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PCR, PWMPCR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set PWM channel n enable/disable according to the
|
||
|
* parameter nTimerIdentity and nStatus
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nStatus PWM_ENABLE/PWMDISABLE
|
||
|
* @retval Successful Set channel enable/disable successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmSetTimerState(const INT nTimerIdentity, INT nStatus)
|
||
|
{
|
||
|
typePCR PWMPCR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nStatus != PWM_ENABLE && nStatus != PWM_DISABLE)
|
||
|
{
|
||
|
return pwmInvalidTimerStatus;
|
||
|
}
|
||
|
PWMPCR.value = (UINT)inpw(REG_PWM_PCR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPCR.field.ch0_en = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPCR.field.ch1_en = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPCR.field.ch2_en = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPCR.field.ch3_en = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PCR, PWMPCR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* @brief This function set PWM channel n inverter on/off according to the
|
||
|
* parameter nTimerIdentity and nStatus
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nStatus PWM_ENABLE/PWM_DISABLE
|
||
|
* @retval Successful Set inverter successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidInverterValue Inverter value error
|
||
|
*/
|
||
|
static INT pwmSetInverter(const INT nTimerIdentity, INT nStatus)
|
||
|
{
|
||
|
typePCR PWMPCR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nStatus != PWM_INVON && nStatus != PWM_INVOFF)
|
||
|
{
|
||
|
return pwmInvalidInverterValue;// PCR inverter value error
|
||
|
}
|
||
|
PWMPCR.value = (UINT)inpw(REG_PWM_PCR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPCR.field.ch0_inverter = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPCR.field.ch1_inverter = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPCR.field.ch2_inverter = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPCR.field.ch3_inverter = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PCR, PWMPCR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set PWM channel n toggle/one shot mode according to the
|
||
|
* parameter nTimerIdentity and nStatus
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nStatus PWM_TOGGLE/PWM_ONESHOT
|
||
|
* @retval Successful Set operation mode successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidModeStatus Operating mode error
|
||
|
*/
|
||
|
static INT pwmSetMode(const INT nTimerIdentity, INT nStatus)
|
||
|
{
|
||
|
typePCR PWMPCR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nStatus != PWM_TOGGLE && nStatus != PWM_ONESHOT)
|
||
|
{
|
||
|
return pwmInvalidModeStatus;// PCR inverter value error
|
||
|
}
|
||
|
PWMPCR.value = (UINT)inpw(REG_PWM_PCR);
|
||
|
switch (nTimerIdentity)
|
||
|
{
|
||
|
case PWM_TIMER0:
|
||
|
{
|
||
|
PWMPCR.field.ch0_mode = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER1:
|
||
|
{
|
||
|
PWMPCR.field.ch1_mode = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER2:
|
||
|
{
|
||
|
PWMPCR.field.ch2_mode = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
case PWM_TIMER3:
|
||
|
{
|
||
|
PWMPCR.field.ch3_mode = nStatus;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
outpw(REG_PWM_PCR, PWMPCR.value);
|
||
|
bPWMTimerMode[nTimerIdentity] = nStatus;
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* @brief This function set PWM_CNRn value according to the parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue CNR value
|
||
|
* @retval Successful Set CNR successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidCNRValue Invalid CNR value
|
||
|
*/
|
||
|
static INT pwmSetCNR(const INT nTimerIdentity, INT nValue)
|
||
|
{
|
||
|
typeCNR PWMCNR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nValue < CNR_MIN || nValue > CNR_MAX)
|
||
|
{
|
||
|
return pwmInvalidCNRValue;// PCR inverter value error
|
||
|
}
|
||
|
PWMCNR.field.cnr = nValue;
|
||
|
outpw(REG_PWM_CNR0 + (PWM_OFFSET * nTimerIdentity), PWMCNR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set PWM_CMRn value according to the parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue CMR value
|
||
|
* @retval Successful Set CMR successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval pwmInvalidCMRValue Invalid CMR value
|
||
|
*/
|
||
|
static INT pwmSetCMR(const INT nTimerIdentity, INT nValue)
|
||
|
{
|
||
|
typeCMR PWMCMR;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
if (nValue < CMR_MIN || nValue > CMR_MAX)
|
||
|
{
|
||
|
return pwmInvalidCMRValue;// CMR value error
|
||
|
}
|
||
|
PWMCMR.field.cmr = nValue;
|
||
|
outpw(REG_PWM_CMR0 + (PWM_OFFSET * nTimerIdentity), PWMCMR.value);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function return the PDR value of PWM timer n
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
* @retval Others Current PDR value
|
||
|
*/
|
||
|
static UINT pwmGetPDR(const INT nTimerIdentity)
|
||
|
{
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
return (UINT)inpw(REG_PWM_PDR0 + (PWM_OFFSET * nTimerIdentity)); // Return PDR value
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function set the PIERn bit of PWM timer n as 1 or 0 according to the
|
||
|
* parameter nTimerIdentity and nValue
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @param[in] nValue PWM_ENABLE/PWM_DISABLE
|
||
|
* @retval Successful Set PIER successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmSetPIER(const INT nTimerIdentity, INT nValue)
|
||
|
{
|
||
|
UINT uRegisterValue = 0;;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// Timer_num value error
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
uRegisterValue = (UINT)inpw(REG_PWM_PIER);
|
||
|
if (nValue == PWM_ENABLE)
|
||
|
{
|
||
|
uRegisterValue = uRegisterValue | (1 << nTimerIdentity); // Set PIER
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
uRegisterValue = uRegisterValue & (0 << nTimerIdentity); // Clear PIER
|
||
|
}
|
||
|
outpw(REG_PWM_PIER, uRegisterValue);// Write value to PIER
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* @brief This function clear PIIRn bit according to the parameter nTimerIdentity
|
||
|
* @param[in] nTimerIdentity Timer channel number
|
||
|
* @retval Successful Clear PIIR successfully
|
||
|
* @retval pwmInvalidTimerChannel PWM Timer channel number error
|
||
|
*/
|
||
|
static INT pwmCleanPIIR(const INT nTimerIdentity)
|
||
|
{
|
||
|
UINT uRegisterValue = 0;
|
||
|
if (nTimerIdentity < PWM_TIMER_MIN || nTimerIdentity > PWM_TIMER_MAX)
|
||
|
{
|
||
|
return pwmInvalidTimerChannel;// nTimerIdentity value error
|
||
|
}
|
||
|
uRegisterValue = (UINT)inpw(REG_PWM_PIIR);
|
||
|
uRegisterValue = uRegisterValue & ~(1 << nTimerIdentity);
|
||
|
outpw(REG_PWM_PIIR, uRegisterValue);
|
||
|
|
||
|
return Successful;
|
||
|
}
|
||
|
|
||
|
/// @endcond /* HIDDEN_SYMBOLS */
|
||
|
|
||
|
/*@}*/ /* end of group N9H30_PWM_EXPORTED_FUNCTIONS */
|
||
|
|
||
|
/*@}*/ /* end of group N9H30_PWM_Driver */
|
||
|
|
||
|
/*@}*/ /* end of group N9H30_Device_Driver */
|
||
|
|
||
|
/*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/
|