2024-06-28 00:23:09 +08:00
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-03-25 Shell Trimming unecessary ops and
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* improve the performance of ctx switch
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*/
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#ifndef __ARM64_CONTEXT_H__
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#define __ARM64_CONTEXT_H__
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#include "../include/context_gcc.h"
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#include <rtconfig.h>
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#include <asm-generic.h>
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#include <asm-fpu.h>
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#include <armv8.h>
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2024-09-14 10:52:46 +08:00
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/* restore address space */
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.macro RESTORE_ADDRESS_SPACE
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2024-06-28 00:23:09 +08:00
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#ifdef RT_USING_SMART
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bl rt_thread_self
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mov x19, x0
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bl lwp_aspace_switch
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mov x0, x19
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bl lwp_user_setting_restore
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2024-09-14 10:52:46 +08:00
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#endif
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.endm
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.macro RESTORE_CONTEXT_SWITCH using_sp
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/* Set the SP to point to the stack of the task being restored. */
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mov sp, \using_sp
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RESTORE_ADDRESS_SPACE
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2024-06-28 00:23:09 +08:00
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_RESTORE_CONTEXT_SWITCH
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.endm
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.macro RESTORE_IRQ_CONTEXT
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#ifdef RT_USING_SMART
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BL rt_thread_self
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MOV X19, X0
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BL lwp_aspace_switch
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MOV X0, X19
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BL lwp_user_setting_restore
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#endif
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LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */
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TST X3, #0x1f
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MSR SPSR_EL1, X3
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MSR ELR_EL1, X2
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LDP X29, X30, [SP], #0x10
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MSR SP_EL0, X29
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LDP X28, X29, [SP], #0x10
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MSR FPCR, X28
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MSR FPSR, X29
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LDP X28, X29, [SP], #0x10
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LDP X26, X27, [SP], #0x10
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LDP X24, X25, [SP], #0x10
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LDP X22, X23, [SP], #0x10
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LDP X20, X21, [SP], #0x10
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LDP X18, X19, [SP], #0x10
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LDP X16, X17, [SP], #0x10
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LDP X14, X15, [SP], #0x10
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LDP X12, X13, [SP], #0x10
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LDP X10, X11, [SP], #0x10
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LDP X8, X9, [SP], #0x10
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LDP X6, X7, [SP], #0x10
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LDP X4, X5, [SP], #0x10
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LDP X2, X3, [SP], #0x10
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LDP X0, X1, [SP], #0x10
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RESTORE_FPU SP
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#ifdef RT_USING_SMART
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BEQ arch_ret_to_user
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#endif
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ERET
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.endm
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#endif /* __ARM64_CONTEXT_H__ */
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