2024-04-18 11:44:25 +08:00
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-04-08 QT-one first version
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*/
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#ifndef __HT32_MSP_H__
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#define __HT32_MSP_H__
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#include <rtthread.h>
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#include "ht32.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* UART gpio */
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#ifdef BSP_USING_UART
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#ifdef BSP_USING_USART0
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#define HTCFG_USART0_IPN USART0
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#define _HTCFG_USART0_TX_GPIOX A
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#define _HTCFG_USART0_TX_GPION 2
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#define _HTCFG_USART0_RX_GPIOX A
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#define _HTCFG_USART0_RX_GPION 3
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#define HTCFG_USART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_TX_GPIOX)
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#define HTCFG_USART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_TX_GPIOX)
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#define HTCFG_USART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_TX_GPIOX)
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#define HTCFG_USART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_TX_GPION)
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#define HTCFG_USART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_RX_GPIOX)
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#define HTCFG_USART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_RX_GPIOX)
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#define HTCFG_USART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_RX_GPIOX)
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#define HTCFG_USART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_RX_GPION)
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#endif
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#ifdef BSP_USING_USART1
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#define HTCFG_USART1_IPN USART1
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#define _HTCFG_USART1_TX_GPIOX A
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#define _HTCFG_USART1_TX_GPION 4
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#define _HTCFG_USART1_RX_GPIOX A
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#define _HTCFG_USART1_RX_GPION 5
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#define HTCFG_USART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_TX_GPIOX)
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#define HTCFG_USART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_TX_GPIOX)
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#define HTCFG_USART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_TX_GPIOX)
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#define HTCFG_USART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_TX_GPION)
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#define HTCFG_USART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_RX_GPIOX)
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#define HTCFG_USART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_RX_GPIOX)
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#define HTCFG_USART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_RX_GPIOX)
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#define HTCFG_USART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_RX_GPION)
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#endif
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#ifdef BSP_USING_UART0
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#define HTCFG_UART0_IPN UART0
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#define _HTCFG_UART0_TX_GPIOX B
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#define _HTCFG_UART0_TX_GPION 2
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#define _HTCFG_UART0_RX_GPIOX B
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#define _HTCFG_UART0_RX_GPION 3
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#define HTCFG_UART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_TX_GPIOX)
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#define HTCFG_UART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_TX_GPIOX)
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#define HTCFG_UART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_TX_GPIOX)
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#define HTCFG_UART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_TX_GPION)
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#define HTCFG_UART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_RX_GPIOX)
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#define HTCFG_UART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_RX_GPIOX)
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#define HTCFG_UART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_RX_GPIOX)
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#define HTCFG_UART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_RX_GPION)
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#endif
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#ifdef BSP_USING_UART1
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#define HTCFG_UART1_IPN UART1
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#define _HTCFG_UART1_TX_GPIOX B
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#define _HTCFG_UART1_TX_GPION 4
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#define _HTCFG_UART1_RX_GPIOX B
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#define _HTCFG_UART1_RX_GPION 5
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#define HTCFG_UART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_TX_GPIOX)
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#define HTCFG_UART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_TX_GPIOX)
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#define HTCFG_UART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_TX_GPIOX)
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#define HTCFG_UART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_TX_GPION)
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#define HTCFG_UART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_RX_GPIOX)
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#define HTCFG_UART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_RX_GPIOX)
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#define HTCFG_UART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_RX_GPIOX)
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#define HTCFG_UART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_RX_GPION)
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#endif
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#endif
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/* SPI gpio */
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#ifdef BSP_USING_SPI
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#ifdef BSP_USING_SPI0
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#define HTCFG_SPI0_IPN SPI0
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#define _HTCFG_SPI0_SCK_GPIOX C
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#define _HTCFG_SPI0_SCK_GPION 0
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#define _HTCFG_SPI0_MISO_GPIOX A
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#define _HTCFG_SPI0_MISO_GPION 11
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#define _HTCFG_SPI0_MOSI_GPIOX A
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#define _HTCFG_SPI0_MOSI_GPION 9
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#define HTCFG_SPI0_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_SCK_GPIOX)
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#define HTCFG_SPI0_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_SCK_GPIOX)
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#define HTCFG_SPI0_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_SCK_GPION)
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#define HTCFG_SPI0_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MISO_GPIOX)
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#define HTCFG_SPI0_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MISO_GPIOX)
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#define HTCFG_SPI0_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MISO_GPION)
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#define HTCFG_SPI0_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MOSI_GPIOX)
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#define HTCFG_SPI0_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MOSI_GPIOX)
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#define HTCFG_SPI0_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MOSI_GPION)
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#endif
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#ifdef BSP_USING_SPI1
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#define HTCFG_SPI1_IPN SPI1
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2024-06-19 23:00:12 +08:00
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#define _HTCFG_SPI1_SCK_GPIOX C
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#define _HTCFG_SPI1_SCK_GPION 5
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2024-06-19 23:00:12 +08:00
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#define _HTCFG_SPI1_MISO_GPIOX C
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#define _HTCFG_SPI1_MISO_GPION 9
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2024-06-19 23:00:12 +08:00
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#define _HTCFG_SPI1_MOSI_GPIOX C
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#define _HTCFG_SPI1_MOSI_GPION 8
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#define HTCFG_SPI1_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_SCK_GPIOX)
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#define HTCFG_SPI1_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_SCK_GPIOX)
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#define HTCFG_SPI1_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_SCK_GPION)
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#define HTCFG_SPI1_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MISO_GPIOX)
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#define HTCFG_SPI1_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MISO_GPIOX)
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#define HTCFG_SPI1_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MISO_GPION)
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#define HTCFG_SPI1_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MOSI_GPIOX)
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#define HTCFG_SPI1_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MOSI_GPIOX)
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#define HTCFG_SPI1_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MOSI_GPION)
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#endif
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#endif
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/* I2C gpio */
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2024-06-19 23:00:12 +08:00
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#ifdef BSP_USING_I2C_HW
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#ifdef BSP_USING_I2C0_HW
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#define HTCFG_I2C0_IPN I2C0
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#define _HTCFG_I2C0_SCL_GPIOX C
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#define _HTCFG_I2C0_SCL_GPION 12
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#define _HTCFG_I2C0_SDA_GPIOX C
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#define _HTCFG_I2C0_SDA_GPION 13
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#define HTCFG_I2C0_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SCL_GPIOX)
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#define HTCFG_I2C0_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SCL_GPIOX)
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#define HTCFG_I2C0_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SCL_GPION)
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#define HTCFG_I2C0_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SDA_GPIOX)
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#define HTCFG_I2C0_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SDA_GPIOX)
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#define HTCFG_I2C0_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SDA_GPION)
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#endif
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2024-06-19 23:00:12 +08:00
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#ifdef BSP_USING_I2C1_HW
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#define HTCFG_I2C1_IPN I2C1
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#define _HTCFG_I2C1_SCL_GPIOX A
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#define _HTCFG_I2C1_SCL_GPION 0
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#define _HTCFG_I2C1_SDA_GPIOX A
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#define _HTCFG_I2C1_SDA_GPION 1
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#define HTCFG_I2C1_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SCL_GPIOX)
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#define HTCFG_I2C1_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SCL_GPIOX)
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#define HTCFG_I2C1_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SCL_GPION)
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#define HTCFG_I2C1_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SDA_GPIOX)
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#define HTCFG_I2C1_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SDA_GPIOX)
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#define HTCFG_I2C1_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SDA_GPION)
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#endif
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#endif
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2024-06-19 23:00:12 +08:00
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/* ADC gpio */
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#ifdef BSP_USING_ADC
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#ifdef BSP_USING_ADC0
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#define HTCFG_ADC0_IPN ADC0
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#define _HTCFG_ADC0CH0_GPIOX A
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#define _HTCFG_ADC0CH0_AFION 0
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#define _HTCFG_ADC0CH1_GPIOX A
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#define _HTCFG_ADC0CH1_AFION 1
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#define _HTCFG_ADC0CH2_GPIOX A
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#define _HTCFG_ADC0CH2_AFION 2
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#define _HTCFG_ADC0CH3_GPIOX A
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#define _HTCFG_ADC0CH3_AFION 3
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#define _HTCFG_ADC0CH4_GPIOX A
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#define _HTCFG_ADC0CH4_AFION 4
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#define _HTCFG_ADC0CH5_GPIOX A
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#define _HTCFG_ADC0CH5_AFION 5
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#define _HTCFG_ADC0CH6_GPIOX A
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#define _HTCFG_ADC0CH6_AFION 6
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#define _HTCFG_ADC0CH7_GPIOX A
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#define _HTCFG_ADC0CH7_AFION 7
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#define _HTCFG_ADC0CH8_GPIOX C
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#define _HTCFG_ADC0CH8_AFION 4
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#define _HTCFG_ADC0CH9_GPIOX C
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#define _HTCFG_ADC0CH9_AFION 5
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#define _HTCFG_ADC0CH10_GPIOX C
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#define _HTCFG_ADC0CH10_AFION 8
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#define _HTCFG_ADC0CH11_GPIOX C
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#define _HTCFG_ADC0CH11_AFION 9
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#define _HTCFG_ADC0CH12_GPIOX C
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#define _HTCFG_ADC0CH12_AFION 1
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#define _HTCFG_ADC0CH13_GPIOX C
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#define _HTCFG_ADC0CH13_AFION 1
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#define _HTCFG_ADC0CH14_GPIOX C
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#define _HTCFG_ADC0CH14_AFION 1
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#define _HTCFG_ADC0CH15_GPIOX C
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#define _HTCFG_ADC0CH15_AFION 1
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#define HTCFG_ADC0CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH0_GPIOX)
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#define HTCFG_ADC0CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH1_GPIOX)
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#define HTCFG_ADC0CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH2_GPIOX)
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#define HTCFG_ADC0CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH3_GPIOX)
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#define HTCFG_ADC0CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH4_GPIOX)
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#define HTCFG_ADC0CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH5_GPIOX)
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#define HTCFG_ADC0CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH6_GPIOX)
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#define HTCFG_ADC0CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH7_GPIOX)
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#define HTCFG_ADC0CH8_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH8_GPIOX)
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#define HTCFG_ADC0CH9_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH9_GPIOX)
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#define HTCFG_ADC0CH10_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH10_GPIOX)
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#define HTCFG_ADC0CH11_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH11_GPIOX)
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#define HTCFG_ADC0CH12_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH12_GPIOX)
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#define HTCFG_ADC0CH13_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH13_GPIOX)
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#define HTCFG_ADC0CH14_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH14_GPIOX)
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#define HTCFG_ADC0CH15_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH15_GPIOX)
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#define HTCFG_ADC0CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH0_AFION)
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#define HTCFG_ADC0CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH1_AFION)
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#define HTCFG_ADC0CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH2_AFION)
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#define HTCFG_ADC0CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH3_AFION)
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#define HTCFG_ADC0CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH4_AFION)
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#define HTCFG_ADC0CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH5_AFION)
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#define HTCFG_ADC0CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH6_AFION)
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#define HTCFG_ADC0CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH7_AFION)
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#define HTCFG_ADC0CH8_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH8_AFION)
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#define HTCFG_ADC0CH9_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH9_AFION)
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#define HTCFG_ADC0CH10_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH10_AFION)
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#define HTCFG_ADC0CH11_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH11_AFION)
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#define HTCFG_ADC0CH12_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH12_AFION)
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#define HTCFG_ADC0CH13_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH13_AFION)
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#define HTCFG_ADC0CH14_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH14_AFION)
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#define HTCFG_ADC0CH15_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH15_AFION)
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#endif
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#ifdef BSP_USING_ADC1
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#define HTCFG_ADC1_IPN ADC1
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#define _HTCFG_ADC1CH0_GPIOX B
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#define _HTCFG_ADC1CH0_AFION 8
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#define _HTCFG_ADC1CH1_GPIOX A
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#define _HTCFG_ADC1CH1_AFION 0
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#define _HTCFG_ADC1CH2_GPIOX A
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#define _HTCFG_ADC1CH2_AFION 1
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#define _HTCFG_ADC1CH3_GPIOX A
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#define _HTCFG_ADC1CH3_AFION 2
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#define _HTCFG_ADC1CH4_GPIOX A
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#define _HTCFG_ADC1CH4_AFION 3
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#define _HTCFG_ADC1CH5_GPIOX A
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#define _HTCFG_ADC1CH5_AFION 4
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#define _HTCFG_ADC1CH6_GPIOX A
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#define _HTCFG_ADC1CH6_AFION 5
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#define _HTCFG_ADC1CH7_GPIOX A
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#define _HTCFG_ADC1CH7_AFION 6
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#define HTCFG_ADC1CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH0_GPIOX)
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#define HTCFG_ADC1CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH1_GPIOX)
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#define HTCFG_ADC1CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH2_GPIOX)
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#define HTCFG_ADC1CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH3_GPIOX)
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#define HTCFG_ADC1CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH4_GPIOX)
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#define HTCFG_ADC1CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH5_GPIOX)
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#define HTCFG_ADC1CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH6_GPIOX)
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#define HTCFG_ADC1CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH7_GPIOX)
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#define HTCFG_ADC1CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH0_AFION)
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#define HTCFG_ADC1CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH1_AFION)
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#define HTCFG_ADC1CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH2_AFION)
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#define HTCFG_ADC1CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH3_AFION)
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#define HTCFG_ADC1CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH4_AFION)
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#define HTCFG_ADC1CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH5_AFION)
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#define HTCFG_ADC1CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH6_AFION)
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#define HTCFG_ADC1CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH7_AFION)
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#endif
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#endif
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2024-04-18 11:44:25 +08:00
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void ht32_usart_gpio_init(void *instance);
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void ht32_spi_gpio_init(void *instance);
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2024-06-19 23:00:12 +08:00
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void ht32_hardware_i2c_gpio_init(void *instance);
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void ht32_adc_gpio_init(void *instance,int8_t channel);
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2024-04-18 11:44:25 +08:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HT32_MSP_H__ */
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