2017-10-26 15:39:32 +08:00
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_sai_edma.h"
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/*******************************************************************************
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* Definitations
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******************************************************************************/
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/* Used for 32byte aligned */
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#define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)address + 32) & ~0x1FU)
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/*<! Structure definition for uart_edma_private_handle_t. The structure is private. */
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typedef struct _sai_edma_private_handle
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{
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I2S_Type *base;
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sai_edma_handle_t *handle;
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} sai_edma_private_handle_t;
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enum _sai_edma_transfer_state
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{
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kSAI_Busy = 0x0U, /*!< SAI is busy */
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kSAI_Idle, /*!< Transfer is done. */
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};
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/*<! Private handle only used for internally. */
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static sai_edma_private_handle_t s_edmaPrivateHandle[FSL_FEATURE_SOC_I2S_COUNT][2];
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get the instance number for SAI.
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*
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* @param base SAI base pointer.
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*/
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extern uint32_t SAI_GetInstance(I2S_Type *base);
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/*!
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* @brief SAI EDMA callback for send.
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*
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* @param handle pointer to sai_edma_handle_t structure which stores the transfer state.
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* @param userData Parameter for user callback.
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* @param done If the DMA transfer finished.
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* @param tcds The TCD index.
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*/
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static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
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/*!
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* @brief SAI EDMA callback for receive.
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*
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* @param handle pointer to sai_edma_handle_t structure which stores the transfer state.
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* @param userData Parameter for user callback.
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* @param done If the DMA transfer finished.
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* @param tcds The TCD index.
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*/
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static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
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/*******************************************************************************
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* Code
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******************************************************************************/
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static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
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{
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sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
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sai_edma_handle_t *saiHandle = privHandle->handle;
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/* If finished a blcok, call the callback function */
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2018-03-29 15:39:31 +08:00
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saiHandle->saiQueue[saiHandle->queueDriver].dataSize = 0;
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2017-10-26 15:39:32 +08:00
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if (saiHandle->callback)
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{
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(saiHandle->callback)(privHandle->base, saiHandle, kStatus_SAI_TxIdle, saiHandle->userData);
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2018-03-29 15:39:31 +08:00
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}
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2018-03-28 12:27:04 +08:00
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saiHandle->queueDriver = (saiHandle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
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2017-10-26 15:39:32 +08:00
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/* If all data finished, just stop the transfer */
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if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
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{
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/* Disable DMA enable bit */
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SAI_TxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
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EDMA_AbortTransfer(handle);
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}
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}
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static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
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{
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sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
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sai_edma_handle_t *saiHandle = privHandle->handle;
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/* If finished a blcok, call the callback function */
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memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0, sizeof(sai_transfer_t));
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saiHandle->queueDriver = (saiHandle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
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if (saiHandle->callback)
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{
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(saiHandle->callback)(privHandle->base, saiHandle, kStatus_SAI_RxIdle, saiHandle->userData);
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}
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/* If all data finished, just stop the transfer */
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if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
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{
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/* Disable DMA enable bit */
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SAI_RxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
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EDMA_AbortTransfer(handle);
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}
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}
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void SAI_TransferTxCreateHandleEDMA(
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I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)
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{
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assert(handle && dmaHandle);
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uint32_t instance = SAI_GetInstance(base);
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/* Zero the handle */
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memset(handle, 0, sizeof(*handle));
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/* Set sai base to handle */
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handle->dmaHandle = dmaHandle;
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handle->callback = callback;
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handle->userData = userData;
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/* Set SAI state to idle */
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handle->state = kSAI_Idle;
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s_edmaPrivateHandle[instance][0].base = base;
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s_edmaPrivateHandle[instance][0].handle = handle;
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/* Need to use scatter gather */
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EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), SAI_XFER_QUEUE_SIZE);
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/* Install callback for Tx dma channel */
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EDMA_SetCallback(dmaHandle, SAI_TxEDMACallback, &s_edmaPrivateHandle[instance][0]);
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}
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void SAI_TransferRxCreateHandleEDMA(
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I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)
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{
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assert(handle && dmaHandle);
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uint32_t instance = SAI_GetInstance(base);
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/* Zero the handle */
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memset(handle, 0, sizeof(*handle));
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/* Set sai base to handle */
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handle->dmaHandle = dmaHandle;
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handle->callback = callback;
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handle->userData = userData;
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/* Set SAI state to idle */
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handle->state = kSAI_Idle;
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s_edmaPrivateHandle[instance][1].base = base;
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s_edmaPrivateHandle[instance][1].handle = handle;
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/* Need to use scatter gather */
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EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), SAI_XFER_QUEUE_SIZE);
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/* Install callback for Tx dma channel */
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EDMA_SetCallback(dmaHandle, SAI_RxEDMACallback, &s_edmaPrivateHandle[instance][1]);
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}
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void SAI_TransferTxSetFormatEDMA(I2S_Type *base,
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sai_edma_handle_t *handle,
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sai_transfer_format_t *format,
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uint32_t mclkSourceClockHz,
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uint32_t bclkSourceClockHz)
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{
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assert(handle && format);
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/* Configure the audio format to SAI registers */
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SAI_TxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
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/* Get the tranfer size from format, this should be used in EDMA configuration */
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if (format->bitWidth == 24U)
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{
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handle->bytesPerFrame = 4U;
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}
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else
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{
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handle->bytesPerFrame = format->bitWidth / 8U;
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}
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/* Update the data channel SAI used */
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handle->channel = format->channel;
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/* Clear the channel enable bits unitl do a send/receive */
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base->TCR3 &= ~I2S_TCR3_TCE_MASK;
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#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
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handle->count = FSL_FEATURE_SAI_FIFO_COUNT - format->watermark;
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#else
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handle->count = 1U;
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#endif /* FSL_FEATURE_SAI_FIFO_COUNT */
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}
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void SAI_TransferRxSetFormatEDMA(I2S_Type *base,
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sai_edma_handle_t *handle,
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sai_transfer_format_t *format,
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uint32_t mclkSourceClockHz,
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uint32_t bclkSourceClockHz)
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{
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assert(handle && format);
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/* Configure the audio format to SAI registers */
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SAI_RxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
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/* Get the tranfer size from format, this should be used in EDMA configuration */
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if (format->bitWidth == 24U)
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{
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handle->bytesPerFrame = 4U;
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}
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else
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{
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handle->bytesPerFrame = format->bitWidth / 8U;
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}
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/* Update the data channel SAI used */
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handle->channel = format->channel;
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/* Clear the channel enable bits unitl do a send/receive */
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base->RCR3 &= ~I2S_RCR3_RCE_MASK;
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#if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
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handle->count = format->watermark;
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#else
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handle->count = 1U;
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#endif /* FSL_FEATURE_SAI_FIFO_COUNT */
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}
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status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)
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{
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assert(handle && xfer);
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edma_transfer_config_t config = {0};
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uint32_t destAddr = SAI_TxGetDataRegisterAddress(base, handle->channel);
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/* Check if input parameter invalid */
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if ((xfer->data == NULL) || (xfer->dataSize == 0U))
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{
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return kStatus_InvalidArgument;
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}
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2018-03-29 15:39:31 +08:00
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if (handle->saiQueue[handle->queueUser].dataSize)
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2017-10-26 15:39:32 +08:00
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{
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return kStatus_SAI_QueueFull;
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}
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/* Change the state of handle */
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handle->state = kSAI_Busy;
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/* Update the queue state */
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handle->transferSize[handle->queueUser] = xfer->dataSize;
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handle->saiQueue[handle->queueUser].data = xfer->data;
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handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
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handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
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/* Prepare edma configure */
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EDMA_PrepareTransfer(&config, xfer->data, handle->bytesPerFrame, (void *)destAddr, handle->bytesPerFrame,
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handle->count * handle->bytesPerFrame, xfer->dataSize, kEDMA_MemoryToPeripheral);
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/* Store the initially configured eDMA minor byte transfer count into the SAI handle */
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handle->nbytes = handle->count * handle->bytesPerFrame;
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EDMA_SubmitTransfer(handle->dmaHandle, &config);
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/* Start DMA transfer */
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EDMA_StartTransfer(handle->dmaHandle);
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/* Enable DMA enable bit */
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SAI_TxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
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/* Enable SAI Tx clock */
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SAI_TxEnable(base, true);
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/* Enable the channel FIFO */
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base->TCR3 |= I2S_TCR3_TCE(1U << handle->channel);
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return kStatus_Success;
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}
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status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)
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{
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assert(handle && xfer);
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edma_transfer_config_t config = {0};
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uint32_t srcAddr = SAI_RxGetDataRegisterAddress(base, handle->channel);
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/* Check if input parameter invalid */
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if ((xfer->data == NULL) || (xfer->dataSize == 0U))
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{
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return kStatus_InvalidArgument;
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}
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if (handle->saiQueue[handle->queueUser].data)
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{
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return kStatus_SAI_QueueFull;
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}
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/* Change the state of handle */
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handle->state = kSAI_Busy;
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/* Update queue state */
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handle->transferSize[handle->queueUser] = xfer->dataSize;
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handle->saiQueue[handle->queueUser].data = xfer->data;
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handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
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handle->queueUser = (handle->queueUser + 1) % SAI_XFER_QUEUE_SIZE;
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/* Prepare edma configure */
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EDMA_PrepareTransfer(&config, (void *)srcAddr, handle->bytesPerFrame, xfer->data, handle->bytesPerFrame,
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handle->count * handle->bytesPerFrame, xfer->dataSize, kEDMA_PeripheralToMemory);
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/* Store the initially configured eDMA minor byte transfer count into the SAI handle */
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handle->nbytes = handle->count * handle->bytesPerFrame;
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EDMA_SubmitTransfer(handle->dmaHandle, &config);
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/* Start DMA transfer */
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EDMA_StartTransfer(handle->dmaHandle);
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/* Enable DMA enable bit */
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SAI_RxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
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/* Enable the channel FIFO */
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base->RCR3 |= I2S_RCR3_RCE(1U << handle->channel);
|
|
|
|
|
|
|
|
/* Enable SAI Rx clock */
|
|
|
|
SAI_RxEnable(base, true);
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|
|
|
|
|
|
|
return kStatus_Success;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SAI_TransferAbortSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
/* Disable dma */
|
|
|
|
EDMA_AbortTransfer(handle->dmaHandle);
|
|
|
|
|
|
|
|
/* Disable the channel FIFO */
|
|
|
|
base->TCR3 &= ~I2S_TCR3_TCE_MASK;
|
|
|
|
|
|
|
|
/* Disable DMA enable bit */
|
|
|
|
SAI_TxEnableDMA(base, kSAI_FIFORequestDMAEnable, false);
|
|
|
|
|
|
|
|
/* Disable Tx */
|
|
|
|
SAI_TxEnable(base, false);
|
|
|
|
|
|
|
|
/* Reset the FIFO pointer, at the same time clear all error flags if set */
|
|
|
|
base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK);
|
|
|
|
base->TCSR &= ~I2S_TCSR_SR_MASK;
|
|
|
|
|
|
|
|
/* Handle the queue index */
|
|
|
|
memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
|
|
|
|
handle->queueDriver = (handle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
|
|
|
|
|
|
|
|
/* Set the handle state */
|
|
|
|
handle->state = kSAI_Idle;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SAI_TransferAbortReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
/* Disable dma */
|
|
|
|
EDMA_AbortTransfer(handle->dmaHandle);
|
|
|
|
|
|
|
|
/* Disable the channel FIFO */
|
|
|
|
base->RCR3 &= ~I2S_RCR3_RCE_MASK;
|
|
|
|
|
|
|
|
/* Disable DMA enable bit */
|
|
|
|
SAI_RxEnableDMA(base, kSAI_FIFORequestDMAEnable, false);
|
|
|
|
|
|
|
|
/* Disable Rx */
|
|
|
|
SAI_RxEnable(base, false);
|
|
|
|
|
|
|
|
/* Reset the FIFO pointer, at the same time clear all error flags if set */
|
|
|
|
base->RCSR |= (I2S_RCSR_FR_MASK | I2S_RCSR_SR_MASK);
|
|
|
|
base->RCSR &= ~I2S_RCSR_SR_MASK;
|
|
|
|
|
|
|
|
/* Handle the queue index */
|
|
|
|
memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
|
|
|
|
handle->queueDriver = (handle->queueDriver + 1) % SAI_XFER_QUEUE_SIZE;
|
|
|
|
|
|
|
|
/* Set the handle state */
|
|
|
|
handle->state = kSAI_Idle;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
/* Abort the current transfer */
|
|
|
|
SAI_TransferAbortSendEDMA(base, handle);
|
|
|
|
|
|
|
|
/* Clear all the internal information */
|
|
|
|
memset(handle->tcd, 0U, sizeof(handle->tcd));
|
|
|
|
memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
|
|
|
|
memset(handle->transferSize, 0U, sizeof(handle->transferSize));
|
|
|
|
handle->queueUser = 0U;
|
|
|
|
handle->queueDriver = 0U;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
/* Abort the current transfer */
|
|
|
|
SAI_TransferAbortReceiveEDMA(base, handle);
|
|
|
|
|
|
|
|
/* Clear all the internal information */
|
|
|
|
memset(handle->tcd, 0U, sizeof(handle->tcd));
|
|
|
|
memset(handle->saiQueue, 0U, sizeof(handle->saiQueue));
|
|
|
|
memset(handle->transferSize, 0U, sizeof(handle->transferSize));
|
|
|
|
handle->queueUser = 0U;
|
|
|
|
handle->queueDriver = 0U;
|
|
|
|
}
|
|
|
|
|
|
|
|
status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
status_t status = kStatus_Success;
|
|
|
|
|
|
|
|
if (handle->state != kSAI_Busy)
|
|
|
|
{
|
|
|
|
status = kStatus_NoTransferInProgress;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
*count = (handle->transferSize[handle->queueDriver] -
|
|
|
|
(uint32_t)handle->nbytes *
|
|
|
|
EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)
|
|
|
|
{
|
|
|
|
assert(handle);
|
|
|
|
|
|
|
|
status_t status = kStatus_Success;
|
|
|
|
|
|
|
|
if (handle->state != kSAI_Busy)
|
|
|
|
{
|
|
|
|
status = kStatus_NoTransferInProgress;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
*count = (handle->transferSize[handle->queueDriver] -
|
|
|
|
(uint32_t)handle->nbytes *
|
|
|
|
EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|