2014-07-18 17:17:56 +08:00
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//*****************************************************************************
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//
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// i2c.h - Prototypes for the I2C Driver.
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//
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2021-06-26 12:37:09 +08:00
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// Copyright (c) 2005-2020 Texas Instruments Incorporated. All rights reserved.
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2014-07-18 17:17:56 +08:00
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// Software License Agreement
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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2021-06-26 12:37:09 +08:00
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// documentation and/or other materials provided with the
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2014-07-18 17:17:56 +08:00
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// distribution.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2021-06-26 12:37:09 +08:00
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//
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// This is part of revision 2.2.0.295 of the Tiva Peripheral Driver Library.
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2014-07-18 17:17:56 +08:00
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//
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//*****************************************************************************
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#ifndef __DRIVERLIB_I2C_H__
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#define __DRIVERLIB_I2C_H__
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// Defines for the API.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Interrupt defines.
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//
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//*****************************************************************************
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#define I2C_INT_MASTER 0x00000001
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#define I2C_INT_SLAVE 0x00000002
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//*****************************************************************************
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//
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// I2C Master commands.
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//
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//*****************************************************************************
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#define I2C_MASTER_CMD_SINGLE_SEND \
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0x00000007
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#define I2C_MASTER_CMD_SINGLE_RECEIVE \
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0x00000007
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#define I2C_MASTER_CMD_BURST_SEND_START \
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0x00000003
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#define I2C_MASTER_CMD_BURST_SEND_CONT \
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0x00000001
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#define I2C_MASTER_CMD_BURST_SEND_FINISH \
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0x00000005
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#define I2C_MASTER_CMD_BURST_SEND_STOP \
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0x00000004
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#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP \
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0x00000004
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#define I2C_MASTER_CMD_BURST_RECEIVE_START \
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0x0000000b
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#define I2C_MASTER_CMD_BURST_RECEIVE_CONT \
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0x00000009
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#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH \
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0x00000005
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#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP \
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0x00000004
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#define I2C_MASTER_CMD_QUICK_COMMAND \
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0x00000027
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#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND \
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0x00000013
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#define I2C_MASTER_CMD_FIFO_SINGLE_SEND \
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0x00000046
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#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE \
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0x00000046
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#define I2C_MASTER_CMD_FIFO_BURST_SEND_START \
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0x00000042
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#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT \
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0x00000040
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#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH \
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0x00000044
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#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP \
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0x00000004
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#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START \
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0x0000004a
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#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT \
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0x00000048
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#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH \
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0x00000044
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#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP \
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0x00000004
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//*****************************************************************************
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//
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// I2C Master glitch filter configuration.
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//
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//*****************************************************************************
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#define I2C_MASTER_GLITCH_FILTER_DISABLED \
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0
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#define I2C_MASTER_GLITCH_FILTER_1 \
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0x00010000
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#define I2C_MASTER_GLITCH_FILTER_2 \
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0x00020000
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#define I2C_MASTER_GLITCH_FILTER_3 \
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0x00030000
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#define I2C_MASTER_GLITCH_FILTER_4 \
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0x00040000
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#define I2C_MASTER_GLITCH_FILTER_8 \
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0x00050000
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#define I2C_MASTER_GLITCH_FILTER_16 \
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0x00060000
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#define I2C_MASTER_GLITCH_FILTER_32 \
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0x00070000
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//*****************************************************************************
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//
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// I2C Master error status.
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//
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//*****************************************************************************
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#define I2C_MASTER_ERR_NONE 0
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#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
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#define I2C_MASTER_ERR_DATA_ACK 0x00000008
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#define I2C_MASTER_ERR_ARB_LOST 0x00000010
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#define I2C_MASTER_ERR_CLK_TOUT 0x00000080
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//*****************************************************************************
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//
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// I2C Slave action requests
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//
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//*****************************************************************************
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#define I2C_SLAVE_ACT_NONE 0
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#define I2C_SLAVE_ACT_RREQ 0x00000001 // Master has sent data
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#define I2C_SLAVE_ACT_TREQ 0x00000002 // Master has requested data
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#define I2C_SLAVE_ACT_RREQ_FBR 0x00000005 // Master has sent first byte
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#define I2C_SLAVE_ACT_OWN2SEL 0x00000008 // Master requested secondary slave
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#define I2C_SLAVE_ACT_QCMD 0x00000010 // Master has sent a Quick Command
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#define I2C_SLAVE_ACT_QCMD_DATA 0x00000020 // Master Quick Command value
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//*****************************************************************************
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//
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// Miscellaneous I2C driver definitions.
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//
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//*****************************************************************************
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#define I2C_MASTER_MAX_RETRIES 1000 // Number of retries
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//*****************************************************************************
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//
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// I2C Master interrupts.
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//
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//*****************************************************************************
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#define I2C_MASTER_INT_RX_FIFO_FULL \
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0x00000800 // RX FIFO Full Interrupt
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#define I2C_MASTER_INT_TX_FIFO_EMPTY \
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0x00000400 // TX FIFO Empty Interrupt
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#define I2C_MASTER_INT_RX_FIFO_REQ \
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0x00000200 // RX FIFO Request Interrupt
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#define I2C_MASTER_INT_TX_FIFO_REQ \
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0x00000100 // TX FIFO Request Interrupt
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#define I2C_MASTER_INT_ARB_LOST \
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0x00000080 // Arb Lost Interrupt
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#define I2C_MASTER_INT_STOP 0x00000040 // Stop Condition Interrupt
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#define I2C_MASTER_INT_START 0x00000020 // Start Condition Interrupt
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#define I2C_MASTER_INT_NACK 0x00000010 // Addr/Data NACK Interrupt
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#define I2C_MASTER_INT_TX_DMA_DONE \
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0x00000008 // TX DMA Complete Interrupt
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#define I2C_MASTER_INT_RX_DMA_DONE \
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0x00000004 // RX DMA Complete Interrupt
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#define I2C_MASTER_INT_TIMEOUT 0x00000002 // Clock Timeout Interrupt
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#define I2C_MASTER_INT_DATA 0x00000001 // Data Interrupt
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//*****************************************************************************
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//
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// I2C Slave interrupts.
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//
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//*****************************************************************************
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#define I2C_SLAVE_INT_RX_FIFO_FULL \
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0x00000100 // RX FIFO Full Interrupt
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#define I2C_SLAVE_INT_TX_FIFO_EMPTY \
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0x00000080 // TX FIFO Empty Interrupt
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#define I2C_SLAVE_INT_RX_FIFO_REQ \
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0x00000040 // RX FIFO Request Interrupt
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#define I2C_SLAVE_INT_TX_FIFO_REQ \
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0x00000020 // TX FIFO Request Interrupt
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#define I2C_SLAVE_INT_TX_DMA_DONE \
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0x00000010 // TX DMA Complete Interrupt
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#define I2C_SLAVE_INT_RX_DMA_DONE \
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0x00000008 // RX DMA Complete Interrupt
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#define I2C_SLAVE_INT_STOP 0x00000004 // Stop Condition Interrupt
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#define I2C_SLAVE_INT_START 0x00000002 // Start Condition Interrupt
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#define I2C_SLAVE_INT_DATA 0x00000001 // Data Interrupt
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//*****************************************************************************
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//
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// I2C Slave FIFO configuration macros.
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//
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//*****************************************************************************
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#define I2C_SLAVE_TX_FIFO_ENABLE \
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0x00000002
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#define I2C_SLAVE_RX_FIFO_ENABLE \
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0x00000004
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//*****************************************************************************
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//
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// I2C FIFO configuration macros.
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//
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//*****************************************************************************
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#define I2C_FIFO_CFG_TX_MASTER 0x00000000
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#define I2C_FIFO_CFG_TX_SLAVE 0x00008000
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#define I2C_FIFO_CFG_RX_MASTER 0x00000000
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#define I2C_FIFO_CFG_RX_SLAVE 0x80000000
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#define I2C_FIFO_CFG_TX_MASTER_DMA \
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0x00002000
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#define I2C_FIFO_CFG_TX_SLAVE_DMA \
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0x0000a000
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#define I2C_FIFO_CFG_RX_MASTER_DMA \
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0x20000000
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#define I2C_FIFO_CFG_RX_SLAVE_DMA \
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0xa0000000
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#define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
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#define I2C_FIFO_CFG_TX_TRIG_1 0x00000001
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#define I2C_FIFO_CFG_TX_TRIG_2 0x00000002
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#define I2C_FIFO_CFG_TX_TRIG_3 0x00000003
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#define I2C_FIFO_CFG_TX_TRIG_4 0x00000004
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#define I2C_FIFO_CFG_TX_TRIG_5 0x00000005
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#define I2C_FIFO_CFG_TX_TRIG_6 0x00000006
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#define I2C_FIFO_CFG_TX_TRIG_7 0x00000007
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#define I2C_FIFO_CFG_TX_TRIG_8 0x00000008
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#define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
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#define I2C_FIFO_CFG_RX_TRIG_1 0x00010000
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#define I2C_FIFO_CFG_RX_TRIG_2 0x00020000
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#define I2C_FIFO_CFG_RX_TRIG_3 0x00030000
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#define I2C_FIFO_CFG_RX_TRIG_4 0x00040000
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#define I2C_FIFO_CFG_RX_TRIG_5 0x00050000
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#define I2C_FIFO_CFG_RX_TRIG_6 0x00060000
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#define I2C_FIFO_CFG_RX_TRIG_7 0x00070000
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#define I2C_FIFO_CFG_RX_TRIG_8 0x00080000
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//*****************************************************************************
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//
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// I2C FIFO status.
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//
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//*****************************************************************************
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#define I2C_FIFO_RX_BELOW_TRIG_LEVEL \
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0x00040000
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#define I2C_FIFO_RX_FULL 0x00020000
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#define I2C_FIFO_RX_EMPTY 0x00010000
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#define I2C_FIFO_TX_BELOW_TRIG_LEVEL \
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0x00000004
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#define I2C_FIFO_TX_FULL 0x00000002
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#define I2C_FIFO_TX_EMPTY 0x00000001
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//*****************************************************************************
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//
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// Prototypes for the APIs.
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//
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//*****************************************************************************
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2017-04-25 18:02:51 +08:00
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extern void I2CIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
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2014-07-18 17:17:56 +08:00
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extern void I2CIntUnregister(uint32_t ui32Base);
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extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
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extern void I2CTxFIFOFlush(uint32_t ui32Base);
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extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
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extern void I2CRxFIFOFlush(uint32_t ui32Base);
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extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
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extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
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extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
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uint8_t ui8Data);
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extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
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extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
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uint8_t *pui8Data);
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extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
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uint8_t ui8Length);
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extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
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extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
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uint32_t ui32Config);
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extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
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extern void I2CSlaveFIFODisable(uint32_t ui32Base);
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extern bool I2CMasterBusBusy(uint32_t ui32Base);
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extern bool I2CMasterBusy(uint32_t ui32Base);
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extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
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extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
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extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
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extern void I2CMasterDisable(uint32_t ui32Base);
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extern void I2CMasterEnable(uint32_t ui32Base);
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extern uint32_t I2CMasterErr(uint32_t ui32Base);
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extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
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bool bFast);
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extern void I2CMasterIntClear(uint32_t ui32Base);
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extern void I2CMasterIntDisable(uint32_t ui32Base);
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extern void I2CMasterIntEnable(uint32_t ui32Base);
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extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
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extern void I2CMasterIntEnableEx(uint32_t ui32Base,
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uint32_t ui32IntFlags);
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extern void I2CMasterIntDisableEx(uint32_t ui32Base,
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uint32_t ui32IntFlags);
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extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
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bool bMasked);
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extern void I2CMasterIntClearEx(uint32_t ui32Base,
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uint32_t ui32IntFlags);
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extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
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extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
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extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
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extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
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extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
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uint8_t ui8SlaveAddr,
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bool bReceive);
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extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
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extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
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extern void I2CSlaveDisable(uint32_t ui32Base);
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extern void I2CSlaveEnable(uint32_t ui32Base);
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extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
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extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
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uint8_t ui8SlaveAddr);
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extern void I2CSlaveIntClear(uint32_t ui32Base);
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extern void I2CSlaveIntDisable(uint32_t ui32Base);
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extern void I2CSlaveIntEnable(uint32_t ui32Base);
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extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
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uint32_t ui32IntFlags);
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extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
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extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
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bool bMasked);
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extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
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2017-04-25 18:02:51 +08:00
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extern void I2CLoopbackEnable(uint32_t ui32Base);
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2014-07-18 17:17:56 +08:00
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//*****************************************************************************
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//
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// Mark the end of the C bindings section for C++ compilers.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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}
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#endif
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#endif // __DRIVERLIB_I2C_H__
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