530 lines
17 KiB
C
530 lines
17 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_GPT_H_
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#define _FSL_GPT_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup gpt
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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#define FSL_GPT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
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/*@}*/
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/*!
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* @brief List of clock sources
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* @note Actual number of clock sources is SoC dependent
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*/
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typedef enum _gpt_clock_source
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{
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kGPT_ClockSource_Off = 0U, /*!< GPT Clock Source Off.*/
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kGPT_ClockSource_Periph = 1U, /*!< GPT Clock Source from Peripheral Clock.*/
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kGPT_ClockSource_HighFreq = 2U, /*!< GPT Clock Source from High Frequency Reference Clock.*/
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kGPT_ClockSource_Ext = 3U, /*!< GPT Clock Source from external pin.*/
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kGPT_ClockSource_LowFreq = 4U, /*!< GPT Clock Source from Low Frequency Reference Clock.*/
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kGPT_ClockSource_Osc = 5U, /*!< GPT Clock Source from Crystal oscillator.*/
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} gpt_clock_source_t;
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/*! @brief List of input capture channel number. */
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typedef enum _gpt_input_capture_channel
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{
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kGPT_InputCapture_Channel1 = 0U, /*!< GPT Input Capture Channel1.*/
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kGPT_InputCapture_Channel2 = 1U, /*!< GPT Input Capture Channel2.*/
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} gpt_input_capture_channel_t;
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/*! @brief List of input capture operation mode. */
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typedef enum _gpt_input_operation_mode
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{
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kGPT_InputOperation_Disabled = 0U, /*!< Don't capture.*/
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kGPT_InputOperation_RiseEdge = 1U, /*!< Capture on rising edge of input pin.*/
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kGPT_InputOperation_FallEdge = 2U, /*!< Capture on falling edge of input pin.*/
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kGPT_InputOperation_BothEdge = 3U, /*!< Capture on both edges of input pin.*/
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} gpt_input_operation_mode_t;
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/*! @brief List of output compare channel number. */
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typedef enum _gpt_output_compare_channel
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{
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kGPT_OutputCompare_Channel1 = 0U, /*!< Output Compare Channel1.*/
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kGPT_OutputCompare_Channel2 = 1U, /*!< Output Compare Channel2.*/
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kGPT_OutputCompare_Channel3 = 2U, /*!< Output Compare Channel3.*/
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} gpt_output_compare_channel_t;
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/*! @brief List of output compare operation mode. */
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typedef enum _gpt_output_operation_mode
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{
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kGPT_OutputOperation_Disconnected = 0U, /*!< Don't change output pin.*/
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kGPT_OutputOperation_Toggle = 1U, /*!< Toggle output pin.*/
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kGPT_OutputOperation_Clear = 2U, /*!< Set output pin low.*/
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kGPT_OutputOperation_Set = 3U, /*!< Set output pin high.*/
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kGPT_OutputOperation_Activelow = 4U, /*!< Generate a active low pulse on output pin.*/
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} gpt_output_operation_mode_t;
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/*! @brief List of GPT interrupts */
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typedef enum _gpt_interrupt_enable
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{
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kGPT_OutputCompare1InterruptEnable = GPT_IR_OF1IE_MASK, /*!< Output Compare Channel1 interrupt enable*/
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kGPT_OutputCompare2InterruptEnable = GPT_IR_OF2IE_MASK, /*!< Output Compare Channel2 interrupt enable*/
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kGPT_OutputCompare3InterruptEnable = GPT_IR_OF3IE_MASK, /*!< Output Compare Channel3 interrupt enable*/
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kGPT_InputCapture1InterruptEnable = GPT_IR_IF1IE_MASK, /*!< Input Capture Channel1 interrupt enable*/
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kGPT_InputCapture2InterruptEnable = GPT_IR_IF2IE_MASK, /*!< Input Capture Channel1 interrupt enable*/
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kGPT_RollOverFlagInterruptEnable = GPT_IR_ROVIE_MASK, /*!< Counter rolled over interrupt enable*/
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} gpt_interrupt_enable_t;
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/*! @brief Status flag. */
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typedef enum _gpt_status_flag
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{
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kGPT_OutputCompare1Flag = GPT_SR_OF1_MASK, /*!< Output compare channel 1 event.*/
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kGPT_OutputCompare2Flag = GPT_SR_OF2_MASK, /*!< Output compare channel 2 event.*/
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kGPT_OutputCompare3Flag = GPT_SR_OF3_MASK, /*!< Output compare channel 3 event.*/
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kGPT_InputCapture1Flag = GPT_SR_IF1_MASK, /*!< Input Capture channel 1 event.*/
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kGPT_InputCapture2Flag = GPT_SR_IF2_MASK, /*!< Input Capture channel 2 event.*/
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kGPT_RollOverFlag = GPT_SR_ROV_MASK, /*!< Counter reaches maximum value and rolled over to 0 event.*/
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} gpt_status_flag_t;
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/*! @brief Structure to configure the running mode. */
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typedef struct _gpt_init_config
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{
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gpt_clock_source_t clockSource; /*!< clock source for GPT module. */
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uint32_t divider; /*!< clock divider (prescaler+1) from clock source to counter. */
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bool enableFreeRun; /*!< true: FreeRun mode, false: Restart mode. */
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bool enableRunInWait; /*!< GPT enabled in wait mode. */
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bool enableRunInStop; /*!< GPT enabled in stop mode. */
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bool enableRunInDoze; /*!< GPT enabled in doze mode. */
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bool enableRunInDbg; /*!< GPT enabled in debug mode. */
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bool enableMode; /*!< true: counter reset to 0 when enabled;
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false: counter retain its value when enabled. */
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} gpt_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Initialize GPT to reset state and initialize running mode.
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*
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* @param base GPT peripheral base address.
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* @param initConfig GPT mode setting configuration.
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*/
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void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig);
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/*!
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* @brief Disables the module and gates the GPT clock.
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*
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* @param base GPT peripheral base address.
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*/
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void GPT_Deinit(GPT_Type *base);
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/*!
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* @brief Fills in the GPT configuration structure with default settings.
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*
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* The default values are:
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* @code
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* config->clockSource = kGPT_ClockSource_Periph;
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* config->divider = 1U;
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* config->enableRunInStop = true;
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* config->enableRunInWait = true;
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* config->enableRunInDoze = false;
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* config->enableRunInDbg = false;
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* config->enableFreeRun = true;
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* config->enableMode = true;
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* @endcode
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* @param config Pointer to the user configuration structure.
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*/
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void GPT_GetDefaultConfig(gpt_config_t *config);
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/*!
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* @name Software Reset
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* @{
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*/
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/*!
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* @brief Software reset of GPT module.
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*
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* @param base GPT peripheral base address.
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*/
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static inline void GPT_SoftwareReset(GPT_Type *base)
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{
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base->CR |= GPT_CR_SWR_MASK;
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/* Wait reset finished. */
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while ((base->CR & GPT_CR_SWR_MASK) == GPT_CR_SWR_MASK)
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{
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}
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}
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/*!
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* @name Clock source and frequency control
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* @{
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*/
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/*!
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* @brief Set clock source of GPT.
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*
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* @param base GPT peripheral base address.
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* @param source Clock source (see @ref gpt_clock_source_t typedef enumeration).
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*/
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static inline void GPT_SetClockSource(GPT_Type *base, gpt_clock_source_t source)
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{
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if (source == kGPT_ClockSource_Osc)
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{
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base->CR = (base->CR & ~GPT_CR_CLKSRC_MASK) | GPT_CR_EN_24M_MASK | GPT_CR_CLKSRC(source);
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}
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else
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{
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base->CR = (base->CR & ~(GPT_CR_CLKSRC_MASK | GPT_CR_EN_24M_MASK)) | GPT_CR_CLKSRC(source);
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}
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}
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/*!
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* @brief Get clock source of GPT.
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*
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* @param base GPT peripheral base address.
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* @return clock source (see @ref gpt_clock_source_t typedef enumeration).
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*/
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static inline gpt_clock_source_t GPT_GetClockSource(GPT_Type *base)
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{
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return (gpt_clock_source_t)((base->CR & GPT_CR_CLKSRC_MASK) >> GPT_CR_CLKSRC_SHIFT);
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}
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/*!
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* @brief Set pre scaler of GPT.
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*
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* @param base GPT peripheral base address.
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* @param divider Divider of GPT (1-4096).
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*/
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static inline void GPT_SetClockDivider(GPT_Type *base, uint32_t divider)
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{
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assert(divider - 1 <= GPT_PR_PRESCALER_MASK);
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base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(divider - 1);
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}
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/*!
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* @brief Get clock divider in GPT module.
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*
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* @param base GPT peripheral base address.
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* @return clock divider in GPT module (1-4096).
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*/
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static inline uint32_t GPT_GetClockDivider(GPT_Type *base)
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{
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return ((base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT) + 1;
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}
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/*!
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* @brief OSC 24M pre-scaler before selected by clock source.
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*
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* @param base GPT peripheral base address.
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* @param divider OSC Divider(1-16).
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*/
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static inline void GPT_SetOscClockDivider(GPT_Type *base, uint32_t divider)
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{
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assert(divider - 1 <= (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT));
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base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(divider - 1);
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}
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/*!
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* @brief Get OSC 24M clock divider in GPT module.
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*
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* @param base GPT peripheral base address.
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* @return OSC clock divider in GPT module (1-16).
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*/
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static inline uint32_t GPT_GetOscClockDivider(GPT_Type *base)
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{
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return ((base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT) + 1;
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}
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/*! @}*/
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/*!
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* @name Timer Start and Stop
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* @{
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*/
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/*!
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* @brief Start GPT timer.
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*
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* @param base GPT peripheral base address.
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*/
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static inline void GPT_StartTimer(GPT_Type *base)
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{
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base->CR |= GPT_CR_EN_MASK;
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}
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/*!
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* @brief Stop GPT timer.
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*
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* @param base GPT peripheral base address.
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*/
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static inline void GPT_StopTimer(GPT_Type *base)
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{
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base->CR &= ~GPT_CR_EN_MASK;
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}
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/*!
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* @name Read the timer period
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* @{
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*/
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/*!
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* @brief Reads the current GPT counting value.
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*
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* @param base GPT peripheral base address.
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* @return Current GPT counter value.
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*/
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static inline uint32_t GPT_GetCurrentTimerCount(GPT_Type *base)
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{
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return base->CNT;
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}
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/*@}*/
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/*!
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* @name GPT Input/Output Signal Control
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* @{
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*/
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/*!
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* @brief Set GPT operation mode of input capture channel.
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*
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* @param base GPT peripheral base address.
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* @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
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* @param mode GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
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*/
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static inline void GPT_SetInputOperationMode(GPT_Type *base,
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gpt_input_capture_channel_t channel,
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gpt_input_operation_mode_t mode)
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{
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assert(channel <= kGPT_InputCapture_Channel2);
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base->CR = (base->CR & ~(GPT_CR_IM1_MASK << (channel * 2))) | (GPT_CR_IM1(mode) << (channel * 2));
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}
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/*!
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* @brief Get GPT operation mode of input capture channel.
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*
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* @param base GPT peripheral base address.
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* @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
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* @return GPT input capture operation mode (see @ref gpt_input_operation_mode_t typedef enumeration).
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*/
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static inline gpt_input_operation_mode_t GPT_GetInputOperationMode(GPT_Type *base, gpt_input_capture_channel_t channel)
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{
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assert(channel <= kGPT_InputCapture_Channel2);
|
||
|
|
|
||
|
|
return (gpt_input_operation_mode_t)((base->CR >> (GPT_CR_IM1_SHIFT + channel * 2)) &
|
||
|
|
(GPT_CR_IM1_MASK >> GPT_CR_IM1_SHIFT));
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Get GPT input capture value of certain channel.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT capture channel (see @ref gpt_input_capture_channel_t typedef enumeration).
|
||
|
|
* @return GPT input capture value.
|
||
|
|
*/
|
||
|
|
static inline uint32_t GPT_GetInputCaptureValue(GPT_Type *base, gpt_input_capture_channel_t channel)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_InputCapture_Channel2);
|
||
|
|
|
||
|
|
return *(&base->ICR[0] + channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Set GPT operation mode of output compare channel.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
|
||
|
|
* @param mode GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
|
||
|
|
*/
|
||
|
|
static inline void GPT_SetOutputOperationMode(GPT_Type *base,
|
||
|
|
gpt_output_compare_channel_t channel,
|
||
|
|
gpt_output_operation_mode_t mode)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_OutputCompare_Channel3);
|
||
|
|
|
||
|
|
base->CR = (base->CR & ~(GPT_CR_OM1_MASK << (channel * 3))) | (GPT_CR_OM1(mode) << (channel * 3));
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Get GPT operation mode of output compare channel.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
|
||
|
|
* @return GPT output operation mode (see @ref gpt_output_operation_mode_t typedef enumeration).
|
||
|
|
*/
|
||
|
|
static inline gpt_output_operation_mode_t GPT_GetOutputOperationMode(GPT_Type *base,
|
||
|
|
gpt_output_compare_channel_t channel)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_OutputCompare_Channel3);
|
||
|
|
|
||
|
|
return (gpt_output_operation_mode_t)((base->CR >> (GPT_CR_OM1_SHIFT + channel * 3)) &
|
||
|
|
(GPT_CR_OM1_MASK >> GPT_CR_OM1_SHIFT));
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Set GPT output compare value of output compare channel.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
|
||
|
|
* @param value GPT output compare value.
|
||
|
|
*/
|
||
|
|
static inline void GPT_SetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel, uint32_t value)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_OutputCompare_Channel3);
|
||
|
|
|
||
|
|
*(&base->OCR[0] + channel) = value;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Get GPT output compare value of output compare channel.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
|
||
|
|
* @return GPT output compare value.
|
||
|
|
*/
|
||
|
|
static inline uint32_t GPT_GetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_OutputCompare_Channel3);
|
||
|
|
|
||
|
|
return *(&base->OCR[0] + channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Force GPT output action on output compare channel, ignoring comparator.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param channel GPT output compare channel (see @ref gpt_output_compare_channel_t typedef enumeration).
|
||
|
|
*/
|
||
|
|
static inline void GPT_ForceOutput(GPT_Type *base, gpt_output_compare_channel_t channel)
|
||
|
|
{
|
||
|
|
assert(channel <= kGPT_OutputCompare_Channel3);
|
||
|
|
|
||
|
|
base->CR |= (GPT_CR_FO1_MASK << channel);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*@}*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name GPT Interrupt and Status Interface
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Enables the selected GPT interrupts.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param mask The interrupts to enable. This is a logical OR of members of the
|
||
|
|
* enumeration ::gpt_interrupt_enable_t
|
||
|
|
*/
|
||
|
|
static inline void GPT_EnableInterrupts(GPT_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
base->IR |= mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Disables the selected GPT interrupts.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address
|
||
|
|
* @param mask The interrupts to disable. This is a logical OR of members of the
|
||
|
|
* enumeration ::gpt_interrupt_enable_t
|
||
|
|
*/
|
||
|
|
static inline void GPT_DisableInterrupts(GPT_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
base->IR &= ~mask;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the enabled GPT interrupts.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address
|
||
|
|
*
|
||
|
|
* @return The enabled interrupts. This is the logical OR of members of the
|
||
|
|
* enumeration ::gpt_interrupt_enable_t
|
||
|
|
*/
|
||
|
|
static inline uint32_t GPT_GetEnabledInterrupts(GPT_Type *base)
|
||
|
|
{
|
||
|
|
return (base->IR & (GPT_IR_OF1IE_MASK | GPT_IR_OF2IE_MASK | GPT_IR_OF3IE_MASK | GPT_IR_IF1IE_MASK |
|
||
|
|
GPT_IR_IF2IE_MASK | GPT_IR_ROVIE_MASK));
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name Status Interface
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Get GPT status flags.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
|
||
|
|
* @return GPT status, each bit represents one status flag.
|
||
|
|
*/
|
||
|
|
static inline uint32_t GPT_GetStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
|
||
|
|
{
|
||
|
|
return base->SR & flags;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Clears the GPT status flags.
|
||
|
|
*
|
||
|
|
* @param base GPT peripheral base address.
|
||
|
|
* @param flags GPT status flag mask (see @ref gpt_status_flag_t for bit definition).
|
||
|
|
*/
|
||
|
|
static inline void GPT_ClearStatusFlags(GPT_Type *base, gpt_status_flag_t flags)
|
||
|
|
{
|
||
|
|
base->SR = flags;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*@}*/
|
||
|
|
|
||
|
|
#if defined(__cplusplus)
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*! @}*/
|
||
|
|
|
||
|
|
#endif /* _FSL_GPT_H_ */
|