rt-thread-official/bsp/sep4020/sep4020.h

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/*************************************************************************************
*
* File name: sep4020.h
*
* Change Logs:
* Date Author Notes
* 2010-03-17 zchong first version
**************************************************************************************/
#ifndef __SEP4020_H__
#define __SEP4020_H__
/*************************************
macros for INTC
*************************************/
/*interrupt resources */
#define INTGLOBAL 32
#define INT_RTC 31
#define INT_DMAC 30
#define INT_EMI 29
#define INT_MAC 28
#define INT_TIMER1 27
#define INT_TIMER2 26
#define INT_TIMER3 25
#define INT_UART0 24
#define INT_UART1 23
#define INT_UART2 22
#define INT_UART3 21
#define INT_PWM 20
#define INT_LCDC 19
#define INT_I2S 18
#define INT_SSI 17
#define INT_NOTUSED16 16
#define INT_USB 15
#define INT_SMC0 14
#define INT_SMC1 13
#define INT_SDIO 12
#define INT_EXINT10 11
#define INT_EXINT9 10
#define INT_EXINT8 9
#define INT_EXINT7 8
#define INT_EXINT6 7
#define INT_EXINT5 6
#define INT_EXINT4 5
#define INT_EXINT3 4
#define INT_EXINT2 3
#define INT_EXINT1 2
#define INT_EXINT0 1
#define INT_NOTUSED0 0
/******************************************************************************************
* INTCģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10000000
******************************************************************************************/
#define INTC_IER (*(volatile unsigned *)0x10000000) /* IRQ interrupt enable register */
#define INTC_IMR (*(volatile unsigned *)0x10000008) /* IRQ interrupt mask register */
#define INTC_IFR (*(volatile unsigned *)0x10000010) /* IRQ<52><51><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD>жϼĴ<CFBC><C4B4><EFBFBD> */
#define INTC_IRSR (*(volatile unsigned *)0x10000018) /* IRQδ<51><CEB4><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_ISR (*(volatile unsigned *)0x10000020) /* IRQ<52>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_IMSR (*(volatile unsigned *)0x10000028) /* IRQ<52><51><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_IFSR (*(volatile unsigned *)0x10000030) /* IRQ<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_FIER (*(volatile unsigned *)0x100000C0) /* FIQ<49>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_FIMR (*(volatile unsigned *)0x100000C4) /* FIQ<49>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>μĴ<CEBC><C4B4><EFBFBD> */
#define INTC_FIFR (*(volatile unsigned *)0x100000C8) /* FIQ<49><51><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD>жϼĴ<CFBC><C4B4><EFBFBD> */
#define INTC_FIRSR (*(volatile unsigned *)0x100000CC) /* FIQδ<51><CEB4><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_FISR (*(volatile unsigned *)0x100000D0) /* FIQ<49>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_FIFSR (*(volatile unsigned *)0x100000D4) /* FIQ<49>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_IPLR (*(volatile unsigned *)0x100000D8) /* IRQ<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define INTC_ICR1 (*(volatile unsigned *)0x100000DC) /* IRQ<52>ڲ<EFBFBD><DAB2>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>1 */
#define INTC_ICR2 (*(volatile unsigned *)0x100000E0) /* IRQ<52>ڲ<EFBFBD><DAB2>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>2 */
#define INTC_EXICR1 (*(volatile unsigned *)0x100000E4) /* IRQ<52>ⲿ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>1 */
#define INTC_EXICR2 (*(volatile unsigned *)0x100000E8) /* IRQ<52>ⲿ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>2 */
/******************************************************************************************
* PMCģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10001000
******************************************************************************************/
#define PMC_PLTR (*(volatile unsigned *)0x10001000) /* PLL<4C><4C><EFBFBD>ȶ<EFBFBD><C8B6><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> */
#define PMC_PMCR (*(volatile unsigned *)0x10001004) /* ϵͳ<CFB5><CDB3>ʱ<EFBFBD><CAB1>PLL<4C>Ŀ<EFBFBD><C4BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PMC_PUCR (*(volatile unsigned *)0x10001008) /* USBʱ<42><CAB1>PLL<4C>Ŀ<EFBFBD><C4BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PMC_PCSR (*(volatile unsigned *)0x1000100C) /* <20>ڲ<EFBFBD>ģ<EFBFBD><C4A3>ʱ<EFBFBD><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PMC_PDSLOW (*(volatile unsigned *)0x10001010) /* SLOW״̬<D7B4><CCAC>ʱ<EFBFBD>ӵķ<D3B5>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD> */
#define PMC_PMDR (*(volatile unsigned *)0x10001014) /* оƬ<D0BE><C6AC><EFBFBD><EFBFBD>ģʽ<C4A3>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PMC_RCTR (*(volatile unsigned *)0x10001018) /* Reset<65><74><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PMC_CLRWAKUP (*(volatile unsigned *)0x1000101C) /* WakeUp<55><70><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* RTCģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10002000
******************************************************************************************/
#define RTC_STA_YMD (*(volatile unsigned *)0x10002000) /* <20><>, <20><>, <20>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_STA_HMS (*(volatile unsigned *)0x10002004) /* Сʱ, <20><><EFBFBD><EFBFBD>, <20><><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_ALARM_ALL (*(volatile unsigned *)0x10002008) /* <20><>ʱ<EFBFBD><CAB1>, <20><>, ʱ, <20>ּĴ<D6BC><C4B4><EFBFBD> */
#define RTC_CTR (*(volatile unsigned *)0x1000200C) /* <20><><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define RTC_INT_EN (*(volatile unsigned *)0x10002010) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define RTC_INT_STS (*(volatile unsigned *)0x10002014) /* <20>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_SAMP (*(volatile unsigned *)0x10002018) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define RTC_WD_CNT (*(volatile unsigned *)0x1000201C) /* Watch-Dog<6F><67><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_WD_SEV (*(volatile unsigned *)0x10002020) /* Watch-Dog<6F><67><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_CONFIG_CHECK (*(volatile unsigned *)0x10002024) /* <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ȷ<EFBFBD>ϼĴ<CFBC><C4B4><EFBFBD> (<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>֮ǰ<D6AE><C7B0>д0xaaaaaaaa) */
#define RTC_SOFTRESET (*(volatile unsigned *)0x10002028) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>, 4020<32>б<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD> */
#define RTC_KEY0 (*(volatile unsigned *)0x1000202C) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>0, 4020<32><30>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define RTC_KEY1 (*(volatile unsigned *)0x10002030) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>1 */
#define RTC_KEY2 (*(volatile unsigned *)0x10002034) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>2 */
#define RTC_KEY3 (*(volatile unsigned *)0x10002038) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>3 */
#define RTC_KEY4 (*(volatile unsigned *)0x1000203C) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>4 */
#define RTC_KEY5 (*(volatile unsigned *)0x10002040) /* <20><>Կ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>5 */
/******************************************************************************************
* TIMERģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10003000
******************************************************************************************/
#define TIMER_T1LCR (*(volatile unsigned *)0x10003000) /* ͨ<><CDA8>1<EFBFBD><31><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T1CCR (*(volatile unsigned *)0x10003004) /* ͨ<><CDA8>1<EFBFBD><31>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T1CR (*(volatile unsigned *)0x10003008) /* ͨ<><CDA8>1<EFBFBD><31><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T1ISCR (*(volatile unsigned *)0x1000300C) /* ͨ<><CDA8>1<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T1IMSR (*(volatile unsigned *)0x10003010) /* ͨ<><CDA8>1<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T2LCR (*(volatile unsigned *)0x10003020) /* ͨ<><CDA8>2<EFBFBD><32><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T2CCR (*(volatile unsigned *)0x10003024) /* ͨ<><CDA8>2<EFBFBD><32>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T2CR (*(volatile unsigned *)0x10003028) /* ͨ<><CDA8>2<EFBFBD><32><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T2ISCR (*(volatile unsigned *)0x1000302C) /* ͨ<><CDA8>2<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T2IMSR (*(volatile unsigned *)0x10003030) /* ͨ<><CDA8>2<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T3LCR (*(volatile unsigned *)0x10003040) /* ͨ<><CDA8>3<EFBFBD><33><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T3CCR (*(volatile unsigned *)0x10003044) /* ͨ<><CDA8>3<EFBFBD><33>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T3CR (*(volatile unsigned *)0x10003048) /* ͨ<><CDA8>3<EFBFBD><33><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T3ISCR (*(volatile unsigned *)0x1000304C) /* ͨ<><CDA8>3<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T3IMSR (*(volatile unsigned *)0x10003050) /* ͨ<><CDA8>3<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T3CAPR (*(volatile unsigned *)0x10003054) /* ͨ<><CDA8>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T4LCR (*(volatile unsigned *)0x10003060) /* ͨ<><CDA8>4<EFBFBD><34><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T4CCR (*(volatile unsigned *)0x10003064) /* ͨ<><CDA8>4<EFBFBD><34>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T4CR (*(volatile unsigned *)0x10003068) /* ͨ<><CDA8>4<EFBFBD><34><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T4ISCR (*(volatile unsigned *)0x1000306C) /* ͨ<><CDA8>4<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T4IMSR (*(volatile unsigned *)0x10003070) /* ͨ<><CDA8>4<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T4CAPR (*(volatile unsigned *)0x10003074) /* ͨ<><CDA8>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T5LCR (*(volatile unsigned *)0x10003080) /* ͨ<><CDA8>5<EFBFBD><35><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T5CCR (*(volatile unsigned *)0x10003084) /* ͨ<><CDA8>5<EFBFBD><35>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T5CR (*(volatile unsigned *)0x10003088) /* ͨ<><CDA8>5<EFBFBD><35><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T5ISCR (*(volatile unsigned *)0x1000308C) /* ͨ<><CDA8>5<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T5IMSR (*(volatile unsigned *)0x10003090) /* ͨ<><CDA8>5<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T5CAPR (*(volatile unsigned *)0x10003094) /* ͨ<><CDA8>5<EFBFBD><35><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T6LCR (*(volatile unsigned *)0x100030A0) /* ͨ<><CDA8>6<EFBFBD><36><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T6CCR (*(volatile unsigned *)0x100030A4) /* ͨ<><CDA8>6<EFBFBD><36>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T6CR (*(volatile unsigned *)0x100030A8) /* ͨ<><CDA8>6<EFBFBD><36><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T6ISCR (*(volatile unsigned *)0x100030AC) /* ͨ<><CDA8>6<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T6IMSR (*(volatile unsigned *)0x100030B0) /* ͨ<><CDA8>6<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T6CAPR (*(volatile unsigned *)0x100030B4) /* ͨ<><CDA8>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T7LCR (*(volatile unsigned *)0x100030C0) /* ͨ<><CDA8>7<EFBFBD><37><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T7CCR (*(volatile unsigned *)0x100030C4) /* ͨ<><CDA8>7<EFBFBD><37>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T7CR (*(volatile unsigned *)0x100030C8) /* ͨ<><CDA8>7<EFBFBD><37><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T7ISCR (*(volatile unsigned *)0x100030CC) /* ͨ<><CDA8>7<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T7IMSR (*(volatile unsigned *)0x100030D0) /* ͨ<><CDA8>7<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T8LCR (*(volatile unsigned *)0x100030E0) /* ͨ<><CDA8>8<EFBFBD><38><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T8CCR (*(volatile unsigned *)0x100030E4) /* ͨ<><CDA8>8<EFBFBD><38>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T8CR (*(volatile unsigned *)0x100030E8) /* ͨ<><CDA8>8<EFBFBD><38><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T8ISCR (*(volatile unsigned *)0x100030EC) /* ͨ<><CDA8>8<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T8IMSR (*(volatile unsigned *)0x100030F0) /* ͨ<><CDA8>8<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T9LCR (*(volatile unsigned *)0x10003100) /* ͨ<><CDA8>9<EFBFBD><39><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T9CCR (*(volatile unsigned *)0x10003104) /* ͨ<><CDA8>9<EFBFBD><39>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T9CR (*(volatile unsigned *)0x10003108) /* ͨ<><CDA8>9<EFBFBD><39><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T9ISCR (*(volatile unsigned *)0x1000310C) /* ͨ<><CDA8>9<EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T9IMSR (*(volatile unsigned *)0x10003110) /* ͨ<><CDA8>9<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T10LCR (*(volatile unsigned *)0x10003120) /* ͨ<><CDA8>10<31><30><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T10CCR (*(volatile unsigned *)0x10003124) /* ͨ<><CDA8>10<31><30>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T10CR (*(volatile unsigned *)0x10003128) /* ͨ<><CDA8>10<31><30><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define TIMER_T10ISCR (*(volatile unsigned *)0x1000312C) /* ͨ<><CDA8>10<31>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_T10IMSR (*(volatile unsigned *)0x10003130) /* ͨ<><CDA8>10<31>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_TIMSR (*(volatile unsigned *)0x10003140) /* TIMER<45>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_TISCR (*(volatile unsigned *)0x10003144) /* TIMER<45>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define TIMER_TISR (*(volatile unsigned *)0x10003148) /* TIMER<45>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* PWMģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10004000
******************************************************************************************/
#define PWM1_CTRL (*(volatile unsigned *)0x10004000) /* PWM1<4D><31><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PWM1_DIV (*(volatile unsigned *)0x10004004) /* PWM1<4D><31>Ƶ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM1_PERIOD (*(volatile unsigned *)0x10004008) /* PWM1<4D><31><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define PWM1_DATA (*(volatile unsigned *)0x1000400C) /* PWM1<4D><31><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define PWM1_CNT (*(volatile unsigned *)0x10004010) /* PWM1<4D><31><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM1_STATUS (*(volatile unsigned *)0x10004014) /* PWM1״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM2_CTRL (*(volatile unsigned *)0x10004020) /* PWM2<4D><32><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PWM2_DIV (*(volatile unsigned *)0x10004024) /* PWM2<4D><32>Ƶ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM2_PERIOD (*(volatile unsigned *)0x10004028) /* PWM2<4D><32><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define PWM2_DATA (*(volatile unsigned *)0x1000402C) /* PWM2<4D><32><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define PWM2_CNT (*(volatile unsigned *)0x10004030) /* PWM2<4D><32><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM2_STATUS (*(volatile unsigned *)0x10004034) /* PWM2״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM3_CTRL (*(volatile unsigned *)0x10004040) /* PWM3<4D><33><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PWM3_DIV (*(volatile unsigned *)0x10004044) /* PWM3<4D><33>Ƶ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM3_PERIOD (*(volatile unsigned *)0x10004048) /* PWM3<4D><33><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define PWM3_DATA (*(volatile unsigned *)0x1000404C) /* PWM3<4D><33><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define PWM3_CNT (*(volatile unsigned *)0x10004050) /* PWM3<4D><33><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM3_STATUS (*(volatile unsigned *)0x10004054) /* PWM3״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM4_CTRL (*(volatile unsigned *)0x10004060) /* PWM4<4D><34><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define PWM4_DIV (*(volatile unsigned *)0x10004064) /* PWM4<4D><34>Ƶ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM4_PERIOD (*(volatile unsigned *)0x10004068) /* PWM4<4D><34><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define PWM4_DATA (*(volatile unsigned *)0x1000406C) /* PWM4<4D><34><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define PWM4_CNT (*(volatile unsigned *)0x10004070) /* PWM4<4D><34><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM4_STATUS (*(volatile unsigned *)0x10004074) /* PWM4״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define PWM_INTMASK (*(volatile unsigned *)0x10004080) /* PWM<57>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>μĴ<CEBC><C4B4><EFBFBD> */
#define PWM_INT (*(volatile unsigned *)0x10004084) /* PWM<57>жϼĴ<CFBC><C4B4><EFBFBD> */
#define PWM_ENABLE (*(volatile unsigned *)0x10004088) /* PWMʹ<4D>ܼĴ<DCBC><C4B4><EFBFBD> */
/******************************************************************************************
* UART0ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10005000
******************************************************************************************/
#define UART0BASE ((volatile unsigned *)0x10005000)
#define UART0_DLBL (*(volatile unsigned char*)0x10005000) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õͰ<C3B5>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART0_RXFIFO (*(volatile unsigned char*)0x10005000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART0_TXFIFO (*(volatile unsigned char*)0x10005000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART0_DLBH (*(volatile unsigned char*)0x10005004) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø߰<C3B8>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART0_IER (*(volatile unsigned char*)0x10005004) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define UART0_IIR (*(volatile unsigned *)0x10005008) /* <20>ж<EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART0_FCR (*(volatile unsigned *)0x10005008) /* FIFO<46><4F><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART0_LCR (*(volatile unsigned *)0x1000500C) /* <20>п<EFBFBD><D0BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART0_MCR (*(volatile unsigned *)0x10005010) /* Modem<65><6D><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART0_LSR (*(volatile unsigned *)0x10005014) /* <20><>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART0_MSR (*(volatile unsigned *)0x10005018) /* Modem״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* UART1ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10006000
******************************************************************************************/
#define UART1BASE ((volatile unsigned *)0x10006000)
#define UART1_DLBL (*(volatile unsigned *)0x10006000) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õͰ<C3B5>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART1_RXFIFO (*(volatile unsigned *)0x10006000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART1_TXFIFO (*(volatile unsigned *)0x10006000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART1_DLBH (*(volatile unsigned *)0x10006004) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø߰<C3B8>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART1_IER (*(volatile unsigned *)0x10006004) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define UART1_IIR (*(volatile unsigned *)0x10006008) /* <20>ж<EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART1_FCR (*(volatile unsigned *)0x10006008) /* FIFO<46><4F><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART1_LCR (*(volatile unsigned *)0x1000600C) /* <20>п<EFBFBD><D0BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART1_MCR (*(volatile unsigned *)0x10006010) /* Modem<65><6D><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART1_LSR (*(volatile unsigned *)0x10006014) /* <20><>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART1_MSR (*(volatile unsigned *)0x10006018) /* Modem״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* UART2ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10007000
******************************************************************************************/
#define UART2BASE ((volatile unsigned *)0x10007000)
#define UART2_DLBL (*(volatile unsigned *)0x10007000) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õͰ<C3B5>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART2_RXFIFO (*(volatile unsigned *)0x10007000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART2_TXFIFO (*(volatile unsigned *)0x10007000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART2_DLBH (*(volatile unsigned *)0x10007004) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø߰<C3B8>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART2_IER (*(volatile unsigned *)0x10007004) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define UART2_IIR (*(volatile unsigned *)0x10007008) /* <20>ж<EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART2_FCR (*(volatile unsigned *)0x10007008) /* FIFO<46><4F><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART2_LCR (*(volatile unsigned *)0x1000700C) /* <20>п<EFBFBD><D0BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART2_MCR (*(volatile unsigned *)0x10007010) /* Modem<65><6D><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART2_LSR (*(volatile unsigned *)0x10007014) /* <20><>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART2_MSR (*(volatile unsigned *)0x10007018) /* Modem״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* UART3ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10008000
******************************************************************************************/
#define UART3BASE ((volatile unsigned *)0x10008000)
#define UART3_DLBL (*(volatile unsigned *)0x10008000) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õͰ<C3B5>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART3_RXFIFO (*(volatile unsigned *)0x10008000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART3_TXFIFO (*(volatile unsigned *)0x10008000) /* <20><><EFBFBD><EFBFBD>FIFO */
#define UART3_DLBH (*(volatile unsigned *)0x10008004) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø߰<C3B8>λ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART3_IER (*(volatile unsigned *)0x10008004) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define UART3_IIR (*(volatile unsigned *)0x10008008) /* <20>ж<EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART3_FCR (*(volatile unsigned *)0x10008008) /* FIFO<46><4F><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART3_LCR (*(volatile unsigned *)0x1000800C) /* <20>п<EFBFBD><D0BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART3_MCR (*(volatile unsigned *)0x10008010) /* Modem<65><6D><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define UART3_LSR (*(volatile unsigned *)0x10008014) /* <20><>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define UART3_MSR (*(volatile unsigned *)0x10008018) /* Modem״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* SSIģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x10009000
******************************************************************************************/
#define SSI_CONTROL0 (*(volatile unsigned *)0x10009000) /* <20><><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>0 */
#define SSI_CONTROL1 (*(volatile unsigned *)0x10009004) /* <20><><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>1 */
#define SSI_SSIENR (*(volatile unsigned *)0x10009008) /* SSIʹ<49>ܼĴ<DCBC><C4B4><EFBFBD> */
#define SSI_MWCR (*(volatile unsigned *)0x1000900C) /* Microwire<72><65><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define SSI_SER (*(volatile unsigned *)0x10009010) /* <20><><EFBFBD>ʹ<E8B1B8>ܼĴ<DCBC><C4B4><EFBFBD> */
#define SSI_BAUDR (*(volatile unsigned *)0x10009014) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define SSI_TXFTLR (*(volatile unsigned *)0x10009018) /* <20><><EFBFBD><EFBFBD>FIFO<46><4F>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_RXFTLR (*(volatile unsigned *)0x1000901C) /* <20><><EFBFBD><EFBFBD>FIFO<46><4F>ֵ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_TXFLR (*(volatile unsigned *)0x10009020) /* <20><><EFBFBD><EFBFBD>FIFO״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_RXFLR (*(volatile unsigned *)0x10009024) /* <20><><EFBFBD><EFBFBD>FIFO״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_SR (*(volatile unsigned *)0x10009028) /* ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_IMR (*(volatile unsigned *)0x1000902C) /* <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>μĴ<CEBC><C4B4><EFBFBD> */
#define SSI_ISR (*(volatile unsigned *)0x10009030) /* <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_RISR (*(volatile unsigned *)0x10009034) /* <20>ж<EFBFBD>ԭʼ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_TXOICR (*(volatile unsigned *)0x10009038) /* <20><><EFBFBD><EFBFBD>FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_RXOICR (*(volatile unsigned *)0x1000903C) /* <20><><EFBFBD><EFBFBD>FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_RXUICR (*(volatile unsigned *)0x10009040) /* <20><><EFBFBD><EFBFBD>FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_ICR (*(volatile unsigned *)0x1000902C) /* <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_DMACR (*(volatile unsigned *)0x1000904C) /* DMA<4D><41><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define SSI_DMATDLR (*(volatile unsigned *)0x10009050) /* DMA<4D><41><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_DMARDLR (*(volatile unsigned *)0x10009054) /* DMA<4D><41><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SSI_DR (*(volatile unsigned *)0x10009060) /* <20><><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
/******************************************************************************************
* I2Sģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x1000A000
******************************************************************************************/
#define I2S_CTRL (*(volatile unsigned *)0x1000A000) /* I2S<32><53><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define I2S_DATA (*(volatile unsigned *)0x1000A004) /* I2S<32><53><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define I2S_INT (*(volatile unsigned *)0x1000A008) /* I2S<32>жϼĴ<CFBC><C4B4><EFBFBD> */
#define I2S_STATUS (*(volatile unsigned *)0x1000A00C) /* I2S״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* GPIOģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x1000F000
******************************************************************************************/
#define GPIO_DBCLK_DIV (*(volatile unsigned *)0x1000F000) /* ȥë<C8A5>̲<EFBFBD><CCB2><EFBFBD>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_DIR (*(volatile unsigned *)0x1000F004) /* A<><41><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_SEL (*(volatile unsigned *)0x1000F008) /* A<><41><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_INCTL (*(volatile unsigned *)0x1000F00C) /* A<><41><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_INTRCTL (*(volatile unsigned *)0x1000F010) /* A<><41><EFBFBD>˿<EFBFBD><CBBF>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_INTRCLR (*(volatile unsigned *)0x1000F014) /* A<><41><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTA_DATA (*(volatile unsigned *)0x1000F018) /* A<><41><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTB_DIR (*(volatile unsigned *)0x1000F01C) /* B<><42><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTB_SEL (*(volatile unsigned *)0x1000F020) /* B<><42><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTB_DATA (*(volatile unsigned *)0x1000F024) /* B<><42><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTC_DIR (*(volatile unsigned *)0x1000F028) /* C<><43><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTC_SEL (*(volatile unsigned *)0x1000F02C) /* C<><43><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTC_DATA (*(volatile unsigned *)0x1000F030) /* C<><43><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTD_DIR (*(volatile unsigned *)0x1000F034) /* D<><44><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTD_SEL (*(volatile unsigned *)0x1000F038) /* D<><44><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTD_SPECII (*(volatile unsigned *)0x1000F03C) /* D<><44><EFBFBD>˿<EFBFBD>ר<EFBFBD><D7A8><EFBFBD><EFBFBD>;2ѡ<32><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTD_DATA (*(volatile unsigned *)0x1000F040) /* D<><44><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTE_DIR (*(volatile unsigned *)0x1000F044) /* E<><45><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTE_SEL (*(volatile unsigned *)0x1000F048) /* E<><45><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTE_DATA (*(volatile unsigned *)0x1000F04C) /* E<><45><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_DIR (*(volatile unsigned *)0x1000F050) /* F<><46><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_SEL (*(volatile unsigned *)0x1000F054) /* F<><46><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_INCTL (*(volatile unsigned *)0x1000F058) /* F<><46><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_INTRCTL (*(volatile unsigned *)0x1000F05C) /* F<><46><EFBFBD>˿<EFBFBD><CBBF>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_INTRCLR (*(volatile unsigned *)0x1000F060) /* F<><46><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTF_DATA (*(volatile unsigned *)0x1000F064) /* F<><46><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTG_DIR (*(volatile unsigned *)0x1000F068) /* G<><47><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTG_SEL (*(volatile unsigned *)0x1000F06C) /* G<><47><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTG_DATA (*(volatile unsigned *)0x1000F070) /* G<><47><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTH_DIR (*(volatile unsigned *)0x1000F074) /* H<><48><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTH_SEL (*(volatile unsigned *)0x1000F078) /* H<><48><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTH_DATA (*(volatile unsigned *)0x1000F07c) /* H<><48><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTI_DIR (*(volatile unsigned *)0x1000F080) /* I<><49><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTI_SEL (*(volatile unsigned *)0x1000F084) /* I<><49><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;ѡ<CDBE><D1A1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define GPIO_PORTI_DATA (*(volatile unsigned *)0x1000F088) /* I<><49><EFBFBD>˿<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;<EFBFBD><CDBE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
/******************************************************************************************
* SMC0ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x1000C000
******************************************************************************************/
#define SMC0_CTRL (*(volatile unsigned *)0x1000C000) /* SMC0<43><30><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define SMC0_INT (*(volatile unsigned *)0x1000C004) /* SMC0<43>жϼĴ<CFBC><C4B4><EFBFBD> */
#define SMC0_FD (*(volatile unsigned *)0x1000C008) /* SMC0<43><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԫʱ<D4AA><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SMC0_CT (*(volatile unsigned *)0x1000C00C) /* SMC0<43>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SMC0_BT (*(volatile unsigned *)0x1000C010) /* SMC0<43><EFBFBD><E9B4AB>ʱ<EFBFBD><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* SMC1ģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x1000D000
******************************************************************************************/
#define SMC1_CTRL (*(volatile unsigned *)0x1000D000) /* SMC1<43><31><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define SMC1_INT (*(volatile unsigned *)0x1000D004) /* SMC1<43>жϼĴ<CFBC><C4B4><EFBFBD> */
#define SMC1_FD (*(volatile unsigned *)0x1000D008) /* SMC1<43><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԫʱ<D4AA><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SMC1_CT (*(volatile unsigned *)0x1000D00C) /* SMC1<43>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define SMC1_BT (*(volatile unsigned *)0x1000D010) /* SMC1<43><EFBFBD><E9B4AB>ʱ<EFBFBD><CAB1><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* USBDģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x1000E000
******************************************************************************************/
#define USBD_PROTOCOLINTR (*(volatile unsigned *)0x1000E000) /* USBЭ<42><D0AD><EFBFBD>жϼĴ<CFBC><C4B4><EFBFBD> */
#define USBD_INTRMASK (*(volatile unsigned *)0x1000E004) /* USB<53>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>μĴ<CEBC><C4B4><EFBFBD> */
#define USBD_INTRCTRL (*(volatile unsigned *)0x1000E008) /* USB<53>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>Ϳ<EFBFBD><CDBF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define USBD_EPINFO (*(volatile unsigned *)0x1000E00C) /* USB<53><EFBFBD>˵<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_BCONFIGURATIONVALUE (*(volatile unsigned *)0x1000E010) /* SET_CCONFIGURATION<4F><4E>¼ */
#define USBD_BMATTRIBUTES (*(volatile unsigned *)0x1000E014) /* <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԼĴ<D4BC><C4B4><EFBFBD> */
#define USBD_DEVSPEED (*(volatile unsigned *)0x1000E018) /* <20><>ǰ<EFBFBD><EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ٶȼĴ<C8BC><C4B4><EFBFBD> */
#define USBD_FRAMENUMBER (*(volatile unsigned *)0x1000E01C) /* <20><>¼<EFBFBD><C2BC>ǰSOF<4F><46><EFBFBD>ڵ<EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_EPTRANSACTIONS0 (*(volatile unsigned *)0x1000E020) /* <20><>¼<EFBFBD>´<EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EPTRANSACTIONS1 (*(volatile unsigned *)0x1000E024) /* <20><>¼<EFBFBD>´<EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_APPIFUPDATE (*(volatile unsigned *)0x1000E028) /* <20>ӿںſ<DABA><C5BF>ٸ<EFBFBD><D9B8>¼Ĵ<C2BC><C4B4><EFBFBD> */
#define USBD_CFGINTERFACE0 (*(volatile unsigned *)0x1000E02c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE1 (*(volatile unsigned *)0x1000E030) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE2 (*(volatile unsigned *)0x1000E034) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE3 (*(volatile unsigned *)0x1000E038) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE4 (*(volatile unsigned *)0x1000E03c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE5 (*(volatile unsigned *)0x1000E040) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE6 (*(volatile unsigned *)0x1000E044) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE7 (*(volatile unsigned *)0x1000E048) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE8 (*(volatile unsigned *)0x1000E04c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE9 (*(volatile unsigned *)0x1000E050) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE10 (*(volatile unsigned *)0x1000E054) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE11 (*(volatile unsigned *)0x1000E058) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE12 (*(volatile unsigned *)0x1000E05c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE13 (*(volatile unsigned *)0x1000E060) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE14 (*(volatile unsigned *)0x1000E064) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE15 (*(volatile unsigned *)0x1000E068) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE16 (*(volatile unsigned *)0x1000E06c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE17 (*(volatile unsigned *)0x1000E070) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE18 (*(volatile unsigned *)0x1000E074) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE19 (*(volatile unsigned *)0x1000E078) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE20 (*(volatile unsigned *)0x1000E07c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE21 (*(volatile unsigned *)0x1000E080) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE22 (*(volatile unsigned *)0x1000E084) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE23 (*(volatile unsigned *)0x1000E088) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE24 (*(volatile unsigned *)0x1000E08c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE25 (*(volatile unsigned *)0x1000E090) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE26 (*(volatile unsigned *)0x1000E094) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE27 (*(volatile unsigned *)0x1000E098) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE28 (*(volatile unsigned *)0x1000E09c) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE29 (*(volatile unsigned *)0x1000E0a0) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE30 (*(volatile unsigned *)0x1000E0a4) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_CFGINTERFACE31 (*(volatile unsigned *)0x1000E0a8) /* <20><>¼<EFBFBD>ӿڵ<D3BF>ֵ */
#define USBD_PKTPASSEDCTRL (*(volatile unsigned *)0x1000E0ac) /* <20><>¼<EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>յİ<D5B5><C4B0><EFBFBD> */
#define USBD_PKTDROPPEDCTRL (*(volatile unsigned *)0x1000E0b0) /* <20><>¼<EFBFBD><C2BC>ʧ<EFBFBD>İ<EFBFBD><C4B0><EFBFBD> */
#define USBD_CRCERRCTRL (*(volatile unsigned *)0x1000E0b4) /* <20><>¼CRC<52><43><EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD><C4B0><EFBFBD> */
#define USBD_BITSTUFFERRCTRL (*(volatile unsigned *)0x1000E0b8) /* <20><>¼λ<C2BC><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD><C4B0><EFBFBD> */
#define USBD_PIDERRCTRL (*(volatile unsigned *)0x1000E0bc) /* <20><>¼PID<49><44><EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD><C4B0><EFBFBD> */
#define USBD_FRAMINGERRCTL (*(volatile unsigned *)0x1000E0c0) /* <20><>¼<EFBFBD><C2BC>SYNC<4E><43>EOP<4F>İ<EFBFBD><C4B0><EFBFBD> */
#define USBD_TXPKTCTRL (*(volatile unsigned *)0x1000E0c4) /* <20><>¼<EFBFBD><C2BC><EFBFBD>Ͱ<EFBFBD><CDB0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_STATCTRLOV (*(volatile unsigned *)0x1000E0c8) /* <20><>¼ͳ<C2BC>ƼĴ<C6BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_TXLENGTH (*(volatile unsigned *)0x1000E0cc) /* <20><>¼ÿ<C2BC><C3BF>IN<49><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_RXLENGTH (*(volatile unsigned *)0x1000E0d0) /* <20><>¼OUT<55><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_RESUME (*(volatile unsigned *)0x1000E0d4) /* USB<53><42><EFBFBD>ѼĴ<D1BC><C4B4><EFBFBD> */
#define USBD_READFLAG (*(volatile unsigned *)0x1000E0d8) /* <20><><EFBFBD>첽״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>־ */
#define USBD_RECEIVETYPE (*(volatile unsigned *)0x1000E0dc) /* <20><><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_APPLOCK (*(volatile unsigned *)0x1000E0e0) /* <20><><EFBFBD>źżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP0OUTADDR (*(volatile unsigned *)0x1000E100) /* <20>˵<EFBFBD>0<EFBFBD>˵<EFBFBD><CBB5>źͷ<C5BA><CDB7><EFBFBD> */
#define USBD_EP0OUTBMATTR (*(volatile unsigned *)0x1000E104) /* <20>˵<EFBFBD>0<EFBFBD><30><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD> */
#define USBD_EP0OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E108) /* <20>˵<EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP0OUTIFNUM (*(volatile unsigned *)0x1000E10c) /* <20>˵<EFBFBD>0<EFBFBD>ӿںżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP0OUTSTAT (*(volatile unsigned *)0x1000E110) /* <20>˵<EFBFBD>0״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP0OUTBMREQTYPE (*(volatile unsigned *)0x1000E114) /* <20>˵<EFBFBD>0 SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP0OUTBREQUEST (*(volatile unsigned *)0x1000E118) /* <20>˵<EFBFBD>0 SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP0OUTWVALUE (*(volatile unsigned *)0x1000E11c) /* <20>˵<EFBFBD>0 SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ */
#define USBD_EP0OUTWINDEX (*(volatile unsigned *)0x1000E120) /* <20>˵<EFBFBD>0 SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP0OUTWLENGTH (*(volatile unsigned *)0x1000E120) /* <20>˵<EFBFBD>0 SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󳤶<EFBFBD> */
#define USBD_EP0OUTSYNCHFRAME (*(volatile unsigned *)0x1000E128) /* <20>˵<EFBFBD><30><CDAC><EFBFBD><EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_EP1OUTADDR (*(volatile unsigned *)0x1000E12c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5>źͷ<C5BA><CDB7><EFBFBD> */
#define USBD_EP1OUTBMATTR (*(volatile unsigned *)0x1000E130) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD> */
#define USBD_EP1OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E134) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP1OUTIFNUM (*(volatile unsigned *)0x1000E138) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>ӿںżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP1OUTSTAT (*(volatile unsigned *)0x1000E13c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP1OUTBMREQTYPE (*(volatile unsigned *)0x1000E140) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1OUTBREQUEST (*(volatile unsigned *)0x1000E144) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1OUTWVALUE (*(volatile unsigned *)0x1000E148) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ */
#define USBD_EP1OUTWINDX (*(volatile unsigned *)0x1000E14c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1OUTWLENGH (*(volatile unsigned *)0x1000E150) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򳤶<EFBFBD> */
#define USBD_EP1OUTSYNCHFRAME (*(volatile unsigned *)0x1000E154) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_EP1INADDR (*(volatile unsigned *)0x1000E158) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5>źͷ<C5BA><CDB7><EFBFBD> */
#define USBD_EP1INBMATTR (*(volatile unsigned *)0x1000E15c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD> */
#define USBD_EP1INMAXPKTSIZE (*(volatile unsigned *)0x1000E160) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP1INIFNUM (*(volatile unsigned *)0x1000E164) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>ӿںżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP1INSTAT (*(volatile unsigned *)0x1000E168) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP1INBMREQTYPE (*(volatile unsigned *)0x1000E16c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1INBREQUEST (*(volatile unsigned *)0x1000E170) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1INWVALUE (*(volatile unsigned *)0x1000E174) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ */
#define USBD_EP1INWINDEX (*(volatile unsigned *)0x1000E178) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP1INWLENGTH (*(volatile unsigned *)0x1000E17c) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򳤶<EFBFBD> */
#define USBD_EP1INSYNCHFRAME (*(volatile unsigned *)0x1000E180) /* <20>˵<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_EP2OUTADDR (*(volatile unsigned *)0x1000E184) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5>źͷ<C5BA><CDB7><EFBFBD> */
#define USBD_EP2OUTBMATTR (*(volatile unsigned *)0x1000E188) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD> */
#define USBD_EP2OUTMAXPKTSIZE (*(volatile unsigned *)0x1000E18c) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP2OUTIFNUM (*(volatile unsigned *)0x1000E190) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD>ӿںżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP2OUTSTAT (*(volatile unsigned *)0x1000E194) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP2OUTBMREQTYPE (*(volatile unsigned *)0x1000E198) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2OUTBREQUEST (*(volatile unsigned *)0x1000E19c) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2OUTWVALUE (*(volatile unsigned *)0x1000E1a0) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ */
#define USBD_EP2OUTWINDEX (*(volatile unsigned *)0x1000E1a4) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2OUTWLENGTH (*(volatile unsigned *)0x1000E1a8) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򳤶<EFBFBD> */
#define USBD_EP2OUTSYNCHFRAME (*(volatile unsigned *)0x1000E1ac) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_EP2INADDR (*(volatile unsigned *)0x1000E1b0) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5>źͷ<C5BA><CDB7><EFBFBD> */
#define USBD_EP2INBMATTR (*(volatile unsigned *)0x1000E1b4) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD> */
#define USBD_EP2INMAXPKTSIZE (*(volatile unsigned *)0x1000E1b8) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP2INIFNUM (*(volatile unsigned *)0x1000E1bc) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD>ӿںżĴ<C5BC><C4B4><EFBFBD> */
#define USBD_EP2INSTAT (*(volatile unsigned *)0x1000E1c0) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define USBD_EP2INBMREQTYPE (*(volatile unsigned *)0x1000E1c4) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2INBREQUEST (*(volatile unsigned *)0x1000E1c8) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2INWVALUE (*(volatile unsigned *)0x1000E1cc) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ */
#define USBD_EP2INWINDEX (*(volatile unsigned *)0x1000E1d0) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define USBD_EP2INWLENGTH (*(volatile unsigned *)0x1000E1d4) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>SETUP<55><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򳤶<EFBFBD> */
#define USBD_EP2INSYNCHFRAME (*(volatile unsigned *)0x1000E1d8) /* <20>˵<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>֡<EFBFBD><D6A1> */
#define USBD_RXFIFO (*(volatile unsigned *)0x1000E200) /* <20><><EFBFBD><EFBFBD>FIFO */
#define USBD_TXFIFO (*(volatile unsigned *)0x1000E300) /* <20><><EFBFBD><EFBFBD>FIFO */
/******************************************************************************************
* EMIģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x11000000
******************************************************************************************/
#define EMI_CSACONF (*(volatile unsigned *)0x11000000) /* CSA<53><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_CSBCONF (*(volatile unsigned *)0x11000004) /* CSB<53><42><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_CSCCONF (*(volatile unsigned *)0x11000008) /* CSC<53><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_CSDCONF (*(volatile unsigned *)0x1100000c) /* CSD<53><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_CSECONF (*(volatile unsigned *)0x11000010) /* CSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_CSFCONF (*(volatile unsigned *)0x11000014) /* CSF<53><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_SDCONF1 (*(volatile unsigned *)0x11000018) /* SDRAMʱ<4D><CAB1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD>1 */
#define EMI_SDCONF2 (*(volatile unsigned *)0x1100001c) /* SDRAMʱ<4D><CAB1><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD>2, SDRAM<41><4D>ʼ<EFBFBD><CABC><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ */
#define EMI_REMAPCONF (*(volatile unsigned *)0x11000020) /* Ƭѡ<C6AC>ռ<D5BC><E4BCB0>ַӳ<D6B7><D3B3>REMAP<41><50><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define EMI_NAND_ADDR1 (*(volatile unsigned *)0x11000100) /* NAND FLASH<53>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>1 */
#define EMI_NAND_COM (*(volatile unsigned *)0x11000104) /* NAND FLASH<53>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>ּĴ<D6BC><C4B4><EFBFBD> */
#define EMI_NAND_STA (*(volatile unsigned *)0x1100010c) /* NAND FLASH<53><48>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define EMI_ERR_ADDR1 (*(volatile unsigned *)0x11000110) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>1 */
#define EMI_ERR_ADDR2 (*(volatile unsigned *)0x11000114) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>2 */
#define EMI_NAND_CONF1 (*(volatile unsigned *)0x11000118) /* NAND FLASH<53><48><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1 */
#define EMI_NAND_INTR (*(volatile unsigned *)0x1100011c) /* NAND FLASH<53>жϼĴ<CFBC><C4B4><EFBFBD> */
#define EMI_NAND_ECC (*(volatile unsigned *)0x11000120) /* ECCУ<43><D0A3><EFBFBD><EFBFBD><EFBFBD>ɼĴ<C9BC><C4B4><EFBFBD> */
#define EMI_NAND_IDLE (*(volatile unsigned *)0x11000124) /* NAND FLASH<53><48><EFBFBD>мĴ<D0BC><C4B4><EFBFBD> */
#define EMI_NAND_CONF2 (*(volatile unsigned *)0x11000128) /* NAND FLASH<53><48><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2 */
#define EMI_NAND_ADDR2 (*(volatile unsigned *)0x1100012c) /* NAND FLASH<53>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>2 */
#define EMI_NAND_ID (*(volatile unsigned *)0x11000130) /* NAND FLASH<53><48>ID<49>Ĵ<EFBFBD><C4B4><EFBFBD>*/
#define EMI_NAND_DATA (*(volatile unsigned *)0x11000200) /* NAND FLASH<53><48><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
/******************************************************************************************
* DMACģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x11001000
******************************************************************************************/
#define DMAC_INTSTATUS (*(volatile unsigned *)0x11001020) /* DAMC<4D>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
#define DMAC_INTTCSTATUS (*(volatile unsigned *)0x11001050) /* DMAC<41><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_INTTCCLEAR (*(volatile unsigned *)0x11001060) /* DMAC<41><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_INTERRORSTATUS (*(volatile unsigned *)0x11001080) /* DMAC<41><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_INTERRCLR (*(volatile unsigned *)0x11001090) /* DMAC<41><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_ENBLDCHNS (*(volatile unsigned *)0x110010b0) /* DMACͨ<43><CDA8>ʹ<EFBFBD><CAB9>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C0SRCADDR (*(volatile unsigned *)0x11001000) /* DMAC<41><43><30><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C0DESTADD (*(volatile unsigned *)0x11001004) /* DMAC<41><43>0Ŀ<30>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C0CONTROL (*(volatile unsigned *)0x1100100c) /* DMAC<41><43>0<EFBFBD><30><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C0CONFIGURATION (*(volatile unsigned *)0x11001010) /* DMAC<41><43>0<EFBFBD><30><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C0DESCRIPTOR (*(volatile unsigned *)0x11001014) /* DMAC<41><43>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C1SRCADDR (*(volatile unsigned *)0x11001100) /* DMAC<41><43><31><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C1DESTADDR (*(volatile unsigned *)0x11001104) /* DMAC<41><43>1Ŀ<31>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C1CONTROL (*(volatile unsigned *)0x1100110c) /* DMAC<41><43>1<EFBFBD><31><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C1CONFIGURATION (*(volatile unsigned *)0x11001110) /* DMAC<41><43>1<EFBFBD><31><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C1DESCRIPTOR (*(volatile unsigned *)0x11001114) /* DMAC<41><43>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C2SRCADDR (*(volatile unsigned *)0x11001200) /* DMAC<41><43><32><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C2DESTADDR (*(volatile unsigned *)0x11001204) /* DMAC<41><43>2Ŀ<32>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C2CONTROL (*(volatile unsigned *)0x1100120c) /* DMAC<41><43>2<EFBFBD><32><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C2CONFIGURATION (*(volatile unsigned *)0x11001210) /* DMAC<41><43>2<EFBFBD><32><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C2DESCRIPTOR (*(volatile unsigned *)0x11001214) /* DMAC<41><43>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C3SRCADDR (*(volatile unsigned *)0x11001300) /* DMAC<41><43><33><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C3DESTADDR (*(volatile unsigned *)0x11001304) /* DMAC<41><43>3Ŀ<33>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C3CONTROL (*(volatile unsigned *)0x1100130c) /* DMAC<41><43>3<EFBFBD><33><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C3CONFIGURATION (*(volatile unsigned *)0x11001310) /* DMAC<41><43>3<EFBFBD><33><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C3DESCRIPTOR (*(volatile unsigned *)0x11001314) /* DMAC<41><43>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C4SRCADDR (*(volatile unsigned *)0x11001400) /* DMAC<41><43><34><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C4DESTADDR (*(volatile unsigned *)0x11001404) /* DMAC<41><43>4Ŀ<34>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C4CONTROL (*(volatile unsigned *)0x1100140c) /* DMAC<41><43>4<EFBFBD><34><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C4CONFIGURATION (*(volatile unsigned *)0x11001410) /* DMAC<41><43>4<EFBFBD><34><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C4DESCRIPTOR (*(volatile unsigned *)0x11001414) /* DMAC<41><43>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C5SRCADDR (*(volatile unsigned *)0x11001500) /* DMAC<41><43><35><D4B4>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C5DESTADDR (*(volatile unsigned *)0x11001504) /* DMAC<41><43>5Ŀ<35>ĵ<EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define DMAC_C5CONTROL (*(volatile unsigned *)0x1100150c) /* DMAC<41><43>5<EFBFBD><35><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define DMAC_C5CONFIGURATION (*(volatile unsigned *)0x11001510) /* DMAC<41><43>5<EFBFBD><35><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define DMAC_C5DESCRIPTOR (*(volatile unsigned *)0x11001514) /* DMAC<41><43>5<EFBFBD><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
/******************************************************************************************
* LCDCģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x11002000
******************************************************************************************/
#define LCDC_SSA (*(volatile unsigned *)0x11002000) /* <20><>Ļ<EFBFBD><C4BB>ʼ<EFBFBD><CABC>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define LCDC_SIZE (*(volatile unsigned *)0x11002004) /* <20><>Ļ<EFBFBD>ߴ<EFBFBD><DFB4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define LCDC_PCR (*(volatile unsigned *)0x11002008) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define LCDC_HCR (*(volatile unsigned *)0x1100200c) /* ˮƽ<CBAE><C6BD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define LCDC_VCR (*(volatile unsigned *)0x11002010) /* <20><>ֱ<EFBFBD><D6B1><EFBFBD>üĴ<C3BC><C4B4><EFBFBD> */
#define LCDC_PWMR (*(volatile unsigned *)0x11002014) /* PWM<57>Աȶȿ<C8B6><C8BF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define LCDC_LECR (*(volatile unsigned *)0x11002018) /* ʹ<>ܿ<EFBFBD><DCBF>ƼĴ<C6BC><C4B4><EFBFBD> */
#define LCDC_DMACR (*(volatile unsigned *)0x1100201c) /* DMA<4D><41><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define LCDC_LCDISREN (*(volatile unsigned *)0x11002020) /* <20>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD> */
#define LCDC_LCDISR (*(volatile unsigned *)0x11002024) /* <20>ж<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define LCDC_LGPMR (*(volatile unsigned *)0x11002040) /* <20>Ҷȵ<D2B6>ɫӳ<C9AB><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
/*(0x40-0x7c 16<31><36>32bit<69>Ĵ<EFBFBD><C4B4><EFBFBD>) */
/******************************************************************************************
* MACģ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>ַ: 0x11003000
******************************************************************************************/
#define MAC_CTRL (*(volatile unsigned *)0x11003000) /* MAC<41><43><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define MAC_INTSRC (*(volatile unsigned *)0x11003004) /* MAC<41>ж<EFBFBD>Դ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_INTMASK (*(volatile unsigned *)0x11003008) /* MAC<41>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>μĴ<CEBC><C4B4><EFBFBD> */
#define MAC_IPGT (*(volatile unsigned *)0x1100300c) /* <20><><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_IPGR1 (*(volatile unsigned *)0x11003010) /* <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define MAC_IPGR2 (*(volatile unsigned *)0x11003014) /* <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ڼĴ<DABC><C4B4><EFBFBD> */
#define MAC_PACKETLEN (*(volatile unsigned *)0x11003018) /* ֡<><D6A1><EFBFBD>ȼĴ<C8BC><C4B4><EFBFBD> */
#define MAC_COLLCONF (*(volatile unsigned *)0x1100301c) /* <20><>ײ<EFBFBD>ط<EFBFBD><D8B7>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_TXBD_NUM (*(volatile unsigned *)0x11003020) /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_FLOWCTRL (*(volatile unsigned *)0x11003024) /* <20><><EFBFBD>ؼĴ<D8BC><C4B4><EFBFBD> */
#define MAC_MII_CTRL (*(volatile unsigned *)0x11003028) /* PHY<48><59><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD> */
#define MAC_MII_CMD (*(volatile unsigned *)0x1100302c) /* PHY<48><59><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_MII_ADDRESS (*(volatile unsigned *)0x11003030) /* PHY<48><59>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_MII_TXDATA (*(volatile unsigned *)0x11003034) /* PHYд<59><D0B4><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define MAC_MII_RXDATA (*(volatile unsigned *)0x11003038) /* PHY<48><59><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define MAC_MII_STATUS (*(volatile unsigned *)0x1100303c) /* PHY״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_ADDR0 (*(volatile unsigned *)0x11003040) /* MAC<41><43>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_ADDR1 (*(volatile unsigned *)0x11003044) /* MAC<41><43>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_HASH0 (*(volatile unsigned *)0x11003048) /* MAC HASH<53>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_HASH1 (*(volatile unsigned *)0x1100304c) /* MAC HASH<53>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_TXPAUSE (*(volatile unsigned *)0x11003050) /* MAC<41><43><EFBFBD><EFBFBD>֡<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD> */
#define MAC_BD /* 0x4*/
#endif
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