394 lines
12 KiB
C
394 lines
12 KiB
C
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/*
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* Copyright (c) 2022 hpmicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef _HPM_BOARD_H
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#define _HPM_BOARD_H
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#include <stdio.h>
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#include "hpm_common.h"
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#include "hpm_clock_drv.h"
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#include "hpm_soc.h"
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#include "hpm_soc_feature.h"
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#include "pinmux.h"
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#define BOARD_NAME "hpm6300evk"
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#define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
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/* dma section */
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#define BOARD_APP_XDMA HPM_XDMA
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#define BOARD_APP_HDMA HPM_HDMA
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#define BOARD_APP_XDMA_IRQ IRQn_XDMA
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#define BOARD_APP_HDMA_IRQ IRQn_HDMA
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#define BOARD_APP_DMAMUX HPM_DMAMUX
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/* uart section */
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#ifndef BOARD_RUNNING_CORE
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#define BOARD_RUNNING_CORE HPM_CORE0
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#endif
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#ifndef BOARD_APP_UART_BASE
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#define BOARD_APP_UART_BASE HPM_UART0
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#define BOARD_APP_UART_IRQ IRQn_UART0
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#else
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#ifndef BOARD_APP_UART_IRQ
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#warning no IRQ specified for applicaiton uart
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#endif
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#endif
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#define BOARD_APP_UART_BAUDRATE (115200UL)
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#define BOARD_APP_UART_CLK_NAME clock_uart0
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#ifndef BOARD_CONSOLE_TYPE
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#define BOARD_CONSOLE_TYPE console_type_uart
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#endif
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#if console_type_uart == BOARD_CONSOLE_TYPE
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#ifndef BOARD_CONSOLE_BASE
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#if BOARD_RUNNING_CORE == HPM_CORE0
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#define BOARD_CONSOLE_BASE HPM_UART0
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#define BOARD_CONSOLE_CLK_NAME clock_uart0
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#else
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#define BOARD_CONSOLE_BASE HPM_UART13
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#define BOARD_CONSOLE_CLK_NAME clock_uart13
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#endif
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#endif
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#define BOARD_CONSOLE_BAUDRATE (115200UL)
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#endif
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#define BOARD_FREEMASTER_UART_BASE HPM_UART0
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#define BOARD_FREEMASTER_UART_IRQ IRQn_UART0
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#define BOARD_FREEMASTER_UART_CLK_NAME clock_uart0
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/* uart rx idle demo section */
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#define BOARD_UART_IDLE HPM_UART2
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#define BOARD_UART_IDLE_DMA_SRC HPM_DMA_SRC_UART2_RX
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#define BOARD_UART_IDLE_TRGM HPM_TRGM1
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#define BOARD_UART_IDLE_TRGM_PIN IOC_PAD_PA24
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#define BOARD_UART_IDLE_TRGM_INPUT_SRC HPM_TRGM1_INPUT_SRC_TRGM1_P4
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#define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_IN HPM_TRGM1_OUTPUT_SRC_GPTMR2_IN2
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#define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_SYNCI HPM_TRGM1_OUTPUT_SRC_GPTMR2_SYNCI
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#define BOARD_UART_IDLE_GPTMR HPM_GPTMR2
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#define BOARD_UART_IDLE_GPTMR_CLK_NAME clock_gptmr2
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#define BOARD_UART_IDLE_GPTMR_IRQ IRQn_GPTMR2
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#define BOARD_UART_IDLE_GPTMR_CMP_CH 0
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#define BOARD_UART_IDLE_GPTMR_CAP_CH 2
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/* sdram section */
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#define BOARD_SDRAM_ADDRESS (0x40000000UL)
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#define BOARD_SDRAM_SIZE (32*SIZE_1MB)
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#define BOARD_SDRAM_CS DRAM_SDRAM_CS0
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#define BOARD_SDRAM_PORT_SIZE DRAM_SDRAM_PORT_SIZE_16_BITS
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#define BOARD_SDRAM_REFRESH_COUNT (8192UL)
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#define BOARD_SDRAM_REFRESH_IN_MS (64UL)
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#define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (4UL)
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/* nor flash section */
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#define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
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#define BOARD_FLASH_SIZE (16 * SIZE_1MB)
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/* i2c section */
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#define BOARD_APP_I2C_BASE HPM_I2C0
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#define BOARD_APP_I2C_CLK_NAME clock_i2c0
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#define BOARD_APP_I2C_DMA HPM_HDMA
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#define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
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#define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0
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#define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
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/* ACMP desction */
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#define BOARD_ACMP HPM_ACMP
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#define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
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#define BOARD_ACMP_IRQ IRQn_ACMP_1
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#define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
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#define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_5 /* align with used pin */
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/* dma section */
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#define BOARD_APP_XDMA HPM_XDMA
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#define BOARD_APP_HDMA HPM_HDMA
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#define BOARD_APP_XDMA_IRQ IRQn_XDMA
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#define BOARD_APP_HDMA_IRQ IRQn_HDMA
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#define BOARD_APP_DMAMUX HPM_DMAMUX
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/* gptmr section */
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#define BOARD_GPTMR HPM_GPTMR2
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#define BOARD_GPTMR_IRQ IRQn_GPTMR2
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#define BOARD_GPTMR_CHANNEL 0
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#define BOARD_GPTMR_PWM HPM_GPTMR2
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#define BOARD_GPTMR_PWM_CHANNEL 0
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/* gpio section */
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#define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ
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#define BOARD_APP_GPIO_PIN 2
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/* pinmux section */
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#define USING_GPIO0_FOR_GPIOZ
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#ifndef USING_GPIO0_FOR_GPIOZ
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#define BOARD_APP_GPIO_CTRL HPM_BGPIO
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#define BOARD_APP_GPIO_IRQ IRQn_BGPIO
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#else
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#define BOARD_APP_GPIO_CTRL HPM_GPIO0
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#define BOARD_APP_GPIO_IRQ IRQn_GPIO0_Z
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#endif
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/* gpiom section */
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#define BOARD_APP_GPIOM_BASE HPM_GPIOM
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#define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
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#define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
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/* spi section */
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#define BOARD_APP_SPI_BASE HPM_SPI3
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#define BOARD_APP_SPI_CLK_SRC_FREQ (24000000UL)
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#define BOARD_APP_SPI_SCLK_FREQ (1562500UL)
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#define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
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#define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
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#define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX
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#define BOARD_APP_SPI_RX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
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#define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX
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#define BOARD_APP_SPI_TX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX1
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#define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
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#define BOARD_SPI_CS_PIN IOC_PAD_PC18
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#define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
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/* Flash section */
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#define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
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#define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U)
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#define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U)
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#define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
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/* i2s section */
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#define BOARD_APP_I2S_BASE HPM_I2S0
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#define BOARD_APP_I2S_DATA_LINE (2U)
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#define BOARD_APP_I2S_CLK_NAME clock_i2s0
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#define BOARD_APP_AUDIO_CLK_SRC clock_source_pll2_clk0
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#define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll2clk0
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/* enet section */
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#define BOARD_ENET_RMII HPM_ENET0
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#define BOARD_ENET_RMII_RST_GPIO
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#define BOARD_ENET_RMII_RST_GPIO_INDEX
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#define BOARD_ENET_RMII_RST_GPIO_PIN
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#define BOARD_ENET_RMII HPM_ENET0
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#define BOARD_ENET_RMII_INT_REF_CLK (1U)
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#define BOARD_ENET_RMII_PTP_CLOCK (clock_ptp0)
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/* ADC section */
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#define BOARD_APP_ADC16_NAME "ADC0"
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#define BOARD_APP_ADC16_BASE HPM_ADC0
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#define BOARD_APP_ADC16_IRQn IRQn_ADC0
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#define BOARD_APP_ADC16_CH_1 (13U)
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#define BOARD_APP_ADC_TRIG_PWMT0 HPM_PWM0
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#define BOARD_APP_ADC_TRIG_PWMT1 HPM_PWM1
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#define BOARD_APP_ADC_TRIG_TRGM0 HPM_TRGM0
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#define BOARD_APP_ADC_TRIG_TRGM1 HPM_TRGM1
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#define BOARD_APP_ADC_TRIG_PWM_SYNC HPM_SYNT
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/* DAC section */
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#define BOARD_DAC_BASE HPM_DAC
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#define BOARD_DAC_IRQn IRQn_DAC
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#define BOARD_DAC_CLOCK_NAME clock_dac0
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/* CAN section */
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#define BOARD_APP_CAN_BASE HPM_CAN1
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#define BOARD_APP_CAN_IRQn IRQn_CAN1
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/*
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* timer for board delay
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*/
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#define BOARD_DELAY_TIMER (HPM_GPTMR3)
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#define BOARD_DELAY_TIMER_CH 0
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#define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3)
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#define BOARD_CALLBACK_TIMER (HPM_GPTMR3)
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#define BOARD_CALLBACK_TIMER_CH 1
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#define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3
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#define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)
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/* SDXC section */
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#define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC0)
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#define BOARD_APP_SDCARD_SUPPORT_1V8 (0)
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#define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
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#define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (0)
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#if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO
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#define BOARD_APP_SDCARD_CARD_DETECTION_GPIO NULL
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#define BOARD_APP_SDCARD_CARD_DETECTION_GPIO_INDEX 0
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#define BOARD_APP_SDCARD_CARD_DETECTION_PIN_INDEX 0
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#endif
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/* USB section */
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#define BOARD_USB0_ID_PORT (HPM_GPIO0)
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#define BOARD_USB0_ID_GPIO_INDEX (GPIO_DO_GPIOC)
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#define BOARD_USB0_ID_GPIO_PIN (23)
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/*BLDC pwm*/
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/*PWM define*/
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#define BOARD_BLDCPWM HPM_PWM0
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#define BOARD_BLDC_UH_PWM_OUTPIN (0U)
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#define BOARD_BLDC_UL_PWM_OUTPIN (1U)
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#define BOARD_BLDC_VH_PWM_OUTPIN (2U)
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#define BOARD_BLDC_VL_PWM_OUTPIN (3U)
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#define BOARD_BLDC_WH_PWM_OUTPIN (4U)
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#define BOARD_BLDC_WL_PWM_OUTPIN (5U)
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#define BOARD_BLDCPWM_TRGM HPM_TRGM0
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#define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM0
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#define BOARD_BLDCPWM_CMP_INDEX_0 (0U)
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#define BOARD_BLDCPWM_CMP_INDEX_1 (1U)
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#define BOARD_BLDCPWM_CMP_INDEX_2 (2U)
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#define BOARD_BLDCPWM_CMP_INDEX_3 (3U)
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#define BOARD_BLDCPWM_CMP_INDEX_4 (4U)
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#define BOARD_BLDCPWM_CMP_INDEX_5 (5U)
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/*HALL define*/
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#define BOARD_BLDC_HALL_BASE HPM_HALL0
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#define BOARD_BLDC_HALL_TRGM HPM_TRGM0
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#define BOARD_BLDC_HALL_IRQ IRQn_HALL0
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#define BOARD_BLDC_HALL_TRGM_HALL_U_SRC HPM_TRGM0_INPUT_SRC_TRGM0_IN8
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#define BOARD_BLDC_HALL_TRGM_HALL_V_SRC HPM_TRGM0_INPUT_SRC_TRGM0_IN7
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#define BOARD_BLDC_HALL_TRGM_HALL_W_SRC HPM_TRGM0_INPUT_SRC_TRGM0_IN6
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#define BOARD_BLDC_HALL_MOTOR_PHASE_COUNT_PER_REV (1000U)
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/*QEI*/
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#define BOARD_BLDC_QEI_BASE HPM_QEI0
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#define BOARD_BLDC_QEI_IRQ IRQn_QEI0
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#define BOARD_BLDC_QEI_TRGM HPM_TRGM0
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#define BOARD_BLDC_QEI_TRGM_QEI_A_SRC HPM_TRGM0_INPUT_SRC_TRGM0_IN9
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#define BOARD_BLDC_QEI_TRGM_QEI_B_SRC HPM_TRGM0_INPUT_SRC_TRGM0_IN10
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#define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U)
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#define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot0
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#define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U)
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/*Timer define*/
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#define BOARD_BLDC_TMR_1MS HPM_GPTMR2
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#define BOARD_BLDC_TMR_CH 0
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#define BOARD_BLDC_TMR_CMP 0
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#define BOARD_BLDC_TMR_IRQ IRQn_GPTMR2
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#define BOARD_BLDC_TMR_RELOAD (100000U)
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/*adc*/
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#define BOARD_BLDC_ADC_MODULE ADCX_MODULE_ADC16
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#define BOARD_BLDC_ADC_U_BASE HPM_ADC1
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#define BOARD_BLDC_ADC_V_BASE HPM_ADC0
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#define BOARD_BLDC_ADC_W_BASE HPM_ADC2
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#define BOARD_BLDC_ADC_TRIG_FLAG adc16_event_trig_complete
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#define BOARD_BLDC_ADC_CH_U (14U)
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#define BOARD_BLDC_ADC_CH_V (12U)
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#define BOARD_BLDC_ADC_CH_W (5U)
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#define BOARD_BLDC_ADC_IRQn IRQn_ADC1
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#define BOARD_BLDC_ADC_SEQ_DMA_SIZE_IN_4BYTES (40U)
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#define BOARD_BLDC_ADC_TRG ADC16_CONFIG_TRG0A
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#define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U)
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#define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U)
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#define BOARD_BLDC_TRIGMUX_IN_NUM HPM_TRGM0_INPUT_SRC_PWM0_CH8REF
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#define BOARD_BLDC_TRG_NUM TRGM_TRGOCFG_ADCX_PTRGI0A
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/* APP PWM */
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#define BOARD_APP_PWM HPM_PWM0
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#define BOARD_APP_PWM_CLOCK_NAME clock_mot0
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#define BOARD_APP_PWM_OUT1 0
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#define BOARD_APP_PWM_OUT2 1
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#define BOARD_APP_TRGM HPM_TRGM0
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#define BOARD_CPU_FREQ (480000000UL)
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/* LED */
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#define BOARD_LED_GPIO_CTRL HPM_GPIO0
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#define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOA
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#define BOARD_LED_GPIO_PIN 7
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#define BOARD_LED_OFF_LEVEL 1
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#define BOARD_LED_ON_LEVEL 0
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#ifndef BOARD_SHOW_CLOCK
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#define BOARD_SHOW_CLOCK 1
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#endif
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#ifndef BOARD_SHOW_BANNER
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#define BOARD_SHOW_BANNER 1
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#endif
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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typedef void (*board_timer_cb)(void);
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void board_init(void);
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void board_init_console(void);
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void board_init_uart(UART_Type *ptr);
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void board_init_i2c(I2C_Type *ptr);
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void board_init_can(CAN_Type *ptr);
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uint32_t board_init_dram_clock(void);
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void board_init_sdram_pins(void);
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void board_init_gpio_pins(void);
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void board_init_spi_pins(SPI_Type *ptr);
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void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
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void board_write_spi_cs(uint32_t pin, uint8_t state);
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void board_init_led_pins(void);
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void board_led_write(uint8_t state);
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void board_led_toggle(void);
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/* Initialize SoC overall clocks */
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void board_init_clock(void);
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uint32_t board_init_spi_clock(SPI_Type *ptr);
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uint32_t board_init_adc16_clock(ADC16_Type *ptr);
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uint32_t board_init_dac_clock(DAC_Type *ptr, bool clk_src_ahb);
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void board_init_adc16_pins(void);
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void board_init_dac_pins(DAC_Type *ptr);
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uint32_t board_init_can_clock(CAN_Type *ptr);
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uint32_t board_init_i2s_clock(I2S_Type *ptr);
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uint32_t board_init_pdm_clock(void);
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uint32_t board_init_dao_clock(void);
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void board_init_sd_pins(SDXC_Type *ptr);
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uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq);
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void board_sd_switch_pins_to_1v8(SDXC_Type *ptr);
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bool board_sd_detect_card(SDXC_Type *ptr);
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void board_init_usb_pins(void);
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void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level);
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uint8_t board_get_usb_id_status(void);
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hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
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hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
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hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
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/*
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* @brief Initialize PMP and PMA for but not limited to the following purposes:
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* -- non-cacheable memory initialization
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*/
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void board_init_pmp(void);
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void board_delay_us(uint32_t us);
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void board_delay_ms(uint32_t ms);
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void board_timer_create(uint32_t ms, board_timer_cb cb);
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void board_ungate_mchtmr_at_lp_mode(void);
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/* Initialize the UART clock */
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uint32_t board_init_uart_clock(UART_Type *ptr);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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#endif /* _HPM_BOARD_H */
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