2019-01-22 15:07:51 +08:00
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-01-05 zylx first version
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* 2019-01-08 SummerGift clean up the code
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*/
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#ifndef __DMA_CONFIG_H__
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#define __DMA_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* DMA1 channel1 */
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2019-02-15 10:43:09 +08:00
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#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
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2019-02-15 16:44:51 +08:00
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#define SPI1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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2019-02-15 10:43:09 +08:00
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#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_RX_DMA_INSTANCE DMA1_Channel1
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#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX
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#define SPI1_RX_DMA_IRQ DMA1_Channel1_IRQn
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2019-02-15 16:44:51 +08:00
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#ifdef BSP_UART1_RX_USING_DMA
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#undef BSP_UART1_RX_USING_DMA
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#endif
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#ifdef BSP_SPI2_RX_USING_DMA
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#undef BSP_SPI2_RX_USING_DMA
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#endif
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2019-02-15 10:43:09 +08:00
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define UART1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART1_RX_DMA_INSTANCE DMA1_Channel1
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#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX
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#define UART1_RX_DMA_IRQ DMA1_Channel1_IRQn
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2019-02-15 16:44:51 +08:00
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#ifdef BSP_SPI2_RX_USING_DMA
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#undef BSP_SPI2_RX_USING_DMA
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#endif
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#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
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#define SPI2_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_RX_DMA_INSTANCE DMA1_Channel1
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#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX
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#define SPI2_RX_DMA_IRQ DMA1_Channel1_IRQn
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2019-01-22 15:07:51 +08:00
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#endif
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2019-02-15 10:43:09 +08:00
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/* DMA1 channle2-3 */
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#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
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2019-02-15 16:44:51 +08:00
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#define SPI1_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
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#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
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#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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#ifdef BSP_UART2_RX_USING_DMA
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#undef BSP_UART2_RX_USING_DMA
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#endif
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#ifdef BSP_SPI2_TX_USING_DMA
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#undef BSP_SPI2_TX_USING_DMA
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#endif
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2019-02-15 10:43:09 +08:00
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#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
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#define UART2_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART2_RX_DMA_INSTANCE DMA1_Channel2
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#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX
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#define UART2_RX_DMA_IRQ DMA1_Channel2_3_IRQn
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2019-02-15 16:44:51 +08:00
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#ifdef BSP_SPI2_TX_USING_DMA
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#undef BSP_SPI2_TX_USING_DMA
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#endif
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#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
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#define SPI2_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_TX_DMA_INSTANCE DMA1_Channel2
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#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX
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#define SPI2_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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2019-01-22 15:07:51 +08:00
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#endif
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2019-02-15 10:43:09 +08:00
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#if defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE)
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#define LPUART1_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
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#define LPUART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define LPUART1_RX_DMA_INSTANCE DMA1_Channel5
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#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_LPUART1_RX
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#define LPUART1_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn
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2019-01-22 15:07:51 +08:00
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DMA_CONFIG_H__ */
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