313 lines
14 KiB
C
313 lines
14 KiB
C
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//*****************************************************************************
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//
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//! @file am_reg_macros.h
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//!
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//! @brief Helper macros for using hardware registers.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_REG_MACROS_H
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#define AM_REG_MACROS_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// Include the inline assembly macros.
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//
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//*****************************************************************************
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#include "am_reg_macros_asm.h"
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//*****************************************************************************
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//
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// High-level Helper Macros.
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//
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// Usage:
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//
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// For direct 32-bit access to a register, use AM_REGVAL:
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// AM_REGVAL(REG_VCOMP_BASEADDR + AM_VCOMP_VCMPCFG_O) |= 0xDEADBEEF;
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//
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// The AM_REG macro can also be used as a shorthand version of AM_REGVAL:
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// AM_REG(VCOMP, VCMPCFG) |= 0xDEADBEEF;
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//
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// The AM_REGn macro is used for accessing registers of peripherals with
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// multiple instances, such as IOMSTR.
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// AM_REGn(IOMSTR, 1, CLKCFG) |= 0xDEADBEEF;
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//
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// To write to a specific bitfield within a register, use AM_BFW or AM_BFWn:
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// AM_BFW(CTIMER, 0, CTCTRL0, TMRB0FN, 0x3);
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//
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// To read a field, use AM_BFR or AM_BFRn:
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// ui32Timer0Fn = AM_BFR((CTIMER, 0, CTCTRL0, TMRB0FN);
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//
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// Note:
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//
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// AM_REGn, AM_BFW and AM_BFR are concatenation-based, which means that
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// standalone macro definitions should not be used for the 'module', 'reg', and
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// 'field' arguments.All macro names in the various peripheral header files are
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// written in one of the following forms:
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// - AM_REG_##module_reg_O
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// - AM_REG_##module_reg_field_S
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// - AM_REG_##module_reg_field_M
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//
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// The "module", "reg" and "field" fragments may be used as valid arguments to
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// the AM_REGn, AM_BFW, and AM_BFR macros, all of which are able to perform the
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// necessary concatenation operations to reconstruct the full macros and look
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// up the appropriate base address for the instance number given. For
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// peripherals with only one instance, use instance number 0.
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//
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// The AM_REGVAL macro does not perform any concatenation operations, so the
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// complete macro name (including any suffix) must be specified.
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//
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//*****************************************************************************
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#define AM_REGVAL(x) (*((volatile uint32_t *)(x)))
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#define AM_REGVAL_FLOAT(x) (*((volatile float *)(x)))
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//*****************************************************************************
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//
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// Register access macros for single-instance modules
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// AM_REG - Write a register of a module.
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// AM_BFW - Write a value to a bitfield of a register.
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// AM_BFWe - Use a defined enum value to write a value to a bitfield.
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// AM_BFR - Read a bitfield value from a register.
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// AM_BFM - Read and mask a bitfield, but leave the value in its bit position.
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// (Useful for comparing with enums.)
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//
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//*****************************************************************************
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#define AM_REG(module, reg) \
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AM_REGn(module, 0, reg)
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#define AM_BFW(module, reg, field, value) \
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AM_BFWn(module, 0, reg, field, value)
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#define AM_BFWe(module, reg, field, enumval) \
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AM_BFWen(module, 0, reg, field, enumval)
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#define AM_BFR(module, reg, field) \
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AM_BFRn(module, 0, reg, field)
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#define AM_BFM(module, reg, field) \
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AM_BFMn(module, 0, reg, field)
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#define AM_BFV(module, reg, field, value) \
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(((uint32_t)(value) << AM_REG_##module##_##reg##_##field##_S) & \
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AM_REG_##module##_##reg##_##field##_M)
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#define AM_BFX(module, reg, field, value) \
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(((uint32_t)(value) & AM_REG_##module##_##reg##_##field##_M) >> \
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AM_REG_##module##_##reg##_##field##_S)
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//*****************************************************************************
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//
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// Register access macros for multi-instance modules
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// AM_REGn - Write a register of a multiple instance module.
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// AM_BFWn - Write a value to a bitfield of a register in a multiple instance.
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// AM_BFWen - Use a defined enum value to write a value to a bitfield of a
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// register in a multiple instance.
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// AM_BFRn - Read a bitfield value from a register in a multiple instance.
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// AM_BFMn - Read a bitfield, but leave the value in its bitfield position.
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// AM_BFMn - Read and mask a bitfield, but leave the value in its bit position.
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// (Useful for comparing with enums.)
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//
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//*****************************************************************************
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#define AM_REGn(module, instance, reg) \
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AM_REGVAL(AM_REG_##module##n(instance) + AM_REG_##module##_##reg##_O)
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#define AM_BFWn(module, instance, reg, field, value) \
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AM_REGn(module, instance, reg) = \
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(AM_BFV(module, reg, field, value) | \
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(AM_REGn(module, instance, reg) & \
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(~AM_REG_##module##_##reg##_##field##_M)))
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#define AM_BFWen(module, instance, reg, field, enumval) \
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AM_REGn(module, instance, reg) = \
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(AM_REG_##module##_##reg##_##field##_##enumval | \
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(AM_REGn(module, instance, reg) & \
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(~AM_REG_##module##_##reg##_##field##_M)))
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#define AM_BFRn(module, instance, reg, field) \
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AM_BFX(module, reg, field, AM_REGn(module, instance, reg))
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#define AM_BFMn(module, instance, reg, field) \
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(AM_REGn(module, instance, reg) & AM_REG_##module##_##reg##_##field##_M)
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//*****************************************************************************
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//
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// "Atomic" register access macros - use when a read-modify-write is required.
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//
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// These macros will be slower than the normal macros, but they will also
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// guarantee threadsafe hardware access.
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//
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// These macros require a nesting-friendly critical section implementation. If
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// you are using the HAL, you can use the default definitions below. If not,
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// you will need to supply your own.
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//
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// Atomic register access macros usage:
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// AM_REGa - Write a register of a single instance module. Provide operator
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// (&,|,etc) to perform that operation on the reg using value, or
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// no operator to simply write the value atomically.
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// AM_REGa_SET - Set bits in a single instance module according to the mask.
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// AM_REGa_CLR - Clear bits in a single instance module according to the mask.
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// AM_REGna - Multiple module version of AM_REGa.
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// AM_REGna_SET - Multiple instance version of AM_REGa_SET.
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// AM_REGna_CLR - Multiple instance version of AM_REGa_CLR.
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// AM_BFWa - Write a value to a register bitfield.
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// AM_BFWae - Use a defined enum value to write a value to a bitfield.
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// AM_BFWan - Write a value to a bitfield of a register in a multiple instance.
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// AM_BFWaen - Use a defined enum value to write a value to a bitfield of a
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// register in a multiple instance.
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//
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//*****************************************************************************
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#ifndef AM_CRITICAL_BEGIN
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#define AM_CRITICAL_BEGIN uint32_t ui32Primask = am_hal_interrupt_master_disable()
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#define AM_CRITICAL_END am_hal_interrupt_master_set(ui32Primask)
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#endif
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#define AM_REGan(module, instance, reg, operator, value) \
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AM_CRITICAL_BEGIN_ASM \
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AM_REGn(module, instance, reg) operator##= (value); \
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AM_CRITICAL_END_ASM
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#define AM_REGan_SET(module, instance, reg, mask) \
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AM_CRITICAL_BEGIN_ASM \
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AM_REGn(module, instance, reg) |= (mask); \
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AM_CRITICAL_END_ASM
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#define AM_REGan_CLR(module, instance, reg, mask) \
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AM_CRITICAL_BEGIN_ASM \
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AM_REGn(module, instance, reg) &= (~mask); \
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AM_CRITICAL_END_ASM
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#define AM_REGa(module, reg, operator, value) \
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AM_REGan(module, 0, reg, operator, value)
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#define AM_REGa_CLR(module, reg, mask) \
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AM_REGan_CLR(module, 0, reg, mask)
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#define AM_REGa_SET(module, reg, mask) \
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AM_REGan_SET(module, 0, reg, mask)
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#define AM_BFWa(module, reg, field, value) \
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AM_CRITICAL_BEGIN_ASM \
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AM_BFW(module, reg, field, value); \
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AM_CRITICAL_END_ASM
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#define AM_BFWae(module, reg, field, enumval) \
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AM_CRITICAL_BEGIN_ASM \
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AM_BFWe(module, reg, field, enumval); \
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AM_CRITICAL_END_ASM
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#define AM_BFWan(module, instance, reg, field, value) \
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AM_CRITICAL_BEGIN_ASM \
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AM_BFWn(module, instance, reg, field, enumval); \
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AM_CRITICAL_END_ASM
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#define AM_BFWaen(module, instance, reg, field, enumval) \
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AM_CRITICAL_BEGIN_ASM \
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AM_BFWen(module, instance reg, field, enumval); \
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AM_CRITICAL_END_ASM
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//*****************************************************************************
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//
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// Other helper Macros.
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//
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// Note: These macros make use of macro concatenation, so the '_S' or '_M'
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// suffix on a register bitfield macro should not be supplied by the user.
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// The macro will apply each suffix as needed.
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//
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//*****************************************************************************
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//
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// AM_ENUMX extracts a register bitfield enumeration to the bit 0 position,
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// which makes it possible to use enums directly with existing macros such
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// as AM_BFR() or AM_BFW().
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// Brief overview: bitfield enumerations are pre-shifted such that the defined
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// value lines up with the bitfield. This is convenient for many operations,
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// but not so when using AM_BFR() to read the value of a register bitfield
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// as AM_BFR() shifts the bitfield value to the bit 0 position.
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// Note that this type of bitfield extraction is Cortex efficient via the
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// UBFX (unsigned bit field extract) instruction.
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//
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// Alternately, AM_BFM() can also be used. AM_BFM() reads a register and masks
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// the bitfield value (without shifting), thereby allowing direct comparison
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// with a defined enum.
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//
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// Examples:
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// if ( AM_BFR(CLKGEN, CCTRL, CORESEL) ==
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// AM_ENUMX(CLKGEN, CCTRL, CORESEL, HFRC) )
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//
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// or alternatively:
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// if ( AM_BFM(CLKGEN, CCTRL, CORESEL) == AM_REG_CLKGEN_CCTRL_CORESEL_HFRC )
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//
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#define AM_ENUMX(module, reg, field, enumname) \
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((AM_REG_##module##_##reg##_##field##_##enumname) >> \
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(AM_REG_##module##_##reg##_##field##_S))
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//
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// AM_WRITE_SM performs a shift/mask operation to prepare the value 'x' to be
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// written to the register field 'field'.
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//
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// For example:
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// AM_REGVAL(ui32Base + AM_VCOMP_VCMP_CFG_O) |=
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// AM_WRITE_SM(AM_VCOMP_VCMP_CFG_LVLSEL, ui32Value);
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//
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#define AM_WRITE_SM(field, x) (((x) << field##_S) & field##_M)
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//
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// AM_READ_SM performs a shift/mask operation to make it easier to interpret
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// the value of a given bitfield. This is essentially the reverse of the
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// AM_WRITE_SM operation. In most cases, you will want to use the shorter
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// AM_BFR macro instead of this one.
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//
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// For example:
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// ui32Value = AM_READ_SM(AM_VCOMP_VCMP_CFG_NSEL,
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// AM_REGVAL(ui32Base + AM_VCOMP_VCMP_CFG_O));
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//
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#define AM_READ_SM(field, x) (((x) & field##_M) >> field##_S)
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#ifdef __cplusplus
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}
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#endif
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#endif // AM_REG_MACROS_H
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