559 lines
14 KiB
C
559 lines
14 KiB
C
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/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2021, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2013-05-13 aozima update for kehong-lingtai.
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* 2015-01-31 armink make sure the serial transmit complete in putc()
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* 2016-05-13 armink add DMA Rx mode
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* 2017-01-19 aubr.cool add interrupt Tx mode
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* 2017-04-13 aubr.cool correct Rx parity err
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* 2021-08-20 breo.com first version
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*/
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#include <rtdevice.h>
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#include <rthw.h>
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#include <board.h>
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#include "drv_usart.h"
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#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
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#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
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struct n32_uart
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{
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USART_Module *uart_device;
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IRQn_Type irq;
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struct n32_uart_dma
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{
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/* dma channel */
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DMA_ChannelType *rx_ch;
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DMA_Module *rx_dma_type;
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/* dma global flag */
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uint32_t rx_gl_flag;
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/* dma irq channel */
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uint8_t rx_irq_ch;
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/* setting receive len */
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rt_size_t setting_recv_len;
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/* last receive index */
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rt_size_t last_recv_index;
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} dma;
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};
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static void DMA_Configuration(struct rt_serial_device *serial);
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static rt_err_t n32_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct n32_uart* uart;
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USART_InitType USART_InitStructure;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = (struct n32_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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RT_ASSERT((uart->uart_device) != RT_NULL);
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n32_msp_usart_init(uart->uart_device);
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USART_InitStructure.BaudRate = cfg->baud_rate;
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if (cfg->data_bits == DATA_BITS_8)
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{
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USART_InitStructure.WordLength = USART_WL_8B;
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}
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else if (cfg->data_bits == DATA_BITS_9)
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{
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USART_InitStructure.WordLength = USART_WL_9B;
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}
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if (cfg->stop_bits == STOP_BITS_1)
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{
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USART_InitStructure.StopBits = USART_STPB_1;
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}
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else if (cfg->stop_bits == STOP_BITS_2)
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{
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USART_InitStructure.StopBits = USART_STPB_2;
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}
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if (cfg->parity == PARITY_NONE)
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{
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USART_InitStructure.Parity = USART_PE_NO;
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}
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else if (cfg->parity == PARITY_ODD)
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{
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USART_InitStructure.Parity = USART_PE_ODD;
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}
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else if (cfg->parity == PARITY_EVEN)
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{
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USART_InitStructure.Parity = USART_PE_EVEN;
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}
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
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USART_InitStructure.Mode = USART_MODE_RX | USART_MODE_TX;
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USART_Init(uart->uart_device, &USART_InitStructure);
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/* Enable USART */
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USART_Enable(uart->uart_device, ENABLE);
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USART_ClrFlag(uart->uart_device, USART_FLAG_TXDE|USART_FLAG_TXC);
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return RT_EOK;
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}
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static rt_err_t n32_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct n32_uart* uart;
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rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
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RT_ASSERT(serial != RT_NULL);
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uart = (struct n32_uart *)serial->parent.user_data;
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switch (cmd)
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{
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/* disable interrupt */
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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UART_DISABLE_IRQ(uart->irq);
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/* disable interrupt */
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USART_ConfigInt(uart->uart_device, USART_INT_RXDNE, DISABLE);
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break;
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/* enable interrupt */
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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UART_ENABLE_IRQ(uart->irq);
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/* enable interrupt */
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USART_ConfigInt(uart->uart_device, USART_INT_RXDNE, ENABLE);
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break;
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/* USART config */
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case RT_DEVICE_CTRL_CONFIG :
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if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
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{
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DMA_Configuration(serial);
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}
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break;
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}
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return RT_EOK;
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}
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static int n32_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct n32_uart* uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct n32_uart *)serial->parent.user_data;
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if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
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{
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if (!(uart->uart_device->STS & USART_FLAG_TXDE))
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{
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USART_ConfigInt(uart->uart_device, USART_INT_TXC, ENABLE);
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return -1;
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}
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uart->uart_device->DAT = c;
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USART_ConfigInt(uart->uart_device, USART_INT_TXC, ENABLE);
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}
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else
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{
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uart->uart_device->DAT = c;
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while (!(uart->uart_device->STS & USART_FLAG_TXC));
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}
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return 1;
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}
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static int n32_uart_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct n32_uart* uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct n32_uart *)serial->parent.user_data;
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ch = -1;
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if (uart->uart_device->STS & USART_FLAG_RXDNE)
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{
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ch = uart->uart_device->DAT & 0xff;
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}
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return ch;
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}
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/**
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* Serial port receive idle process. This need add to uart idle ISR.
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*
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* @param serial serial device
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*/
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static void dma_uart_rx_idle_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
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rt_size_t recv_total_index, recv_len;
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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recv_total_index = uart->dma.setting_recv_len - DMA_GetCurrDataCounter(uart->dma.rx_ch);
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recv_len = recv_total_index - uart->dma.last_recv_index;
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uart->dma.last_recv_index = recv_total_index;
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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if (recv_len)
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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/* read a data for clear receive idle interrupt flag */
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USART_ReceiveData(uart->uart_device);
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DMA_ClearFlag(uart->dma.rx_gl_flag, uart->dma.rx_dma_type);
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}
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/**
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* DMA receive done process. This need add to DMA receive done ISR.
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*
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* @param serial serial device
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*/
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static void dma_rx_done_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
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rt_size_t recv_len;
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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recv_len = uart->dma.setting_recv_len - uart->dma.last_recv_index;
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/* reset last recv index */
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uart->dma.last_recv_index = 0;
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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if (recv_len)
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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DMA_ClearFlag(uart->dma.rx_gl_flag, uart->dma.rx_dma_type);
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}
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial)
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{
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struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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if(USART_GetIntStatus(uart->uart_device, USART_INT_RXDNE) != RESET)
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{
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if(USART_GetFlagStatus(uart->uart_device, USART_FLAG_PEF) == RESET)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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/* clear interrupt */
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_RXDNE);
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}
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if(USART_GetIntStatus(uart->uart_device, USART_INT_IDLEF) != RESET)
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{
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dma_uart_rx_idle_isr(serial);
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}
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if (USART_GetIntStatus(uart->uart_device, USART_INT_TXC) != RESET)
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{
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/* clear interrupt */
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if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
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}
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USART_ConfigInt(uart->uart_device, USART_INT_TXC, DISABLE);
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USART_ClrIntPendingBit(uart->uart_device, USART_INT_TXC);
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}
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if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_OREF) == SET)
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{
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n32_uart_getc(serial);
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}
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}
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static const struct rt_uart_ops n32_uart_ops =
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{
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n32_uart_configure,
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n32_uart_control,
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n32_uart_putc,
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n32_uart_getc,
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};
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#if defined(BSP_USING_UART1)
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/* UART1 device driver structure */
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struct n32_uart uart1 =
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{
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USART1,
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USART1_IRQn,
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{
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DMA1_CH5,
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DMA1,
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DMA1_FLAG_GL5,
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DMA1_Channel5_IRQn,
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0,
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},
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};
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struct rt_serial_device serial1;
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void USART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA1_Channel5_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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/* UART2 device driver structure */
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struct n32_uart uart2 =
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{
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USART2,
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USART2_IRQn,
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{
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DMA1_CH6,
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DMA1,
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DMA1_FLAG_GL6,
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DMA1_Channel6_IRQn,
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0,
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},
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};
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void DMA1_Channel6_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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dma_rx_done_isr(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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/* UART3 device driver structure */
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struct n32_uart uart3 =
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{
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USART3,
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USART3_IRQn,
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{
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DMA1_CH3,
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DMA1,
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DMA1_FLAG_GL3,
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DMA1_Channel3_IRQn,
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0,
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},
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};
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struct rt_serial_device serial3;
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void USART3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
|
||
|
|
|
||
|
|
uart_isr(&serial3);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void DMA1_Channel3_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
dma_rx_done_isr(&serial3);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* BSP_USING_UART3 */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART4)
|
||
|
|
/* UART4 device driver structure */
|
||
|
|
struct n32_uart uart4 =
|
||
|
|
{
|
||
|
|
UART4,
|
||
|
|
UART4_IRQn,
|
||
|
|
{
|
||
|
|
DMA2_CH3,
|
||
|
|
DMA2,
|
||
|
|
DMA2_FLAG_GL3,
|
||
|
|
DMA2_Channel3_IRQn,
|
||
|
|
0,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
struct rt_serial_device serial4;
|
||
|
|
|
||
|
|
void UART4_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
uart_isr(&serial4);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void DMA2_Channel3_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
dma_rx_done_isr(&serial4);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* BSP_USING_UART4 */
|
||
|
|
|
||
|
|
static void NVIC_Configuration(struct n32_uart* uart)
|
||
|
|
{
|
||
|
|
NVIC_InitType NVIC_InitStructure;
|
||
|
|
|
||
|
|
/* Enable the USART1 Interrupt */
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||
|
|
NVIC_Init(&NVIC_InitStructure);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void DMA_Configuration(struct rt_serial_device *serial)
|
||
|
|
{
|
||
|
|
struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
|
||
|
|
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
||
|
|
DMA_InitType DMA_InitStructure;
|
||
|
|
NVIC_InitType NVIC_InitStructure;
|
||
|
|
|
||
|
|
uart->dma.setting_recv_len = serial->config.bufsz;
|
||
|
|
|
||
|
|
/* enable transmit idle interrupt */
|
||
|
|
USART_ConfigInt(uart->uart_device, USART_INT_IDLEF, ENABLE);
|
||
|
|
|
||
|
|
/* DMA clock enable */
|
||
|
|
RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA1, ENABLE);
|
||
|
|
RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA2, ENABLE);
|
||
|
|
|
||
|
|
/* rx dma config */
|
||
|
|
DMA_DeInit(uart->dma.rx_ch);
|
||
|
|
DMA_InitStructure.PeriphAddr = (uint32_t)&(uart->uart_device->DAT);
|
||
|
|
DMA_InitStructure.MemAddr = (uint32_t)(rx_fifo->buffer);
|
||
|
|
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
|
||
|
|
DMA_InitStructure.BufSize = serial->config.bufsz;
|
||
|
|
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
|
||
|
|
DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
|
||
|
|
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_BYTE;
|
||
|
|
DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Byte;
|
||
|
|
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
|
||
|
|
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
|
||
|
|
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
|
||
|
|
DMA_Init(uart->dma.rx_ch, &DMA_InitStructure);
|
||
|
|
DMA_ClearFlag(uart->dma.rx_gl_flag, uart->dma.rx_dma_type);
|
||
|
|
DMA_ConfigInt(uart->dma.rx_ch, DMA_INT_TXC, ENABLE);
|
||
|
|
USART_EnableDMA(uart->uart_device, USART_DMAREQ_RX, ENABLE);
|
||
|
|
DMA_EnableChannel(uart->dma.rx_ch, ENABLE);
|
||
|
|
|
||
|
|
/* rx dma interrupt config */
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||
|
|
NVIC_Init(&NVIC_InitStructure);
|
||
|
|
}
|
||
|
|
|
||
|
|
int rt_hw_usart_init(void)
|
||
|
|
{
|
||
|
|
struct n32_uart* uart;
|
||
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART1)
|
||
|
|
uart = &uart1;
|
||
|
|
config.baud_rate = BAUD_RATE_115200;
|
||
|
|
|
||
|
|
serial1.ops = &n32_uart_ops;
|
||
|
|
serial1.config = config;
|
||
|
|
|
||
|
|
NVIC_Configuration(uart);
|
||
|
|
|
||
|
|
/* register UART1 device */
|
||
|
|
rt_hw_serial_register(&serial1, "uart1",
|
||
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
|
||
|
|
RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
|
||
|
|
uart);
|
||
|
|
#endif /* BSP_USING_UART1 */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART2)
|
||
|
|
uart = &uart2;
|
||
|
|
|
||
|
|
config.baud_rate = BAUD_RATE_115200;
|
||
|
|
serial2.ops = &n32_uart_ops;
|
||
|
|
serial2.config = config;
|
||
|
|
|
||
|
|
NVIC_Configuration(uart);
|
||
|
|
|
||
|
|
/* register UART2 device */
|
||
|
|
rt_hw_serial_register(&serial2, "uart2",
|
||
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
|
||
|
|
RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
|
||
|
|
uart);
|
||
|
|
#endif /* BSP_USING_UART2 */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART3)
|
||
|
|
uart = &uart3;
|
||
|
|
|
||
|
|
config.baud_rate = BAUD_RATE_115200;
|
||
|
|
|
||
|
|
serial3.ops = &n32_uart_ops;
|
||
|
|
serial3.config = config;
|
||
|
|
|
||
|
|
NVIC_Configuration(uart);
|
||
|
|
|
||
|
|
/* register UART3 device */
|
||
|
|
rt_hw_serial_register(&serial3, "uart3",
|
||
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
|
||
|
|
RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
|
||
|
|
uart);
|
||
|
|
#endif /* BSP_USING_UART3 */
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
INIT_BOARD_EXPORT(rt_hw_usart_init);
|
||
|
|
|