2021-01-04 14:12:40 +08:00
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/*
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2022-01-25 16:37:19 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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2021-01-04 14:12:40 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2022-01-25 16:37:19 +08:00
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* 2021-02-25 iysheng first version
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2021-01-04 14:12:40 +08:00
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*/
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#include <board.h>
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#include <drivers/adc.h>
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2021-02-05 11:48:47 +08:00
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#define DBG_TAG "drv.adc"
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#define DBG_LVL DBG_INFO
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2021-01-04 14:12:40 +08:00
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2021-02-05 11:48:47 +08:00
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#include <rtdbg.h>
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2021-01-04 14:12:40 +08:00
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2021-02-05 11:48:47 +08:00
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#ifdef RT_USING_ADC
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2021-01-04 14:12:40 +08:00
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#define MAX_EXTERN_ADC_CHANNEL 16
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typedef struct {
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struct rt_adc_device adc_dev;
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char name[8];
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rt_base_t adc_pins[16];
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void *private_data;
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} gd32_adc_device;
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static gd32_adc_device g_gd32_devs[] = {
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#ifdef BSP_USING_ADC0
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{
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{},
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"adc0",
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{
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GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3),
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GET_PIN(A, 4), GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7),
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GET_PIN(B, 0), GET_PIN(B, 1), GET_PIN(C, 0), GET_PIN(C, 1),
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GET_PIN(C, 2), GET_PIN(C, 3), GET_PIN(C, 4), GET_PIN(C, 5),
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},
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(void *)ADC0,
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},
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#endif
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#ifdef BSP_USING_ADC1
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{
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{},
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"adc1",
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{
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GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3),
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GET_PIN(A, 4), GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7),
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GET_PIN(B, 0), GET_PIN(B, 1), GET_PIN(C, 0), GET_PIN(C, 1),
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GET_PIN(C, 2), GET_PIN(C, 3), GET_PIN(C, 4), GET_PIN(C, 5),
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},
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(void *)ADC1,
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},
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#endif
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};
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/*
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* static void init_pin4adc
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*
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* @ rt_uint32_t pin: pin information
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* return: N/A
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*/
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static void init_pin4adc(rt_base_t pin)
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{
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gpio_init(PIN_GDPORT(pin), GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, PIN_GDPIN(pin));
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}
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static rt_err_t gd32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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uint32_t adc_periph;
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gd32_adc_device * gd32_adc = (gd32_adc_device *)device;
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if (channel >= MAX_EXTERN_ADC_CHANNEL)
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{
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LOG_E("invalid channel");
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return -RT_EINVAL;
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}
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adc_periph = (uint32_t )(device->parent.user_data);
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if (enabled == ENABLE)
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{
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init_pin4adc(gd32_adc->adc_pins[channel]);
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2022-01-25 16:37:19 +08:00
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adc_deinit(adc_periph);
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adc_channel_length_config(adc_periph, ADC_REGULAR_CHANNEL, 1);
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adc_data_alignment_config(adc_periph, ADC_DATAALIGN_RIGHT);
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adc_external_trigger_source_config(adc_periph, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_INSERTED_NONE);
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adc_external_trigger_config(adc_periph, ADC_REGULAR_CHANNEL, ENABLE);
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adc_regular_channel_config(adc_periph, 0, channel, ADC_SAMPLETIME_13POINT5);
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adc_enable(adc_periph);
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}
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else
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{
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adc_disable(adc_periph);
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}
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return 0;
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}
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static rt_err_t gd32_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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uint32_t adc_periph;
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if (!value)
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{
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LOG_E("invalid param");
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return -RT_EINVAL;
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}
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adc_periph = (uint32_t )(device->parent.user_data);
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adc_software_trigger_enable(adc_periph, ADC_REGULAR_CHANNEL);
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*value = adc_regular_data_read(adc_periph);
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return 0;
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}
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static struct rt_adc_ops g_gd32_adc_ops = {
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gd32_adc_enabled,
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gd32_adc_convert,
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};
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static int rt_hw_adc_init(void)
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{
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int ret, i = 0;
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#ifdef BSP_USING_ADC0
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rcu_periph_clock_enable(RCU_ADC0);
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#endif
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#ifdef BSP_USING_ADC1
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rcu_periph_clock_enable(RCU_ADC1);
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#endif
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for (; i < sizeof(g_gd32_devs) / sizeof(g_gd32_devs[0]); i++)
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{
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ret = rt_hw_adc_register(&g_gd32_devs[i].adc_dev, \
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(const char *)g_gd32_devs[i].name, \
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&g_gd32_adc_ops, (void *)g_gd32_devs[i].private_data);
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if (ret != RT_EOK)
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{
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/* TODO err handler */
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LOG_E("failed register %s, err=%d", g_gd32_devs[i].name, ret);
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}
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}
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return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif
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