459 lines
12 KiB
C
459 lines
12 KiB
C
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//###########################################################################
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//
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// FILE: F2837xD_Emif.c
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//
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// TITLE: F2837xD EMIF Initialization & Support Functions.
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//
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//###########################################################################
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// $TI Release: F2837xD Support Library v3.05.00.00 $
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// $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
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// $Copyright:
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// Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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//
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// Included Files
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//
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#include "F2837xD_device.h"
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#include "F2837xD_Examples.h"
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//
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// Emif1Initialize - This function initializes the EMIF1 to a known state.
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//
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void Emif1Initialize(void)
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{
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EALLOW;
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//
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// Perform a Module soft reset on EMIF
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//
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#ifdef CPU1
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DevCfgRegs.SOFTPRES1.all = 0x1;
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__asm (" nop");
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DevCfgRegs.SOFTPRES1.all = 0x0;
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#endif
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EDIS;
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}
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//
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// Emif2Initialize - This function initializes the EMIF2 to a known state.
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//
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void Emif2Initialize(void)
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{
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EALLOW;
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//
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// Perform a Module soft reset on EMIF
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//
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#ifdef CPU1
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DevCfgRegs.SOFTPRES1.all = 0x2;
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__asm (" nop");
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DevCfgRegs.SOFTPRES1.all = 0x0;
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#endif
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EDIS;
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}
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//
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// ASync_wait_config - Async wait configuration function
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//
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void ASync_wait_config(Uint16 inst, Uint16 wait_count, Uint16 wait_polarity)
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{
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if (inst == 0)
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{
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//
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// 7:0 Maximum Extended Wait cycles.
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//
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Emif1Regs.ASYNC_WCCR.bit.MAX_EXT_WAIT = wait_count;
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//
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// 28 Wait Polarity for pad_wait_i[0].
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//
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Emif1Regs.ASYNC_WCCR.bit.WP0 = wait_polarity;
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}
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else
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{
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//
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// 7:0 Maximum Extended Wait cycles.
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//
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Emif2Regs.ASYNC_WCCR.bit.MAX_EXT_WAIT = wait_count;
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//
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// 28 Wait Polarity for pad_wait_i[0].
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//
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Emif2Regs.ASYNC_WCCR.bit.WP0 = wait_polarity;
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}
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}
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//
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// ASync_cs2_config - Async CS2 Configuration
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//
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void ASync_cs2_config(Uint16 inst, Uint16 async_mem_data_width,
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Uint16 turn_around_time, Uint16 r_hold_time,
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Uint16 r_strobe_time, Uint16 r_setup, Uint16 w_hold,
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Uint16 w_strobe, Uint16 w_setup, Uint16 extend_wait,
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Uint16 strobe_sel)
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{
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if (inst == 0)
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{
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//
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// 1:0 Asynchronous Memory Size.
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// 3:2 Turn Around cycles.
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// 6:4 Read Strobe Hold cycles.
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// 12:7 Read Strobe Duration cycles.
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// 16:13 Read Strobe Setup cycles.
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// 19:17 Write Strobe Hold cycles.
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// 25:20 Write Strobe Duration cycles.
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// 29:26 Write Strobe Setup cycles.
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// 30 Extend Wait mode.
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// 31 Select Strobe mode.
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//
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Emif1Regs.ASYNC_CS2_CR.bit.ASIZE = async_mem_data_width;
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Emif1Regs.ASYNC_CS2_CR.bit.TA= turn_around_time;
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Emif1Regs.ASYNC_CS2_CR.bit.R_HOLD= r_hold_time;
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Emif1Regs.ASYNC_CS2_CR.bit.R_STROBE = r_strobe_time;
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Emif1Regs.ASYNC_CS2_CR.bit.R_SETUP = r_setup;
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Emif1Regs.ASYNC_CS2_CR.bit.W_HOLD = w_hold;
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Emif1Regs.ASYNC_CS2_CR.bit.W_STROBE = w_strobe;
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Emif1Regs.ASYNC_CS2_CR.bit.W_SETUP = w_setup;
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Emif1Regs.ASYNC_CS2_CR.bit.EW = extend_wait;
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Emif1Regs.ASYNC_CS2_CR.bit.SS = strobe_sel;
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}
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else
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{
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//
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// 1:0 Asynchronous Memory Size.
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// 3:2 Turn Around cycles.
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// 6:4 Read Strobe Hold cycles.
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// 12:7 Read Strobe Duration cycles.
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// 16:13 Read Strobe Setup cycles.
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// 19:17 Write Strobe Hold cycles.
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// 25:20 Write Strobe Duration cycles.
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// 29:26 Write Strobe Setup cycles.
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// 30 Extend Wait mode.
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// 31 Select Strobe mode.
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//
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Emif2Regs.ASYNC_CS2_CR.bit.ASIZE = async_mem_data_width;
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Emif2Regs.ASYNC_CS2_CR.bit.TA= turn_around_time;
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Emif2Regs.ASYNC_CS2_CR.bit.R_HOLD= r_hold_time;
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Emif2Regs.ASYNC_CS2_CR.bit.R_STROBE = r_strobe_time;
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Emif2Regs.ASYNC_CS2_CR.bit.R_SETUP = r_setup;
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Emif2Regs.ASYNC_CS2_CR.bit.W_HOLD = w_hold;
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Emif2Regs.ASYNC_CS2_CR.bit.W_STROBE = w_strobe;
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Emif2Regs.ASYNC_CS2_CR.bit.W_SETUP = w_setup;
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Emif2Regs.ASYNC_CS2_CR.bit.EW = extend_wait;
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Emif2Regs.ASYNC_CS2_CR.bit.SS = strobe_sel;
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}
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}
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//
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// ASync_cs3_config - Async CS3 Configuration
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//
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void ASync_cs3_config(Uint16 inst, Uint16 async_mem_data_width,
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Uint16 turn_around_time, Uint16 r_hold_time,
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Uint16 r_strobe_time, Uint16 r_setup, Uint16 w_hold,
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Uint16 w_strobe, Uint16 w_setup, Uint16 extend_wait,
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Uint16 strobe_sel)
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{
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//
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// 1:0 Asynchronous Memory Size.
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// 3:2 Turn Around cycles.
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// 6:4 Read Strobe Hold cycles.
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// 12:7 Read Strobe Duration cycles.
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// 16:13 Read Strobe Setup cycles.
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// 19:17 Write Strobe Hold cycles.
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// 25:20 Write Strobe Duration cycles.
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// 29:26 Write Strobe Setup cycles.
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// 30 Extend Wait mode.
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// 31 Select Strobe mode.
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//
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Emif1Regs.ASYNC_CS3_CR.bit.ASIZE = async_mem_data_width;
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Emif1Regs.ASYNC_CS3_CR.bit.TA= turn_around_time;
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Emif1Regs.ASYNC_CS3_CR.bit.R_HOLD= r_hold_time;
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Emif1Regs.ASYNC_CS3_CR.bit.R_STROBE = r_strobe_time;
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Emif1Regs.ASYNC_CS3_CR.bit.R_SETUP = r_setup;
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Emif1Regs.ASYNC_CS3_CR.bit.W_HOLD = w_hold;
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Emif1Regs.ASYNC_CS3_CR.bit.W_STROBE = w_strobe;
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Emif1Regs.ASYNC_CS3_CR.bit.W_SETUP = w_setup;
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Emif1Regs.ASYNC_CS3_CR.bit.EW = extend_wait;
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Emif1Regs.ASYNC_CS3_CR.bit.SS = strobe_sel;
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}
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//
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// ASync_cs4_config - Async CS4 Configuration
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//
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void ASync_cs4_config(Uint16 inst, Uint16 async_mem_data_width,
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Uint16 turn_around_time, Uint16 r_hold_time,
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Uint16 r_strobe_time, Uint16 r_setup, Uint16 w_hold,
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Uint16 w_strobe, Uint16 w_setup, Uint16 extend_wait,
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Uint16 strobe_sel)
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{
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//
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// 1:0 Asynchronous Memory Size.
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// 3:2 Turn Around cycles.
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// 6:4 Read Strobe Hold cycles.
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// 12:7 Read Strobe Duration cycles.
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// 16:13 Read Strobe Setup cycles.
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// 19:17 Write Strobe Hold cycles.
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// 25:20 Write Strobe Duration cycles.
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// 29:26 Write Strobe Setup cycles.
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// 30 Extend Wait mode.
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// 31 Select Strobe mode.
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//
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Emif1Regs.ASYNC_CS4_CR.bit.ASIZE = async_mem_data_width;
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Emif1Regs.ASYNC_CS4_CR.bit.TA= turn_around_time;
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Emif1Regs.ASYNC_CS4_CR.bit.R_HOLD= r_hold_time;
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Emif1Regs.ASYNC_CS4_CR.bit.R_STROBE = r_strobe_time;
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Emif1Regs.ASYNC_CS4_CR.bit.R_SETUP = r_setup;
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Emif1Regs.ASYNC_CS4_CR.bit.W_HOLD = w_hold;
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Emif1Regs.ASYNC_CS4_CR.bit.W_STROBE = w_strobe;
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Emif1Regs.ASYNC_CS4_CR.bit.W_SETUP = w_setup;
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Emif1Regs.ASYNC_CS4_CR.bit.EW = extend_wait;
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Emif1Regs.ASYNC_CS4_CR.bit.SS = strobe_sel;
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}
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#ifdef CPU1
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//
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// setup_emif1_pinmux_async_16bit - function for EMIF1 GPIO pin setup
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//
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void setup_emif1_pinmux_async_16bit(Uint16 cpu_sel)
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{
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Uint16 i;
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for (i=28; i<=52; i++)
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{
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if ((i != 42) && (i != 43))
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{
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GPIO_SetupPinMux(i,cpu_sel,2);
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}
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}
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for (i=63; i<=87; i++)
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{
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if (i != 84)
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{
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GPIO_SetupPinMux(i,cpu_sel,2);
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}
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}
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GPIO_SetupPinMux(88,cpu_sel,3);
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GPIO_SetupPinMux(89,cpu_sel,3);
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GPIO_SetupPinMux(90,cpu_sel,3);
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GPIO_SetupPinMux(91,cpu_sel,3);
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GPIO_SetupPinMux(92,cpu_sel,3);
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GPIO_SetupPinMux(93,cpu_sel,3);
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GPIO_SetupPinMux(94,cpu_sel,2);
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//
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//setup async mode and enable pull-ups for Data pins
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//
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for (i=69; i<=85; i++)
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{
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if (i != 84)
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{
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GPIO_SetupPinOptions(i,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
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}
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}
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}
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//
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// setup_emif1_pinmux_async_32bit - Setup pinmux for 32bit async
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//
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void setup_emif1_pinmux_async_32bit(Uint16 cpu_sel)
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{
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Uint16 i;
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for (i=28; i<=87; i++)
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{
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if ((i != 42) && (i != 43) && (i != 84))
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{
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GPIO_SetupPinMux(i,cpu_sel,2);
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}
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}
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GPIO_SetupPinMux(88,cpu_sel,3);
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GPIO_SetupPinMux(89,cpu_sel,3);
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GPIO_SetupPinMux(90,cpu_sel,3);
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GPIO_SetupPinMux(91,cpu_sel,3);
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GPIO_SetupPinMux(92,cpu_sel,3);
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GPIO_SetupPinMux(93,cpu_sel,3);
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GPIO_SetupPinMux(94,cpu_sel,2);
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//
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//setup async mode for Data pins
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//
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for (i=53; i<=85; i++)
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{
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if (i != 84)
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{
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GPIO_SetupPinOptions(i,0,0x31);
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}
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}
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}
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//
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// setup_emif2_pinmux_async_16bit - function for EMIF1 GPIO pin setup
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//
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void setup_emif2_pinmux_async_16bit(Uint16 cpu_sel)
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{
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Uint16 i;
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for (i=96; i<=121; i++)
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{
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GPIO_SetupPinMux(i,cpu_sel,3);
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}
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for (i=53; i<=68; i++)
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{
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GPIO_SetupPinMux(i,cpu_sel,3);
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}
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//
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//setup async mode for Data pins
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//
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for (i=53; i<=68; i++)
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{
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GPIO_SetupPinOptions(i,0,0x31);
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}
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}
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//
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// setup_emif1_pinmux_sdram_16bit - Setup pinmux for 16bit SDRAM
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//
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void setup_emif1_pinmux_sdram_16bit(Uint16 cpu_sel)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i=29; i<=52; i++)
|
||
|
|
{
|
||
|
|
if ((i != 42) && (i != 43))
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,2);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i=69; i<=85; i++)
|
||
|
|
{
|
||
|
|
if (i != 84)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,2);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
for(i=86; i<=93; i++)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,3);
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
//configure Data pins for Async mode
|
||
|
|
//
|
||
|
|
for (i = 69; i <= 85; i++)
|
||
|
|
{
|
||
|
|
if (i != 84)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinOptions(i,0,0x31);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
GPIO_SetupPinOptions(88,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(89,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(90,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(91,0,0x31);
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// setup_emif2_pinmux_sdram_16bit - Setup pinmux for 16bit SDRAM
|
||
|
|
//
|
||
|
|
void setup_emif2_pinmux_sdram_16bit(Uint16 cpu_sel)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i=53; i<=68; i++)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,3);
|
||
|
|
}
|
||
|
|
for (i=96; i<=121; i++)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,3);
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
//configure Data pins for Async mode
|
||
|
|
//
|
||
|
|
for (i = 53; i <= 68; i++)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinOptions(i,0,0x31);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// setup_emif1_pinmux_sdram_32bit - Setup pinmux for 32bit SDRAM
|
||
|
|
//
|
||
|
|
void setup_emif1_pinmux_sdram_32bit(Uint16 cpu_sel)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i=28; i<=85; i++)
|
||
|
|
{
|
||
|
|
if ((i != 42) && (i != 43) && (i != 84))
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,2);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
for(i=86; i<=93; i++)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinMux(i,cpu_sel,3);
|
||
|
|
}
|
||
|
|
|
||
|
|
GPIO_SetupPinMux(94,cpu_sel,2);
|
||
|
|
|
||
|
|
//
|
||
|
|
//configure Data pins for Async mode
|
||
|
|
//
|
||
|
|
for (i = 53; i <= 85; i++)
|
||
|
|
{
|
||
|
|
if (i != 84)
|
||
|
|
{
|
||
|
|
GPIO_SetupPinOptions(i,0,0x31);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
GPIO_SetupPinOptions(88,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(89,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(90,0,0x31);
|
||
|
|
GPIO_SetupPinOptions(91,0,0x31);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // CPU1
|
||
|
|
|
||
|
|
//
|
||
|
|
// End of file
|
||
|
|
//
|