2014-08-30 00:19:16 +08:00
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/**
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2023-04-05 11:26:18 +08:00
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*****************************************************************************
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* @file cmem7_adc.h
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*
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* @brief CMEM7 ADC header file
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*
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*
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* @version V1.0
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* @date 3. September 2013
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*
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* @note
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*
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*****************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
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*****************************************************************************
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*/
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2014-08-30 00:19:16 +08:00
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#ifndef __CMEM7_ADC_H
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#define __CMEM7_ADC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "cmem7.h"
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#include "cmem7_conf.h"
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/** @defgroup ADC_PERIPH
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* @{
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*/
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typedef enum {
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ADC_PERIPH_1,
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ADC_PERIPH_2,
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} ADC_PERIPH;
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#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC_PERIPH_1) || \
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((PERIPH) == ADC_PERIPH_2))
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/**
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* @}
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*/
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/** @defgroup ADC_VSEN
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* @{
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*/
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#define ADC_VSEN_VDDCORE 1
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#define ADC_VSEN_VDDIO 2
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#define ADC_VSEN_VDDIO2 4
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#define IS_ADC_VSEN(VSEN) (((VSEN) == ADC_VSEN_VDDCORE) || \
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((VSEN) == ADC_VSEN_VDDIO) || \
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((VSEN) == ADC_VSEN_VDDIO2))
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/**
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* @}
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*/
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/** @defgroup ADC_PHASE_CTRL
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* @{
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*/
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#define ADC_PHASE_CTRL_0DEG_RISE_EDGE 0 /* ADC-1 and ADC-2 CLK are 0DEG Phase Difference(Rising Edge) */
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#define ADC_PHASE_CTRL_90DEG_AHEAD 1 /* ADC-1 90DEG ahead of ADC-2 */
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#define ADC_PHASE_CTRL_90DEG_LAG 2 /* ADC-1 90DEG lag of ADC-2 */
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#define ADC_PHASE_CTRL_0DEG_FALL_EDGE 3 /* ADC-1 and ADC-2 CLK are 0DEG Phase Difference(falling Edge) */
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#define IS_ADC_PHASE_CTRL(CTRL) (((CTRL) == ADC_PHASE_CTRL_0DEG_RISE_EDGE) || \
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((CTRL) == ADC_PHASE_CTRL_90DEG_AHEAD) || \
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((CTRL) == ADC_PHASE_CTRL_90DEG_LAG) || \
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((CTRL) == ADC_PHASE_CTRL_0DEG_FALL_EDGE))
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/**
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* @}
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*/
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/** @defgroup ADC_CONVERSION
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* @{
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*/
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#define ADC_SYSTEM_MODE_SINGLE_CONV 1
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#define ADC_SYSTEM_MODE_CONTINUOUS_CONV 2
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#define IS_ADC_CONVERSION(CONV) (((CONV) == ADC_SYSTEM_MODE_SINGLE_CONV) || \
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((CONV) == ADC_SYSTEM_MODE_CONTINUOUS_CONV))
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2014-08-30 00:19:16 +08:00
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/**
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* @}
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*/
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/** @defgroup ADC_CALIBRATION
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* @{
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*/
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#define ADC_CALIBRATION_OFFSET 3
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#define ADC_CALIBRATION_NEGTIVE_GAIN 4
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#define ADC_CALIBRATION_POSTIVE_GAIN 5
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#define IS_ADC_CALIBRATION(CALIB) (((CALIB) == ADC_CALIBRATION_OFFSET) || \
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((CALIB) == ADC_CALIBRATION_NEGTIVE_GAIN) || \
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((CALIB) == ADC_CALIBRATION_POSTIVE_GAIN))
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/**
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* @}
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*/
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/** @defgroup ADC_CHANNEL
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* @{
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*/
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#define ADC_CHANNEL_CALIBRATION 0x0
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/**
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* @}
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*/
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/** @defgroup ADC1_CHANNEL
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* @{
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*/
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#define ADC1_CHANNEL_VIP 0x1
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#define ADC1_CHANNEL_VSEN 0x2
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#define ADC1_CHANNEL_VADIO_0 0x4
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#define ADC1_CHANNEL_VADIO_1 0x8
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#define ADC1_CHANNEL_VADIO_2 0x10
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#define ADC1_CHANNEL_VADIO_3 0x20
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#define ADC1_CHANNEL_VADIO_4 0x40
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#define ADC1_CHANNEL_VADIO_5 0x80
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#define ADC1_CHANNEL_ALL 0xFF
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#define IS_ADC1_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) & ~ADC1_CHANNEL_ALL) == 0)
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/**
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* @}
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*/
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/** @defgroup ADC2_CHANNEL
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* @{
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*/
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#define ADC2_CHANNEL_VIN 0x1
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#define ADC2_CHANNEL_VTMP 0x2
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#define ADC2_CHANNEL_VADIO_6 0x4
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#define ADC2_CHANNEL_VADIO_7 0x8
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#define ADC2_CHANNEL_VADIO_8 0x10
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#define ADC2_CHANNEL_VADIO_9 0x20
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#define ADC2_CHANNEL_VADIO_10 0x40
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#define ADC2_CHANNEL_VADIO_11 0x80
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#define ADC2_CHANNEL_ALL 0xFF
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#define IS_ADC2_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) & ~ADC2_CHANNEL_ALL) == 0)
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/**
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* @}
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*/
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/** @defgroup ADC_INT
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* @{
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*/
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#define ADC1_INT_ALMOST_FULL 0x1
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#define ADC2_INT_ALMOST_FULL 0x8
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#define ADC_INT_ALL 0x9
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#define IS_ADC_INT(INT) (((INT) != 0) && (((INT) & ~ADC_INT_ALL) == 0))
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/**
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* @}
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*/
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/**
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* @brief ADC collection data structure
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*/
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typedef struct {
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uint8_t channel; /*!< The channel of collected data, is a value of
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@ref ADC_CHANNEL, @ref ADC1_CHANNEL or @ref ADC2_CHANNEL */
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uint16_t data; /*!< collected data */
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} ADC_Data;
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/**
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* @brief ADC initialization structure
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*/
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typedef struct
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{
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uint8_t ADC_PhaseCtrl; /*!< Phase between ADC1 and ADC2, is a value of @ref ADC_PHASE_CTRL */
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uint8_t ADC_VsenSelection; /*!< ADC1 VSEN selection, is a value of @ref ADC_VSEN */
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} ADC_InitTypeDef;
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/**
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* @brief ADC initialization
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* @note This function should be called at first before any other interfaces.
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* @param[in] init A pointer to structure ADC_InitTypeDef
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* @retval None
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*/
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void ADC_Init(ADC_InitTypeDef* init);
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/**
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* @brief Enable or disable ADC.
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @param[in] Enable The bit indicates if the specific ADC is enable or not
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* @retval None
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*/
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void ADC_Enable(uint8_t adc, BOOL enable);
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/**
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* @brief Enable or disable ADC interrupt.
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* @param[in] Int interrupt mask bits, which can be a combination of @ref ADC_INT
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* @param[in] Enable The bit indicates if specific interrupts are enable or not
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* @retval None
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*/
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void ADC_EnableInt(uint32_t Int, BOOL enable);
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/**
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* @brief Check specific interrupts are set or not
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* @param[in] Int interrupt mask bits, which can be a combination of @ref ADC_INT
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* @retval BOOL The bit indicates if the specific interrupts are set or not
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*/
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BOOL ADC_GetIntStatus(uint32_t Int);
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/**
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* @brief Clear specific interrupts
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* @param[in] Int interrupt mask bits, which can be a value of @ref ADC_INT
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* @retval None
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*/
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void ADC_ClearInt(uint32_t Int);
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/**
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* @brief ADC starts to convert data
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @param[in] convMode It should be a value of @ref ADC_CONVERSION
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* @param[in] channel It should be the value of @ref ADC1_CHANNEL
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* or @ref ADC2_CHANNEL according to parameter 'adc'
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* @retval BOOL The bit indicates if the specific ADC starts to convert data
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*/
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BOOL ADC_StartConversion(uint8_t adc, uint8_t convMode, uint32_t channel);
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/**
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* @brief ADC starts to calibrate and produces one sample
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @param[in] convMode It should be a value of @ref ADC_CALIBRATION
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* @retval BOOL The bit indicates if the specific ADC starts to convert data
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*/
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BOOL ADC_StartCalibration(uint8_t adc, uint8_t calibration);
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/**
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* @brief ADC stops conversion or calibration
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @retval NULL
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*/
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2014-08-30 00:19:16 +08:00
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void ADC_Stop(uint8_t adc);
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/**
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* @brief Check if ADC is busy or not
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @retval BOOL The bit indicates if the specific ADC is busy or not
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*/
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2014-08-30 00:19:16 +08:00
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BOOL ADC_IsBusy(uint8_t adc);
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/**
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* @brief Read data from ADC
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* @param[in] adc ADC peripheral, which is a value of @ref ADC_PERIPH
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* @param[in] Size Expected data size to be read
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* @param[out] data A user-allocated buffer to fetch data to be read
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* @retval uint8_t Actual read data size
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*/
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uint8_t ADC_Read(uint8_t adc, uint8_t size, ADC_Data* data);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__CMEM7_ADC_H */
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