2022-12-03 12:07:44 +08:00
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#ifndef RT_CONFIG_H__
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#define RT_CONFIG_H__
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/* RT-Thread Kernel */
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#define RT_NAME_MAX 20
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#define RT_USING_SMART
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#define RT_CPUS_NR 1
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#define RT_ALIGN_SIZE 8
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#define RT_THREAD_PRIORITY_256
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#define RT_THREAD_PRIORITY_MAX 256
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#define RT_TICK_PER_SECOND 100
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#define RT_USING_HOOK
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#define RT_HOOK_USING_FUNC_PTR
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#define RT_USING_IDLE_HOOK
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#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 16384
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#define RT_USING_TIMER_SOFT
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#define RT_TIMER_THREAD_PRIO 4
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#define RT_TIMER_THREAD_STACK_SIZE 16384
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#define RT_USING_CPU_USAGE_TRACER
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/* kservice optimization */
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2024-08-27 12:46:41 +08:00
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/* end of kservice optimization */
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/* klibc optimization */
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2024-11-20 08:42:41 +08:00
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#define RT_KLIBC_USING_VSNPRINTF_LONGLONG
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/* end of klibc optimization */
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2023-10-08 11:01:28 +08:00
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#define RT_USING_DEBUG
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#define RT_DEBUGING_ASSERT
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#define RT_DEBUGING_COLOR
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#define RT_DEBUGING_CONTEXT
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/* Inter-Thread communication */
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#define RT_USING_SEMAPHORE
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#define RT_USING_MUTEX
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#define RT_USING_EVENT
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#define RT_USING_MAILBOX
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#define RT_USING_MESSAGEQUEUE
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/* end of Inter-Thread communication */
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/* Memory Management */
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#define RT_PAGE_MAX_ORDER 11
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#define RT_USING_MEMPOOL
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#define RT_USING_SMALL_MEM
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#define RT_USING_SMALL_MEM_AS_HEAP
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#define RT_USING_MEMTRACE
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#define RT_USING_HEAP
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/* end of Memory Management */
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#define RT_USING_DEVICE
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#define RT_USING_DEVICE_OPS
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#define RT_USING_SCHED_THREAD_CTX
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLE_DEVICE_NAME "uart"
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#define RT_VER_NUM 0x50200
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#define RT_USING_STDC_ATOMIC
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#define RT_BACKTRACE_LEVEL_MAX_NR 32
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/* end of RT-Thread Kernel */
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#define ARCH_CPU_64BIT
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#define RT_USING_CACHE
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#define ARCH_MM_MMU
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#define KERNEL_VADDR_START 0x150000000
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#define ARCH_RISCV
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#define ARCH_RISCV_FPU
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#define ARCH_RISCV_FPU_D
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#define ARCH_RISCV64
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/* RT-Thread Components */
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
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#define RT_MAIN_THREAD_STACK_SIZE 16384
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#define RT_MAIN_THREAD_PRIORITY 10
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#define RT_USING_MSH
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#define RT_USING_FINSH
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#define FINSH_USING_MSH
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#define FINSH_THREAD_NAME "tshell"
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#define FINSH_THREAD_PRIORITY 20
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#define FINSH_THREAD_STACK_SIZE 8192
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#define FINSH_USING_HISTORY
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#define FINSH_HISTORY_LINES 5
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#define FINSH_USING_SYMTAB
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#define FINSH_CMD_SIZE 80
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#define MSH_USING_BUILT_IN_COMMANDS
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#define FINSH_USING_DESCRIPTION
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#define FINSH_ARG_MAX 10
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#define FINSH_USING_OPTION_COMPLETION
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/* DFS: device virtual file system */
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#define RT_USING_DFS
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#define DFS_USING_POSIX
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#define DFS_USING_WORKDIR
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#define DFS_FD_MAX 32
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#define RT_USING_DFS_V2
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#define RT_USING_DFS_ELMFAT
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/* elm-chan's FatFs, Generic FAT Filesystem Module */
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#define RT_DFS_ELM_CODE_PAGE 437
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#define RT_DFS_ELM_WORD_ACCESS
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#define RT_DFS_ELM_USE_LFN_3
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#define RT_DFS_ELM_USE_LFN 3
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#define RT_DFS_ELM_LFN_UNICODE_0
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#define RT_DFS_ELM_LFN_UNICODE 0
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#define RT_DFS_ELM_MAX_LFN 255
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#define RT_DFS_ELM_DRIVES 8
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#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
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#define RT_DFS_ELM_REENTRANT
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#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
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/* end of elm-chan's FatFs, Generic FAT Filesystem Module */
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#define RT_USING_DFS_DEVFS
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#define RT_USING_DFS_ROMFS
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#define RT_USING_DFS_PTYFS
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#define RT_USING_PAGECACHE
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/* page cache config */
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#define RT_PAGECACHE_COUNT 4096
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#define RT_PAGECACHE_ASPACE_COUNT 1024
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#define RT_PAGECACHE_PRELOAD 4
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#define RT_PAGECACHE_HASH_NR 1024
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#define RT_PAGECACHE_GC_WORK_LEVEL 90
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#define RT_PAGECACHE_GC_STOP_LEVEL 70
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/* end of page cache config */
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/* end of DFS: device virtual file system */
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#define RT_USING_FAL
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#define FAL_DEBUG_CONFIG
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#define FAL_DEBUG 1
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#define FAL_PART_HAS_TABLE_CFG
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/* Device Drivers */
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#define RT_USING_DEV_BUS
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#define RT_USING_DEVICE_IPC
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#define RT_UNAMED_PIPE_NUMBER 64
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#define RT_USING_SYSTEM_WORKQUEUE
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#define RT_SYSTEM_WORKQUEUE_STACKSIZE 8192
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#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
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#define RT_USING_SERIAL
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#define RT_USING_SERIAL_V1
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#define RT_SERIAL_USING_DMA
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#define RT_SERIAL_RB_BUFSZ 64
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#define RT_USING_I2C
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#define RT_USING_I2C_BITOPS
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#define RT_USING_NULL
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#define RT_USING_ZERO
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#define RT_USING_RANDOM
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#define RT_USING_PWM
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#define RT_USING_RTC
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#define RT_USING_WDT
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#define RT_USING_TOUCH
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#define RT_USING_PIN
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#define RT_USING_KTIME
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#define RT_USING_HWTIMER
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/* end of Device Drivers */
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/* C/C++ and POSIX layer */
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/* ISO-ANSI C layer */
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/* Timezone and Daylight Saving Time */
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#define RT_LIBC_USING_LIGHT_TZ_DST
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#define RT_LIBC_TZ_DEFAULT_HOUR 8
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#define RT_LIBC_TZ_DEFAULT_MIN 0
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#define RT_LIBC_TZ_DEFAULT_SEC 0
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/* end of Timezone and Daylight Saving Time */
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/* end of ISO-ANSI C layer */
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/* POSIX (Portable Operating System Interface) layer */
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#define RT_USING_POSIX_FS
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#define RT_USING_POSIX_DEVIO
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#define RT_USING_POSIX_STDIO
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#define RT_USING_POSIX_TERMIOS
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#define RT_USING_POSIX_DELAY
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#define RT_USING_POSIX_CLOCK
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#define RT_USING_POSIX_TIMER
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/* Interprocess Communication (IPC) */
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/* Socket is in the 'Network' category */
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/* end of Interprocess Communication (IPC) */
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/* end of POSIX (Portable Operating System Interface) layer */
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/* end of C/C++ and POSIX layer */
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/* Network */
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#define RT_USING_SAL
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#define SAL_INTERNET_CHECK
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/* Docking with protocol stacks */
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#define SAL_USING_LWIP
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/* end of Docking with protocol stacks */
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#define SAL_USING_POSIX
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#define RT_USING_NETDEV
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#define NETDEV_USING_IFCONFIG
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#define NETDEV_USING_PING
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#define NETDEV_USING_NETSTAT
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#define NETDEV_USING_AUTO_DEFAULT
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#define NETDEV_IPV4 1
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#define NETDEV_IPV6 0
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#define RT_USING_LWIP
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#define RT_USING_LWIP212
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#define RT_USING_LWIP_VER_NUM 0x20102
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#define RT_LWIP_MEM_ALIGNMENT 4
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#define RT_LWIP_IGMP
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#define RT_LWIP_ICMP
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#define RT_LWIP_DNS
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#define RT_LWIP_DHCP
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#define IP_SOF_BROADCAST 1
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#define IP_SOF_BROADCAST_RECV 1
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/* Static IPv4 Address */
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#define RT_LWIP_IPADDR "192.168.1.30"
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#define RT_LWIP_GWADDR "192.168.1.1"
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#define RT_LWIP_MSKADDR "255.255.255.0"
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/* end of Static IPv4 Address */
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#define RT_LWIP_UDP
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#define RT_LWIP_TCP
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#define RT_LWIP_RAW
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#define RT_MEMP_NUM_NETCONN 8
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#define RT_LWIP_PBUF_NUM 16
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#define RT_LWIP_RAW_PCB_NUM 4
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#define RT_LWIP_UDP_PCB_NUM 4
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#define RT_LWIP_TCP_PCB_NUM 4
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#define RT_LWIP_TCP_SEG_NUM 40
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#define RT_LWIP_TCP_SND_BUF 8196
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#define RT_LWIP_TCP_WND 8196
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#define RT_LWIP_TCPTHREAD_PRIORITY 10
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#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
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#define RT_LWIP_TCPTHREAD_STACKSIZE 8192
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#define RT_LWIP_ETHTHREAD_PRIORITY 12
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#define RT_LWIP_ETHTHREAD_STACKSIZE 8192
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#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
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#define RT_LWIP_REASSEMBLY_FRAG
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#define LWIP_NETIF_STATUS_CALLBACK 1
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#define LWIP_NETIF_LINK_CALLBACK 1
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#define RT_LWIP_NETIF_NAMESIZE 6
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#define SO_REUSE 1
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#define LWIP_SO_RCVTIMEO 1
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#define LWIP_SO_SNDTIMEO 1
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#define LWIP_SO_RCVBUF 1
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#define LWIP_SO_LINGER 0
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#define LWIP_NETIF_LOOPBACK 0
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#define RT_LWIP_USING_PING
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/* end of Network */
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/* Memory protection */
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/* end of Memory protection */
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/* Utilities */
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#define RT_USING_RESOURCE_ID
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#define RT_USING_ADT
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#define RT_USING_ADT_AVL
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#define RT_USING_ADT_BITMAP
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#define RT_USING_ADT_HASHMAP
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#define RT_USING_ADT_REF
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/* end of Utilities */
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#define RT_USING_LWP
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#define RT_LWP_MAX_NR 30
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#define LWP_TASK_STACK_SIZE 16384
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#define RT_CH_MSG_MAX_NR 1024
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#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024
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#define LWP_TID_MAX_NR 64
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#define RT_LWP_SHM_MAX_NR 64
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#define RT_USING_LDSO
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2024-08-27 12:46:41 +08:00
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|
|
#define LWP_USING_TERMINAL
|
|
|
|
#define LWP_PTY_MAX_PARIS_LIMIT 64
|
2024-03-21 11:05:08 +08:00
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|
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|
|
/* Memory management */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of Memory management */
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/* Using USB legacy version */
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|
|
/* end of Using USB legacy version */
|
|
|
|
/* end of RT-Thread Components */
|
2022-12-03 12:07:44 +08:00
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|
2023-03-31 16:49:48 +08:00
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/* RT-Thread Utestcases */
|
2022-12-03 12:07:44 +08:00
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|
|
2024-08-27 12:46:41 +08:00
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|
|
/* end of RT-Thread Utestcases */
|
2022-12-03 12:07:44 +08:00
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|
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|
|
/* RT-Thread online packages */
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|
|
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|
/* IoT - internet of things */
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/* Wi-Fi */
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/* Marvell WiFi */
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2024-08-27 12:46:41 +08:00
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/* end of Marvell WiFi */
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2022-12-03 12:07:44 +08:00
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/* Wiced WiFi */
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2024-08-27 12:46:41 +08:00
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/* end of Wiced WiFi */
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2022-12-03 12:07:44 +08:00
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2024-03-21 11:05:08 +08:00
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/* CYW43012 WiFi */
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2024-08-27 12:46:41 +08:00
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/* end of CYW43012 WiFi */
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2024-03-21 11:05:08 +08:00
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/* BL808 WiFi */
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2024-08-27 12:46:41 +08:00
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/* end of BL808 WiFi */
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2024-03-21 11:05:08 +08:00
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/* CYW43439 WiFi */
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2024-08-27 12:46:41 +08:00
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|
/* end of CYW43439 WiFi */
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|
/* end of Wi-Fi */
|
2024-03-21 11:05:08 +08:00
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|
2022-12-03 12:07:44 +08:00
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/* IoT Cloud */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of IoT Cloud */
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/* end of IoT - internet of things */
|
2022-12-03 12:07:44 +08:00
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/* security packages */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of security packages */
|
2022-12-03 12:07:44 +08:00
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|
/* language packages */
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/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
2022-12-03 12:07:44 +08:00
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|
/* XML: Extensible Markup Language */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of XML: Extensible Markup Language */
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|
/* end of language packages */
|
2022-12-03 12:07:44 +08:00
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|
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|
/* multimedia packages */
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|
/* LVGL: powerful and easy-to-use embedded GUI library */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of LVGL: powerful and easy-to-use embedded GUI library */
|
2022-12-03 12:07:44 +08:00
|
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|
|
/* u8g2: a monochrome graphic library */
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|
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|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of u8g2: a monochrome graphic library */
|
|
|
|
/* end of multimedia packages */
|
2022-12-03 12:07:44 +08:00
|
|
|
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|
|
/* tools packages */
|
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|
2024-08-27 12:46:41 +08:00
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|
/* end of tools packages */
|
2022-12-03 12:07:44 +08:00
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|
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|
/* system packages */
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|
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|
/* enhanced kernel services */
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|
2024-08-27 12:46:41 +08:00
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|
/* end of enhanced kernel services */
|
2022-12-03 12:07:44 +08:00
|
|
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|
/* acceleration: Assembly language or algorithmic acceleration packages */
|
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|
2024-08-27 12:46:41 +08:00
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|
/* end of acceleration: Assembly language or algorithmic acceleration packages */
|
2022-12-03 12:07:44 +08:00
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|
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
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|
2024-08-27 12:46:41 +08:00
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|
/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
2022-12-03 12:07:44 +08:00
|
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|
|
/* Micrium: Micrium software products porting for RT-Thread */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Micrium: Micrium software products porting for RT-Thread */
|
|
|
|
/* end of system packages */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
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|
/* peripheral libraries and drivers */
|
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|
2024-03-21 11:05:08 +08:00
|
|
|
/* HAL & SDK Drivers */
|
2023-03-31 16:49:48 +08:00
|
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|
2024-03-21 11:05:08 +08:00
|
|
|
/* STM32 HAL & SDK Drivers */
|
2023-03-31 16:49:48 +08:00
|
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|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of STM32 HAL & SDK Drivers */
|
2022-12-03 12:07:44 +08:00
|
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|
|
|
|
/* Kendryte SDK */
|
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|
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|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Kendryte SDK */
|
|
|
|
/* end of HAL & SDK Drivers */
|
2022-12-03 12:07:44 +08:00
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|
|
|
2024-03-21 11:05:08 +08:00
|
|
|
/* sensors drivers */
|
|
|
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|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of sensors drivers */
|
2024-03-21 11:05:08 +08:00
|
|
|
|
|
|
|
/* touch drivers */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of touch drivers */
|
|
|
|
/* end of peripheral libraries and drivers */
|
2024-03-21 11:05:08 +08:00
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
/* AI packages */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of AI packages */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* Signal Processing and Control Algorithm Packages */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Signal Processing and Control Algorithm Packages */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
/* miscellaneous packages */
|
|
|
|
|
|
|
|
/* project laboratory */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of project laboratory */
|
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
/* samples: kernel and components samples */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of samples: kernel and components samples */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* entertainment: terminal games and other interesting software packages */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of entertainment: terminal games and other interesting software packages */
|
|
|
|
/* end of miscellaneous packages */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* Arduino libraries */
|
|
|
|
|
|
|
|
|
2023-10-08 11:01:28 +08:00
|
|
|
/* Projects and Demos */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Projects and Demos */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Sensors */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Sensors */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Display */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Display */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Timing */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Timing */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Data Processing */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Data Processing */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* Data Storage */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* Communication */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Communication */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* Device Control */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Device Control */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* Other */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Other */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Signal IO */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Signal IO */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* Uncategorized */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Arduino libraries */
|
|
|
|
/* end of RT-Thread online packages */
|
2022-12-03 12:07:44 +08:00
|
|
|
#define BOARD_allwinnerd1
|
|
|
|
#define ENABLE_FPU
|
|
|
|
#define __STACKSIZE__ 16384
|
|
|
|
|
|
|
|
/* General Drivers Configuration */
|
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
#define BSP_USING_M7
|
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
/* General Purpose UARTs */
|
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
#define BSP_USING_UART0
|
|
|
|
#define UART0_TX_USING_GPIOB8
|
|
|
|
#define UART0_RX_USING_GPIOB9
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of General Purpose UARTs */
|
2022-12-03 12:07:44 +08:00
|
|
|
#define BSP_USING_WDT
|
|
|
|
#define BSP_USING_RTC
|
2023-03-31 16:49:48 +08:00
|
|
|
#define BSP_USING_SDMMC
|
|
|
|
#define SD_CARD_CHECK
|
|
|
|
#define BSP_USING_FS
|
|
|
|
|
|
|
|
/* Board extended module Drivers */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Board extended module Drivers */
|
|
|
|
/* end of General Drivers Configuration */
|
2022-12-03 12:07:44 +08:00
|
|
|
#define RT_USING_SUNXI_HAL
|
|
|
|
|
|
|
|
/* UART Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_UART
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of UART Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* CCMU Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_CCMU
|
|
|
|
#define DRIVERS_SUNXI_CLK
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of CCMU Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* DMA Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_DMA
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of DMA Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* GPIO Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_GPIO
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of GPIO Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* Video support for sunxi */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of Video support for sunxi */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
|
|
|
/* SDMMC Devices */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of SDMMC Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* SPI Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_SPI
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of SPI Devices */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
/* TWI Devices */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of TWI Devices */
|
2022-12-03 12:07:44 +08:00
|
|
|
|
2023-03-31 16:49:48 +08:00
|
|
|
/* G2D Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_G2D
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of G2D Devices */
|
2023-03-31 16:49:48 +08:00
|
|
|
#define DRIVERS_USB
|
|
|
|
|
|
|
|
/* USB HOST */
|
|
|
|
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of USB HOST */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* USB DEVICE */
|
|
|
|
|
|
|
|
#define USB_DEVICE
|
|
|
|
#define HAL_TEST_UDC
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of USB DEVICE */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* CE Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_CE
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of CE Devices */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
|
|
|
/* EFUSE Devices */
|
|
|
|
|
|
|
|
#define DRIVERS_EFUSE
|
2024-08-27 12:46:41 +08:00
|
|
|
/* end of EFUSE Devices */
|
2023-03-31 16:49:48 +08:00
|
|
|
|
2022-12-03 12:07:44 +08:00
|
|
|
#endif
|