2017-08-08 11:56:50 +08:00
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/*
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2021-03-17 02:26:35 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2017-08-08 11:56:50 +08:00
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*
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2018-10-22 11:02:14 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2017-08-08 11:56:50 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2017-08-08 Yang the first version
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*/
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2021-03-17 02:26:35 +08:00
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2017-08-08 11:56:50 +08:00
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "fsl_iocon.h"
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#include "fsl_gpio.h"
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#include "fsl_i2c.h"
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#ifdef RT_USING_I2C
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#ifdef RT_USING_I2C_BITOPS
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2017-11-10 19:47:53 +08:00
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struct lpc_i2c_bit_data
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2017-08-08 11:56:50 +08:00
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{
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struct
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{
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GPIO_Type *base;
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uint32_t port;
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uint32_t pin;
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} scl, sda;
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};
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static void gpio_set_sda(void *data, rt_int32_t state)
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{
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2017-11-10 19:47:53 +08:00
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struct lpc_i2c_bit_data *bd = data;
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2017-08-08 11:56:50 +08:00
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if (state)
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{
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//bd->sda.base->B[bd->sda.port][bd->sda.pin] = 1;
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GPIO_WritePinOutput(bd->sda.base, bd->sda.port, bd->sda.pin, 1);
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}
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else
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{
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GPIO_WritePinOutput(bd->sda.base, bd->sda.port, bd->sda.pin, 0);
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}
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}
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static void gpio_set_scl(void *data, rt_int32_t state)
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{
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2017-11-10 19:47:53 +08:00
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struct lpc_i2c_bit_data *bd = data;
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2017-08-08 11:56:50 +08:00
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if (state)
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{
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//bd->scl.base->B[bd->sda.port][bd->sda.pin] = 1;
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GPIO_WritePinOutput(bd->scl.base, bd->scl.port, bd->scl.pin, 1);
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}
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else
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{
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//bd->scl.base->B[bd->sda.port][bd->sda.pin] = 0;
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2019-05-22 15:04:55 +08:00
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GPIO_WritePinOutput(bd->scl.base, bd->scl.port, bd->scl.pin, 0);
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2017-08-08 11:56:50 +08:00
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}
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}
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static rt_int32_t gpio_get_sda(void *data)
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{
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2017-11-10 19:47:53 +08:00
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struct lpc_i2c_bit_data *bd = data;
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2017-08-08 11:56:50 +08:00
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return GPIO_ReadPinInput(bd->sda.base, bd->sda.port, bd->sda.pin) & 0x01;
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}
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static rt_int32_t gpio_get_scl(void *data)
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{
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2017-11-10 19:47:53 +08:00
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struct lpc_i2c_bit_data *bd = data;
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2017-08-08 11:56:50 +08:00
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return GPIO_ReadPinInput(bd->scl.base, bd->scl.port, bd->scl.pin) & 0x01;
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}
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static void gpio_udelay(rt_uint32_t us)
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{
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volatile rt_int32_t i;
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for (; us > 0; us--)
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{
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i = 10;
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while (i--);
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}
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}
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#else /* RT_USING_I2C_BITOPS */
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#define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */
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#define IOCON_PIO_FUNC0 0x00u /*!< Selects pin function 0 */
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#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
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#define IOCON_PIO_FUNC6 0x06u /*!< Selects pin function 6 */
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#define IOCON_PIO_I2CDRIVE_HIGH 0x0400u /*!< High drive: 20 mA */
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#define IOCON_PIO_I2CFILTER_EN 0x00u /*!< I2C 50 ns glitch filter enabled */
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#define IOCON_PIO_I2CSLEW_I2C 0x00u /*!< I2C mode */
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#define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
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#define IOCON_PIO_MODE_PULLUP 0x20u /*!< Selects pull-up function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
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#define IOCON_PIO_SLEW_FAST 0x0400u /*!< Fast mode, slew rate control is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
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#define PIN0_IDX 0u /*!< Pin number for pin 0 in a port 3 */
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#define PIN1_IDX 1u /*!< Pin number for pin 1 in a port 3 */
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#define PIN2_IDX 2u /*!< Pin number for pin 2 in a port 0 */
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#define PIN3_IDX 3u /*!< Pin number for pin 3 in a port 0 */
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#define PIN4_IDX 4u /*!< Pin number for pin 4 in a port 0 */
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#define PIN5_IDX 5u /*!< Pin number for pin 5 in a port 0 */
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#define PIN6_IDX 6u /*!< Pin number for pin 6 in a port 0 */
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#define PIN7_IDX 7u /*!< Pin number for pin 7 in a port 0 */
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#define PIN8_IDX 8u /*!< Pin number for pin 8 in a port 0 */
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#define PIN9_IDX 9u /*!< Pin number for pin 9 in a port 0 */
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#define PIN10_IDX 10u /*!< Pin number for pin 10 in a port 1 */
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#define PIN11_IDX 11u /*!< Pin number for pin 11 in a port 1 */
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#define PIN12_IDX 12u /*!< Pin number for pin 12 in a port 1 */
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#define PIN13_IDX 13u /*!< Pin number for pin 13 in a port 1 */
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#define PIN14_IDX 14u /*!< Pin number for pin 14 in a port 1 */
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#define PIN15_IDX 15u /*!< Pin number for pin 15 in a port 0 */
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#define PIN16_IDX 16u /*!< Pin number for pin 16 in a port 1 */
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#define PIN18_IDX 18u /*!< Pin number for pin 18 in a port 0 */
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#define PIN19_IDX 19u /*!< Pin number for pin 19 in a port 0 */
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#define PIN20_IDX 20u /*!< Pin number for pin 20 in a port 0 */
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#define PIN21_IDX 21u /*!< Pin number for pin 21 in a port 0 */
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#define PIN22_IDX 22u /*!< Pin number for pin 22 in a port 2 */
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#define PIN23_IDX 23u /*!< Pin number for pin 23 in a port 1 */
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#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port 1 */
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#define PIN25_IDX 25u /*!< Pin number for pin 25 in a port 1 */
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#define PIN26_IDX 26u /*!< Pin number for pin 26 in a port 1 */
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#define PIN27_IDX 27u /*!< Pin number for pin 27 in a port 1 */
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#define PIN28_IDX 28u /*!< Pin number for pin 28 in a port 1 */
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#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */
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#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */
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#define PIN31_IDX 31u /*!< Pin number for pin 31 in a port 1 */
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#define PORT0_IDX 0u /*!< Port index */
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#define PORT1_IDX 1u /*!< Port index */
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#define PORT2_IDX 2u /*!< Port index */
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#define PORT3_IDX 3u /*!< Port index */
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struct lpc_i2c_bus
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{
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struct rt_i2c_bus_device parent;
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I2C_Type *I2C;
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};
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus,
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2017-08-08 11:56:50 +08:00
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struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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i2c_master_transfer_t xfer = {0};
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rt_uint32_t i;
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2023-03-17 12:12:16 +08:00
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rt_err_t ret = -RT_ERROR;
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2017-08-08 11:56:50 +08:00
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struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus *)bus;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_RD)
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kI2C_Read;
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xfer.subaddress = 1;
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xfer.subaddressSize = 1;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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xfer.flags = kI2C_TransferDefaultFlag;
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if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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else
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kI2C_Write;
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xfer.subaddress = 0;
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xfer.subaddressSize = 1;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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xfer.flags = kI2C_TransferDefaultFlag;
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if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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}
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ret = i;
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out:
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i2c_dbg("send stop condition\n");
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return ret;
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}
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static const struct rt_i2c_bus_device_ops i2c_ops =
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{
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lpc_i2c_xfer,
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RT_NULL,
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RT_NULL
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};
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#endif /* RT_USING_I2C_BITOPS */
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int rt_hw_i2c_init(void)
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{
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#ifdef RT_USING_I2C_BITOPS
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/* register I2C1: SCL/P0_20 SDA/P0_19 */
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{
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static struct rt_i2c_bus_device i2c_device;
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2017-11-10 19:47:53 +08:00
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static const struct lpc_i2c_bit_data _i2c_bdata =
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2017-08-08 11:56:50 +08:00
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{
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/* SCL */ {GPIO, 3, 24},
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/* SDA */ {GPIO, 3, 23},
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};
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static const struct rt_i2c_bit_ops _i2c_bit_ops =
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{
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(void*)&_i2c_bdata,
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gpio_set_sda,
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gpio_set_scl,
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gpio_get_sda,
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gpio_get_scl,
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gpio_udelay,
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5,
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100
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};
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gpio_pin_config_t pin_config = {
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kGPIO_DigitalOutput, 0,
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};
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CLOCK_EnableClock(kCLOCK_Gpio3);
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/* Enable touch panel controller */
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GPIO_PinInit(GPIO, _i2c_bdata.sda.port, _i2c_bdata.sda.pin, &pin_config);
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GPIO_PinInit(GPIO, _i2c_bdata.scl.port, _i2c_bdata.scl.pin, &pin_config);
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2019-05-22 15:04:55 +08:00
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GPIO_WritePinOutput(GPIO, _i2c_bdata.sda.port, _i2c_bdata.sda.pin, 1);
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GPIO_WritePinOutput(GPIO, _i2c_bdata.scl.port, _i2c_bdata.scl.pin, 1);
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2017-08-08 11:56:50 +08:00
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i2c_device.priv = (void *)&_i2c_bit_ops;
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rt_i2c_bit_add_bus(&i2c_device, "i2c2");
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} /* register I2C */
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#else /* RT_USING_I2C_BITOPS */
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static struct lpc_i2c_bus lpc_i2c2;
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/* attach 12 MHz clock to FLEXCOMM2 (I2C master for touch controller) */
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
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const uint32_t port3_pin23_config = (
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IOCON_PIO_FUNC1 | /* Pin is configured as FC2_CTS_SDA_SSEL0 */
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IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
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IOCON_PIO_INV_DI | /* Input function is not inverted */
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IOCON_PIO_DIGITAL_EN | /* Enables digital function */
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IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
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IOCON_PIO_I2CDRIVE_HIGH | /* High drive: 20 mA */
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IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
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);
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IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN23_IDX, port3_pin23_config); /* PORT3 PIN23 (coords: C2) is configured as FC2_CTS_SDA_SSEL0 */
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const uint32_t port3_pin24_config = (
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IOCON_PIO_FUNC1 | /* Pin is configured as FC2_RTS_SCL_SSEL1 */
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IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
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IOCON_PIO_INV_DI | /* Input function is not inverted */
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IOCON_PIO_DIGITAL_EN | /* Enables digital function */
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IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
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IOCON_PIO_I2CDRIVE_HIGH | /* High drive: 20 mA */
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IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
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);
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IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN24_IDX, port3_pin24_config); /* PORT3 PIN24 (coords: E2) is configured as FC2_RTS_SCL_SSEL1 */
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{
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i2c_master_config_t masterConfig;
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I2C_MasterGetDefaultConfig(&masterConfig);
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/* Change the default baudrate configuration */
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masterConfig.baudRate_Bps = 100000U;
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/* Initialize the I2C master peripheral */
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I2C_MasterInit(I2C2, &masterConfig, 12000000);
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}
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rt_memset((void *)&lpc_i2c2, 0, sizeof(struct lpc_i2c_bus));
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lpc_i2c2.parent.ops = &i2c_ops;
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lpc_i2c2.I2C = I2C2;
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rt_i2c_bus_device_register(&lpc_i2c2.parent, "i2c2");
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#endif /* RT_USING_I2C_BITOPS */
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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#endif /* RT_USING_I2C */
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