2024-01-29 09:13:21 +08:00
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/01/11 flyingcys The first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "interrupt.h"
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#include "encoding.h"
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#include "mmio.h"
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2024-10-24 05:08:29 +08:00
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extern rt_atomic_t rt_interrupt_nest;
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2024-01-29 09:13:21 +08:00
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extern rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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extern rt_uint32_t rt_thread_switch_interrupt_flag;
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struct rt_irq_desc isr_table[INTERRUPTS_MAX];
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static void plic_enable_irq(int irq)
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{
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uint32_t mask = (irq);
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uint32_t value = 0;
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if(irq < 16) {
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rt_kprintf("unmask irq_num is %d\n",irq);
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return;
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}
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value = mmio_read_32(PLIC_ENABLE1 + 4 * (mask / 32));
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value |= (0x1 << (mask % 32));
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mmio_write_32((PLIC_ENABLE1 + (mask / 32) * 4), value);
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}
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static void plic_disable_irq(int irq)
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{
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uint32_t mask = (irq);
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uint32_t value = 0;
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if(irq < 16) {
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rt_kprintf("mask irq_num is %d\n", irq);
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return;
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}
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value = mmio_read_32(PLIC_ENABLE1 + 4 * (mask / 32));
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value &= ~(0x1 << (mask % 32));
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mmio_write_32((PLIC_ENABLE1 + (mask / 32) * 4), value);
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}
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static void plic_set_priority(int irq, int priority)
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{
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mmio_write_32((PLIC_PRIORITY0 + irq * 4), priority);
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}
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static void plic_set_threshold(uint32_t threshold)
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{
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mmio_write_32((PLIC_THRESHOLD), threshold);
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}
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void plic_init(void)
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{
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int i;
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for (i = 0; i < IRQ_MAX_NR / 4; i = i + 4)
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{
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mmio_write_32(((uintptr_t) PLIC_PRIORITY0 + i), 0);
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}
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for ( i = 0; i < IRQ_MAX_NR / 32; i ++)
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{
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mmio_write_32((PLIC_PENDING1 + i * 4), 0);
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mmio_write_32((PLIC_ENABLE1 + i * 4), 0);
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}
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plic_set_threshold(0);
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/* Enable machine external interrupts. */
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set_csr(mie, MIP_MEIP);
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}
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static void rt_hw_interrupt_handler(int vector, void *param)
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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/* init interrupt controller */
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plic_init();
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rt_int32_t idx;
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rt_memset(isr_table, 0x00, sizeof(isr_table));
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for (idx = 0; idx < INTERRUPTS_MAX; idx++)
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{
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isr_table[idx].handler = rt_hw_interrupt_handler;
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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if ((vector < 0) || (vector > IRQ_MAX_NR))
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{
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return;
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}
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plic_disable_irq(vector);
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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if ((vector < 0) || (vector > IRQ_MAX_NR))
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{
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return;
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}
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plic_enable_irq(vector);
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param handler the interrupt service routine to be installed
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* @param param the interrupt service function parameter
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* @param name the interrupt name
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* @return old handler
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, const char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if ((vector < 0) || (vector > IRQ_MAX_NR))
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{
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return old_handler;
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}
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old_handler = isr_table[vector].handler;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
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#endif /* RT_USING_INTERRUPT_INFO */
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isr_table[vector].handler = handler;
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isr_table[vector].param = param;
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// set highest priority
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plic_set_priority(vector, 7);
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return old_handler;
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}
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void rt_hw_irq_isr(void)
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{
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int irq = mmio_read_32(PLIC_CLAIM);
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rt_isr_handler_t isr;
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void *param;
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if (irq < 0 || irq >= IRQ_MAX_NR)
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{
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rt_kprintf("bad irq number %d!\n", irq);
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return;
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}
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if (!irq) // irq = 0 => no irq
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{
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rt_kprintf("no irq!\n");
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return;
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}
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isr = isr_table[irq].handler;
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param = isr_table[irq].param;
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if (isr != RT_NULL)
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{
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isr(irq, param);
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}
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mmio_write_32(PLIC_CLAIM, irq);
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// clear external interrupt pending
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clear_csr(mip, MIP_MEIP);
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}
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