2021-09-17 07:23:10 +08:00
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# GD32 系列 BSP 制作教程
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2022-01-02 09:14:03 +08:00
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## 1. BSP 框架介绍
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2021-09-17 07:23:10 +08:00
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BSP 框架结构如下图所示:
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![BSP 框架图](./figures/frame.png)
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2022-01-02 09:14:03 +08:00
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GD32的BSP架构主要分为三个部分:libraries、tools和具体的Boards,其中libraries包含了GD32的通用库,包括每个系列的Firmware Library以及适配RT-Thread的drivers;tools是生成工程的Python脚本工具;另外就是Boards文件,当然这里的Boards有很多,我这里值列举了GD32407V-START。
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2021-09-17 07:23:10 +08:00
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## 2. 知识准备
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制作一个 BSP 的过程就是构建一个新系统的过程,因此想要制作出好用的 BSP,要对 RT-Thread 系统的构建过程有一定了解,需要的知识准备如下所示:
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- 掌握 GD32 系列 BSP 的使用方法
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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了解 BSP 的使用方法,可以阅读 [BSP 说明文档](../README.md) 中使用教程表格内的文档。
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- 了解 Scons 工程构建方法
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2021-09-17 07:23:10 +08:00
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RT-Thread 使用 Scons 作为系统的构建工具,因此了解 Scons 的常用命令对制作新 BSP 是基本要求。
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- 了解设备驱动框架
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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在 RT-Thread 系统中,应用程序通过设备驱动框架来操作硬件,因此了解设备驱动框架,对添加 BSP 驱动是很重要的。
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- 了解 Kconfig 语法
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2022-01-02 09:14:03 +08:00
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RT-Thread 系统通过 menuconfig 的方式进行配置,而 menuconfig 中的选项是由 Kconfig 文件决定的,因此想要对 RT-Thread 系统进行配置,需要对 kconfig 语法有一定了解。
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2021-09-17 07:23:10 +08:00
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## 3. BSP移植
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### 3.1 Keil环境准备
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目前市面通用的MDK for ARM版本有Keil 4和Keil 5:使用Keil 4建议安装4.74及以上;使用Keil 5建议安装5.20以上版本。本文的MDK是5.30。
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从MDK的官网可以下载得到MDK的安装包,然后安装即可。
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[MDK下载地址](https://www.keil.com/download/product/)
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![MDK_KEIL](./figures/mdk_keil.png)
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安装完成后会自动打开,我们将其关闭。
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接下来我们下载GD32F30x的软件支持包。
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[下载地址](http://www.gd32mcu.com/cn/download)
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![Download](./figures/dowmload.png)
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下载好后双击GigaDevice.GD32F4xx_DFP.2.1.0.pack运行即可:
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![install paxk](./figures/install_pack.png)
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点击[Next]即可安装完成。
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![finish](./figures/pack_finish.png)
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安装成功后,重新打开Keil,则可以在File->Device Database中出现Gigadevice的下拉选项,点击可以查看到相应的型号。
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![Gigadevice](./figures/Gigadevice.png)
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### 3.2 BSP工程制作
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**1.构建基础工程**
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首先看看RT-Thread代码仓库中已有很多BSP,而我要移植的是Cortex-M4内核。这里我找了一个相似的内核,把它复制一份,并修改文件名为:gd32407v-start。这样就有一个基础的工程。然后就开始增删改查,完成最终的BSP,几乎所有的BSP的制作都是如此。
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**2.修改BSP构建脚本**
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bsp/gd32/gd32407v-start/Kconfig修改后的内容如下:
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```config
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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```
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该文件是获取所有路径下的Kconfig。
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bsp/gd32/gd32407v-start/SConscript修改后的内容如下:
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```python
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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```
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该文件是用于遍历当前目录的所有文件夹。
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bsp/gd32/gd32407v-start/SConstruct修改后的内容如下:
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2021-09-17 07:23:10 +08:00
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```python
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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2022-01-02 09:14:03 +08:00
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gd32_library = 'GD32F4xx_Firmware_Library'
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rtconfig.BSP_LIBRARY_TYPE = gd32_library
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'Drivers', 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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```
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2022-01-02 09:14:03 +08:00
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该文件用于链接所有的依赖文件,并调用make进行编译。
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2021-09-17 07:23:10 +08:00
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**3.修改开发环境信息**
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bsp/gd32/gd32407v-start/cconfig.h修改后的内容如下:
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2021-09-17 07:23:10 +08:00
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```c
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#ifndef CCONFIG_H__
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#define CCONFIG_H__
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/* Automatically generated file; DO NOT EDIT. */
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/* compiler configure file for RT-Thread in GCC*/
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#define HAVE_NEWLIB_H 1
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#define LIBC_VERSION "newlib 2.4.0"
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#define HAVE_SYS_SIGNAL_H 1
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#define HAVE_SYS_SELECT_H 1
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#define HAVE_PTHREAD_H 1
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#define HAVE_FDSET 1
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#define HAVE_SIGACTION 1
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#define GCC_VERSION_STR "5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496]"
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#define STDC "2011"
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#endif
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```
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2022-01-02 09:14:03 +08:00
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该文件是是编译BSP的环境信息,需根据实际修改。
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2021-09-17 07:23:10 +08:00
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**4.修改KEIL的模板工程**
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双击:template.uvprojx即可修改模板工程。
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修改为对应芯片设备:
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![Chip](./figures/chip.png)
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修改FLASH和RAM的配置:
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![storage](./figures/storage.png)
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修改可执行文件名字:
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![rename](./figures/rename.png)
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修改默认调试工具:CMSIS-DAP Debugger。
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![Debug](./figures/debug.png)
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修改编程算法:GD32F4xx FMC。
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![FMC](./figures/FMC.png)
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**5.修改board文件夹**
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(1) 修改bsp/gd32/gd32407v-start/board/linker_scripts/link.icf
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修改后的内容如下:
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```
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/*###ICF### Section handled by ICF editor, don't touch! /
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x082FFFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x2000;
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define symbol __ICFEDIT_size_heap__ = 0x2000;
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/ End of ICF editor section. ###ICF###*/
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export symbol __ICFEDIT_region_RAM_end__;
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define symbol __region_RAM1_start__ = 0x10000000;
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define symbol __region_RAM1_end__ = 0x1000FFFF;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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place in RAM1_region { section .sram };
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```
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2022-01-02 09:14:03 +08:00
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该文件是IAR编译的链接脚本,根据《GD32F407xx_Datasheet_Rev2.1》可知,GD32F407VKT6的flash大小为3072KB,SRAM大小为192KB,因此需要设置ROM和RAM的起始地址和堆栈大小等。
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2021-09-17 07:23:10 +08:00
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(2) 修改bsp/gd32/gd32407v-start/board/linker_scripts/link.ld
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修改后的内容如下:
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```
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/* Program Entry, set to mark it as "used" and avoid gc */
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MEMORY
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{
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CODE (rx) : ORIGIN = 0x08000000, LENGTH = 3072k /* 3072KB flash */
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DATA (rw) : ORIGIN = 0x20000000, LENGTH = 192k /* 192KB sram */
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}
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ENTRY(Reset_Handler)
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_system_stack_size = 0x200;
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_stext = .;
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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. = ALIGN(4);
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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. = ALIGN(4);
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_etext = .;
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} > CODE = 0
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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/* This is used by the startup in order to initialize the .data secion */
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_sidata = .;
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} > CODE
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__exidx_end = .;
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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/* .data section which is used for initialized data */
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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.data : AT (_sidata)
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_sdata = . ;
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_edata = . ;
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} >DATA
|
2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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.stack :
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{
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. = . + _system_stack_size;
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. = ALIGN(4);
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_estack = .;
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|
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} >DATA
|
2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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__bss_start = .;
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.bss :
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .;
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2022-01-02 09:14:03 +08:00
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2021-09-17 07:23:10 +08:00
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*(.bss)
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*(.bss.*)
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*(COMMON)
|
2022-01-02 09:14:03 +08:00
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|
2021-09-17 07:23:10 +08:00
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_ebss = . ;
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2022-01-02 09:14:03 +08:00
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|
2021-09-17 07:23:10 +08:00
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*(.bss.init)
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} > DATA
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__bss_end = .;
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2022-01-02 09:14:03 +08:00
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|
2021-09-17 07:23:10 +08:00
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_end = .;
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2022-01-02 09:14:03 +08:00
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|
2021-09-17 07:23:10 +08:00
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/* Stabs debugging sections. */
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|
.stab 0 : { *(.stab) }
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|
.stabstr 0 : { *(.stabstr) }
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|
|
|
|
.stab.excl 0 : { *(.stab.excl) }
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|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
|
|
|
|
.stab.index 0 : { *(.stab.index) }
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|
|
|
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
|
|
|
|
.comment 0 : { *(.comment) }
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|
|
|
|
/* DWARF debug sections.
|
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|
|
|
* Symbols in the DWARF debugging sections are relative to the beginning
|
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|
* of the section so we begin them at 0. */
|
|
|
|
|
/* DWARF 1 */
|
|
|
|
|
.debug 0 : { *(.debug) }
|
|
|
|
|
.line 0 : { *(.line) }
|
|
|
|
|
/* GNU DWARF 1 extensions */
|
|
|
|
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
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|
|
|
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
|
|
|
|
/* DWARF 1.1 and DWARF 2 */
|
|
|
|
|
.debug_aranges 0 : { *(.debug_aranges) }
|
|
|
|
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
|
|
|
|
/* DWARF 2 */
|
|
|
|
|
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
|
|
|
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
|
|
|
|
.debug_line 0 : { *(.debug_line) }
|
|
|
|
|
.debug_frame 0 : { *(.debug_frame) }
|
|
|
|
|
.debug_str 0 : { *(.debug_str) }
|
|
|
|
|
.debug_loc 0 : { *(.debug_loc) }
|
|
|
|
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
|
|
|
|
/* SGI/MIPS DWARF 2 extensions */
|
|
|
|
|
.debug_weaknames 0 : { *(.debug_weaknames) }
|
|
|
|
|
.debug_funcnames 0 : { *(.debug_funcnames) }
|
|
|
|
|
.debug_typenames 0 : { *(.debug_typenames) }
|
|
|
|
|
.debug_varnames 0 : { *(.debug_varnames) }
|
|
|
|
|
}
|
|
|
|
|
```
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
该文件是GCC编译的链接脚本,根据《GD32F407xx_Datasheet_Rev2.1》可知,GD32F407VKT6的flash大小为3072KB,SRAM大小为192KB,因此CODE和DATA 的LENGTH分别设置为3072KB和192KB,其他芯片类似,但其实地址都是一样的。
|
|
|
|
|
|
|
|
|
|
(3) 修改bsp/gd32/gd32407v-start/board/linker_scripts/link.sct
|
|
|
|
|
修改后的内容如下:
|
|
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|
|
|
|
|
|
|
```
|
|
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; *************************************************************
|
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|
|
; *** Scatter-Loading Description File generated by uVision ***
|
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|
|
|
; *************************************************************
|
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LR_IROM1 0x08000000 0x00300000 { ; load region size_region
|
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|
|
ER_IROM1 0x08000000 0x00300000 { ; load address = execution address
|
|
|
|
|
*.o (RESET, +First)
|
|
|
|
|
*(InRoot$$Sections)
|
|
|
|
|
.ANY (+RO)
|
|
|
|
|
}
|
|
|
|
|
RW_IRAM1 0x20000000 0x00030000 { ; RW data
|
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|
|
|
.ANY (+RW +ZI)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
```
|
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|
2022-01-02 09:14:03 +08:00
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|
|
该文件是MDK的连接脚本,根据《GD32F407xx_Datasheet_Rev2.1》手册,因此需要将 LR_IROM1 和 ER_IROM1 的参数设置为 0x00300000;RAM 的大小为192k,因此需要将 RW_IRAM1 的参数设置为 0x00030000。
|
2021-09-17 07:23:10 +08:00
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|
|
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(4) 修改bsp/gd32/gd32407v-start/board/board.h文件
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修改后内容如下:
|
2022-01-02 09:14:03 +08:00
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|
|
|
2021-09-17 07:23:10 +08:00
|
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|
```c
|
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|
|
#ifndef __BOARD_H__
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#define __BOARD_H__
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#include "gd32f4xx.h"
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#include "drv_usart.h"
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#include "drv_gpio.h"
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#include "gd32f4xx_exti.h"
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#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */
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#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */
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// <o> Internal SRAM memory size[Kbytes] <8-64>
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// <i>Default: 64
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|
|
#ifdef __ICCARM__
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// Use *.icf ram symbal, to avoid hardcode.
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extern char __ICFEDIT_region_RAM_end__;
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#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__
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#else
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#define GD32_SRAM_SIZE 192
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#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
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#endif
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|
|
#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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|
|
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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|
|
#elif __ICCARM__
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|
#pragma section="HEAP"
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|
|
#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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#endif
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|
|
#define HEAP_END GD32_SRAM_END
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#endif
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```
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|
2022-01-02 09:14:03 +08:00
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|
值得注意的是,不同的编译器规定的堆栈内存的起始地址 HEAP_BEGIN 和结束地址 HEAP_END。这里 HEAP_BEGIN 和 HEAP_END 的值需要和前面的链接脚本是一致的,需要结合实际去修改。
|
2021-09-17 07:23:10 +08:00
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(5) 修改bsp/gd32/gd32407v-start/board/board.c文件
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修改后的文件如下:
|
2022-01-02 09:14:03 +08:00
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|
2021-09-17 07:23:10 +08:00
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```c
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|
#include <stdint.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <board.h>
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/**
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|
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|
|
* @brief This function is executed in case of error occurrence.
|
|
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|
* @param None
|
|
|
|
|
* @retval None
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|
|
|
|
*/
|
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|
|
|
void Error_Handler(void)
|
|
|
|
|
{
|
|
|
|
|
/* USER CODE BEGIN Error_Handler */
|
|
|
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
/* USER CODE END Error_Handler */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/** System Clock Configuration
|
|
|
|
|
*/
|
|
|
|
|
void SystemClock_Config(void)
|
|
|
|
|
{
|
|
|
|
|
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
|
|
|
|
NVIC_SetPriority(SysTick_IRQn, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* This is the timer interrupt service routine.
|
|
|
|
|
*
|
|
|
|
|
*/
|
|
|
|
|
void SysTick_Handler(void)
|
|
|
|
|
{
|
|
|
|
|
/* enter interrupt */
|
|
|
|
|
rt_interrupt_enter();
|
|
|
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|
rt_tick_increase();
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|
|
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|
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|
|
/* leave interrupt */
|
|
|
|
|
rt_interrupt_leave();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* This function will initial GD32 board.
|
|
|
|
|
*/
|
|
|
|
|
void rt_hw_board_init()
|
|
|
|
|
{
|
|
|
|
|
/* NVIC Configuration */
|
|
|
|
|
#define NVIC_VTOR_MASK 0x3FFFFF80
|
|
|
|
|
#ifdef VECT_TAB_RAM
|
|
|
|
|
/* Set the Vector Table base location at 0x10000000 */
|
|
|
|
|
SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
|
|
|
|
|
#else /* VECT_TAB_FLASH */
|
|
|
|
|
/* Set the Vector Table base location at 0x08000000 */
|
|
|
|
|
SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
SystemClock_Config();
|
|
|
|
|
|
|
|
|
|
#ifdef RT_USING_COMPONENTS_INIT
|
|
|
|
|
rt_components_board_init();
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef RT_USING_CONSOLE
|
|
|
|
|
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
|
|
|
|
#endif
|
|
|
|
|
|
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|
|
|
#ifdef BSP_USING_SDRAM
|
|
|
|
|
rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END);
|
|
|
|
|
#else
|
|
|
|
|
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
```
|
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
|
该文件重点关注的就是SystemClock_Config配置,SystemCoreClock的定义在system_gd32f4xx.c中定义的。
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
(6) 修改bsp/gd32/gd32407v-start/board/Kconfig文件
|
|
|
|
|
修改后内容如下:
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
```config
|
|
|
|
|
menu "Hardware Drivers Config"
|
2022-01-02 09:14:03 +08:00
|
|
|
|
config SOC_SERIES_GD32F4xx
|
|
|
|
|
default y
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
config SOC_GD32407V
|
|
|
|
|
bool
|
2022-01-02 09:14:03 +08:00
|
|
|
|
select SOC_SERIES_GD32F4xx
|
2021-09-17 07:23:10 +08:00
|
|
|
|
select RT_USING_COMPONENTS_INIT
|
|
|
|
|
select RT_USING_USER_MAIN
|
|
|
|
|
default y
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
menu "Onboard Peripheral Drivers"
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
menu "On-chip Peripheral Drivers"
|
|
|
|
|
|
|
|
|
|
config BSP_USING_GPIO
|
|
|
|
|
bool "Enable GPIO"
|
|
|
|
|
select RT_USING_PIN
|
|
|
|
|
default y
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
menuconfig BSP_USING_UART
|
|
|
|
|
bool "Enable UART"
|
|
|
|
|
default y
|
|
|
|
|
select RT_USING_SERIAL
|
|
|
|
|
if BSP_USING_UART
|
|
|
|
|
config BSP_USING_UART1
|
|
|
|
|
bool "Enable UART1"
|
|
|
|
|
default y
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
config BSP_UART1_RX_USING_DMA
|
|
|
|
|
bool "Enable UART1 RX DMA"
|
|
|
|
|
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
|
|
|
|
default n
|
|
|
|
|
endif
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
menuconfig BSP_USING_SPI
|
|
|
|
|
bool "Enable SPI BUS"
|
|
|
|
|
default n
|
|
|
|
|
select RT_USING_SPI
|
|
|
|
|
if BSP_USING_SPI
|
|
|
|
|
config BSP_USING_SPI1
|
|
|
|
|
bool "Enable SPI1 BUS"
|
|
|
|
|
default n
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
config BSP_SPI1_TX_USING_DMA
|
|
|
|
|
bool "Enable SPI1 TX DMA"
|
|
|
|
|
depends on BSP_USING_SPI1
|
|
|
|
|
default n
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
config BSP_SPI1_RX_USING_DMA
|
|
|
|
|
bool "Enable SPI1 RX DMA"
|
|
|
|
|
depends on BSP_USING_SPI1
|
|
|
|
|
select BSP_SPI1_TX_USING_DMA
|
|
|
|
|
default n
|
|
|
|
|
endif
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
menuconfig BSP_USING_I2C1
|
|
|
|
|
bool "Enable I2C1 BUS (software simulation)"
|
|
|
|
|
default n
|
|
|
|
|
select RT_USING_I2C
|
|
|
|
|
select RT_USING_I2C_BITOPS
|
|
|
|
|
select RT_USING_PIN
|
|
|
|
|
if BSP_USING_I2C1
|
|
|
|
|
config BSP_I2C1_SCL_PIN
|
|
|
|
|
int "i2c1 scl pin number"
|
|
|
|
|
range 1 216
|
|
|
|
|
default 24
|
|
|
|
|
config BSP_I2C1_SDA_PIN
|
|
|
|
|
int "I2C1 sda pin number"
|
|
|
|
|
range 1 216
|
|
|
|
|
default 25
|
|
|
|
|
endif
|
2022-01-02 09:14:03 +08:00
|
|
|
|
source "../libraries/gd32_drivers/Kconfig"
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
menu "Board extended module Drivers"
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
```
|
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
|
这个文件就是配置板子驱动的,这里可根据实际需求添加。
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
(7) 修改bsp/gd32/gd32407v-start/board/SConscript文件
|
|
|
|
|
|
|
|
|
|
修改后内容如下:
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
```python
|
|
|
|
|
import os
|
|
|
|
|
import rtconfig
|
|
|
|
|
from building import *
|
|
|
|
|
|
|
|
|
|
Import('SDK_LIB')
|
|
|
|
|
|
|
|
|
|
cwd = GetCurrentDir()
|
|
|
|
|
|
|
|
|
|
# add general drivers
|
|
|
|
|
src = Split('''
|
|
|
|
|
board.c
|
|
|
|
|
''')
|
|
|
|
|
|
|
|
|
|
path = [cwd]
|
|
|
|
|
|
|
|
|
|
startup_path_prefix = SDK_LIB
|
|
|
|
|
|
|
|
|
|
if rtconfig.CROSS_TOOL == 'gcc':
|
2022-01-02 09:14:03 +08:00
|
|
|
|
src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/GCC/startup_gd32f4xx.s']
|
2021-09-17 07:23:10 +08:00
|
|
|
|
elif rtconfig.CROSS_TOOL == 'keil':
|
2022-01-02 09:14:03 +08:00
|
|
|
|
src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/ARM/startup_gd32f4xx.s']
|
2021-09-17 07:23:10 +08:00
|
|
|
|
elif rtconfig.CROSS_TOOL == 'iar':
|
2022-01-02 09:14:03 +08:00
|
|
|
|
src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/IAR/startup_gd32f4xx.s']
|
|
|
|
|
|
|
|
|
|
CPPDEFINES = ['GD32F407']
|
2021-09-17 07:23:10 +08:00
|
|
|
|
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
|
|
|
|
|
|
|
|
|
Return('group')
|
|
|
|
|
```
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
该文件主要添加board文件夹的.c文件和头文件路径。另外根据开发环境选择相应的汇编文件,和前面的libraries的SConscript语法是一样,文件的结构都是类似的,这里就没有注释了。
|
|
|
|
|
|
|
|
|
|
到这里,基本所有的依赖脚本都配置完成了,接下来将通过menuconfig配置工程。
|
|
|
|
|
|
|
|
|
|
**6.menuconfig配置**
|
|
|
|
|
关闭套接字抽象层。
|
|
|
|
|
|
|
|
|
|
![Disable socket](./figures/disable_socket.png)
|
|
|
|
|
|
|
|
|
|
关闭网络设备接口。
|
|
|
|
|
|
|
|
|
|
![Disable net](./figures/disable_net.png)
|
|
|
|
|
|
|
|
|
|
关闭LWIP协议栈。
|
|
|
|
|
|
|
|
|
|
![Disable lwip](./figures/disable_lwip.png)
|
|
|
|
|
|
|
|
|
|
GD32407V-START板载没有以太网,因此这里主要是关闭网络相关的内容,当然GD32407V-START的资源丰富,不关这些其实也不影响,如果是其他MCU,根据实际需求自行修改吧。
|
|
|
|
|
|
|
|
|
|
**7.驱动修改**
|
|
|
|
|
一个基本的BSP中,串口是必不可少的,所以还需要编写串口驱动,这里使用的串口2作为调试串口。
|
|
|
|
|
板子上还有LED灯,主要要编写GPIO驱动即可。
|
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
|
关于串口和LED的驱动可以查看源码,这里就不贴出来了。
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
**8.应用开发**
|
|
|
|
|
|
|
|
|
|
笔者在applications的main.c中添加LED的应用代码,
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
```c
|
|
|
|
|
#include <stdio.h>
|
|
|
|
|
#include <rtthread.h>
|
|
|
|
|
#include <rtdevice.h>
|
|
|
|
|
#include <board.h>
|
|
|
|
|
|
|
|
|
|
/* defined the LED2 pin: PC6 */
|
|
|
|
|
#define LED2_PIN GET_PIN(C, 6)
|
|
|
|
|
|
|
|
|
|
int main(void)
|
|
|
|
|
{
|
|
|
|
|
int count = 1;
|
|
|
|
|
|
|
|
|
|
/* set LED2 pin mode to output */
|
|
|
|
|
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
while (count++)
|
|
|
|
|
{
|
|
|
|
|
rt_pin_write(LED2_PIN, PIN_HIGH);
|
|
|
|
|
rt_thread_mdelay(500);
|
|
|
|
|
rt_pin_write(LED2_PIN, PIN_LOW);
|
|
|
|
|
rt_thread_mdelay(500);
|
|
|
|
|
}
|
2022-01-02 09:14:03 +08:00
|
|
|
|
|
2021-09-17 07:23:10 +08:00
|
|
|
|
return RT_EOK;
|
|
|
|
|
}
|
|
|
|
|
```
|
|
|
|
|
|
2022-01-02 09:14:03 +08:00
|
|
|
|
当然,这需要GPIO驱动的支持。
|
2021-09-17 07:23:10 +08:00
|
|
|
|
|
|
|
|
|
**9.使用ENV编译工程**
|
|
|
|
|
在env中执行:scons
|
|
|
|
|
|
|
|
|
|
![scons](./figures/scons.png)
|
|
|
|
|
|
|
|
|
|
编译成功打印信息如下:
|
|
|
|
|
|
|
|
|
|
![scons_success](./figures/scons_success.png)
|
|
|
|
|
|
|
|
|
|
**10.使用env生成MDK工程**
|
|
|
|
|
在env中执行:scons --target=mdk5
|
|
|
|
|
|
|
|
|
|
![scons_mdk5](./figures/scons_mdk5.png)
|
|
|
|
|
|
|
|
|
|
生成MDK工程后,打开MDK工程进行编译
|
|
|
|
|
|
|
|
|
|
![MDK Build](./figures/MDK_Build.png)
|
|
|
|
|
|
|
|
|
|
成功编译打印信息如下:
|
|
|
|
|
|
|
|
|
|
![MDK Build success](./figures/MDK_Build_Success.png)
|
|
|
|
|
|
|
|
|
|
### 3.3 使用GD-Link 下载调试GD32
|
|
|
|
|
|
|
|
|
|
前面使用ENV和MDK成功编译可BSP,那么接下来就是下载调试环节,下载需要下载器,而GD32部分开发板自带GD-link,可以用开发板上自带的GD-link调试仿真代码,不带的可外接GD-link模块,还是很方便的。具体操作方法如下。
|
|
|
|
|
|
|
|
|
|
1.第一次使用GD-link插入电脑后,会自动安装驱动。
|
|
|
|
|
|
|
|
|
|
在Options for Target -> Debug 中选择“CMSIS-DAP Debugger”,部分客户反馈找不到这一驱动器选项,那是因为MDK版本过低,只有Keil4.74以上的版本和Keil5才支持CMSIS-DAP Debugger选项。
|
|
|
|
|
|
|
|
|
|
![CMSIS-DAP Debugger](./figures/CMSIS-DAP_Debugger.png)
|
|
|
|
|
|
|
|
|
|
2.在Options for Target -> Debug ->Settings勾选SWJ、 Port选择 SW。右框IDcode会出现”0xXBAXXXXX”。
|
|
|
|
|
|
|
|
|
|
![setting1](./figures/setting1.png)
|
|
|
|
|
|
|
|
|
|
3.在Options for Target -> Debug ->Settings -> Flash Download中添加GD32的flash算法。
|
|
|
|
|
|
|
|
|
|
![setting2](./figures/setting2.png)
|
|
|
|
|
|
|
|
|
|
4.单击下图的快捷方式“debug”, 即可使用GD-Link进行仿真。
|
|
|
|
|
|
|
|
|
|
![GD link debug](./figures/gdlink_debug.png)
|
|
|
|
|
|
|
|
|
|
当然啦,也可使用GD-Link下载程序。
|
|
|
|
|
|
|
|
|
|
![GD link download](./figures/gdlink_download.png)
|
|
|
|
|
|
|
|
|
|
下载程序成功后,打印信息如下:
|
|
|
|
|
|
|
|
|
|
![download success](./figures/download_success.png)
|
|
|
|
|
|
|
|
|
|
接上串口,打印信息如下:
|
|
|
|
|
|
|
|
|
|
![UART print](./figures/com_print.png)
|
|
|
|
|
|
|
|
|
|
同时LED会不断闪烁。
|
|
|
|
|
|
|
|
|
|
### 3.4 RT-Thread studio开发
|
|
|
|
|
|
|
|
|
|
当然,该工程也可导出使用rt-thread studio开发。
|
|
|
|
|
|
|
|
|
|
先使用scons --dist导出工程。
|
|
|
|
|
|
|
|
|
|
![scons dist](./figures/scons_dist.png)
|
|
|
|
|
|
|
|
|
|
再将工程导入rt-thread studio中
|
|
|
|
|
|
|
|
|
|
![import_rt-thread_studio](./figures/import_rt-thread_studio.png)
|
|
|
|
|
|
|
|
|
|
最后,就可在rt-thread studio就可进行开发工作了。
|
|
|
|
|
|
|
|
|
|
![rt-thread_studio](./figures/rt-thread_studio.png)
|
|
|
|
|
|
|
|
|
|
## 4. 规范
|
|
|
|
|
|
|
|
|
|
本章节介绍 RT-Thread GD32 系列 BSP 制作与提交时应当遵守的规范 。开发人员在 BSP 制作完成后,可以根据本规范提出的检查点对制作的 BSP 进行检查,确保 BSP 在提交前有较高的质量 。
|
|
|
|
|
|
|
|
|
|
### 4.1 BSP 制作规范
|
|
|
|
|
|
|
|
|
|
GD32 BSP 的制作规范主要分为 3 个方面:工程配置,ENV 配置和 IDE 配置。在已有的 GD32 系列 BSP 的模板中,已经根据下列规范对模板进行配置。在制作新 BSP 的过程中,拷贝模板进行修改时,需要注意的是不要修改这些默认的配置。BSP 制作完成后,需要对新制作的 BSP 进行功能测试,功能正常后再进行代码提交。
|
|
|
|
|
|
|
|
|
|
下面将详细介绍 BSP 的制作规范。
|
|
|
|
|
|
|
|
|
|
#### 4.1.1 工程配置
|
|
|
|
|
|
|
|
|
|
- 遵从RT-Thread 编码规范,代码注释风格统一
|
|
|
|
|
- main 函数功能保持一致
|
|
|
|
|
- 如果有 LED 的话,main 函数里**只放一个** LED 1HZ 闪烁的程序
|
|
|
|
|
- 在 `rt_hw_board_init` 中需要完成堆的初始化:调用 `rt_system_heap_init`
|
|
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- 默认只初始化 GPIO 驱动和 FinSH 对应的串口驱动,不使用 DMA
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- 当使能板载外设驱动时,应做到不需要修改代码就能编译下载使用
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- 提交前应检查 GCC/MDK/IAR 三种编译器直接编译或者重新生成后编译是否成功
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- 使用 `dist` 命令对 BSP 进行发布,检查使用 `dist` 命令生成的工程是否可以正常使用
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#### 4.1.2 ENV 配置
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- 系统心跳统一设置为 1000(宏:RT_TICK_PER_SECOND)
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- BSP 中需要打开调试选项中的断言(宏:RT_DEBUG)
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- 系统空闲线程栈大小统一设置为 256(宏:IDLE_THREAD_STACK_SIZE)
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- 开启组件自动初始化(宏:RT_USING_COMPONENTS_INIT)
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- 需要开启 user main 选项(宏:RT_USING_USER_MAIN)
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2022-01-02 09:14:03 +08:00
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- 默认关闭 libc(宏:RT_USING_LIBC)
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2021-09-17 07:23:10 +08:00
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- FinSH 默认只使用 MSH 模式(宏:FINSH_USING_MSH_ONLY)
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#### 4.1.3 IDE 配置
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- 使能下载代码后自动运行
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- 使能 C99 支持
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- 使能 One ELF Section per Function(MDK)
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- MDK/IAR 生成的临时文件分别放到build下的 MDK/IAR 文件夹下
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- MDK/GCC/IAR 生成 bin 文件名字统一成 rtthread.bin
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### 4.2 BSP 提交规范
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- 提交前请认真修改 BSP 的 README.md 文件,README.md 文件的外设支持表单只填写 BSP 支持的外设,可参考其他 BSP 填写。查看文档[《GD32系列驱动介绍》](./GD32系列驱动介绍.md)了解驱动分类。
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- 提交 BSP 分为 2 个阶段提交:
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- 第一阶段:基础 BSP 包括串口驱动和 GPIO 驱动,能运行 FinSH 控制台。完成 MDK4、MDK5 、IAR 和 GCC 编译器支持,如果芯片不支持某款编译器(比如MDK4)可以不用做。 BSP 的 README.md 文件需要填写第二阶段要完成的驱动。
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- 第二阶段:完成板载外设驱动支持,所有板载外设使用 menuconfig 配置后就能直接使用。若开发板没有板载外设,则此阶段可以不用完成。不同的驱动要分开提交,方便 review 和合并。
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- 只提交 BSP 必要的文件,删除无关的中间文件,能够提交的文件请对照其他 BSP。
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- 提交 GD32 不同系列的 Library 库时,请参考 f1/f4 系列的 HAL 库,删除多余库文件
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- 提交前要对 BSP 进行编译测试,确保在不同编译器下编译正常
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- 提交前要对 BSP 进行功能测试,确保 BSP 的在提交前符合工程配置章节中的要求
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