105 lines
4.9 KiB
C
105 lines
4.9 KiB
C
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-09-25 tangzz98 the first version
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*/
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#ifndef __MPU_H__
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#define __MPU_H__
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#ifdef RT_USING_MEM_PROTECTION
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#include <board.h>
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#define MPU_MIN_REGION_SIZE 32U
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/* MPU attributes for configuring data region permission */
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/* Privileged No Access, Unprivileged No Access */
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#define P_NA_U_NA ((0x0 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* Privileged Read Write, Unprivileged No Access */
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#define P_RW_U_NA ((0x1 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* Privileged Read Write, Unprivileged Read Only */
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#define P_RW_U_RO ((0x2 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* Privileged Read Write, Unprivileged Read Write */
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#define P_RW_U_RW ((0x3 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* Privileged Read Only, Unprivileged No Access */
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#define P_RO_U_NA ((0x5 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* Privileged Read Only, Unprivileged Read Only */
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#define P_RO_U_RO ((0x6 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk | MPU_RASR_XN_Msk)
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/* MPU attributes for configuring code region permission */
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/* Privileged Read Write Execute, Unprivileged Read Write Execute */
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#define P_RWX_U_RWX ((0x3 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)
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/* Privileged Read Write Execute, Unprivileged Read Execute */
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#define P_RWX_U_RX ((0x2 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)
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/* Privileged Read Write Execute, Unprivileged No Access */
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#define P_RWX_U_NA ((0x1 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)
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/* Privileged Read Execute, Unprivileged Read Execute */
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#define P_RX_U_RX ((0x6 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)
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/* Privileged Read Execute, Unprivileged No Access */
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#define P_RX_U_NA ((0x5 << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)
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/* MPU attributes for configuring memory type, cacheability and shareability */
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#define STRONGLY_ORDERED_SHAREABLE MPU_RASR_S_Msk
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#define DEVICE_SHAREABLE (MPU_RASR_B_Msk | MPU_RASR_S_Msk)
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#define NORMAL_OUTER_INNER_WRITE_THROUGH_SHAREABLE \
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(MPU_RASR_C_Msk | MPU_RASR_S_Msk)
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#define NORMAL_OUTER_INNER_WRITE_THROUGH_NON_SHAREABLE MPU_RASR_C_Msk
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#define NORMAL_OUTER_INNER_WRITE_BACK_SHAREABLE \
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(MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
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#define NORMAL_OUTER_INNER_WRITE_BACK_NON_SHAREABLE \
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(MPU_RASR_C_Msk | MPU_RASR_B_Msk)
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#define NORMAL_OUTER_INNER_NON_CACHEABLE_SHAREABLE \
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((1 << MPU_RASR_TEX_Pos) | MPU_RASR_S_Msk)
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#define NORMAL_OUTER_INNER_NON_CACHEABLE_NON_SHAREABLE \
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(1 << MPU_RASR_TEX_Pos)
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#define NORMAL_OUTER_INNER_WRITE_BACK_WRITE_READ_ALLOCATE_SHAREABLE \
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((1 << MPU_RASR_TEX_Pos) |\
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MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
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#define NORMAL_OUTER_INNER_WRITE_BACK_WRITE_READ_ALLOCATE_NON_SHAREABLE \
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((1 << MPU_RASR_TEX_Pos) | MPU_RASR_C_Msk | MPU_RASR_B_Msk)
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#define DEVICE_NON_SHAREABLE (2 << MPU_RASR_TEX_Pos)
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#define RESERVED ((2 << MPU_RASR_TEX_Pos) | MPU_RASR_B_Msk)
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typedef struct
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{
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rt_thread_t thread; /* Thread that triggered exception */
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void *addr; /* Address of faulting memory access */
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rt_mem_region_t region; /* Configurations of the memory region containing the address */
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rt_uint8_t mmfsr; /* Content of MemManage Status Register */
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} rt_mem_exception_info_t;
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typedef void (*rt_hw_mpu_exception_hook_t)(rt_mem_exception_info_t *);
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#define RT_ARM_MEM_ATTR(perm, type) ((rt_mem_attr_t){ (perm) | (type)})
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/* Convenient macros for configuring data region attributes with default memory type */
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#define RT_MEM_REGION_P_NA_U_NA RT_ARM_MEM_ATTR(P_NA_U_NA, RESERVED)
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#define RT_MEM_REGION_P_RW_U_RW RT_ARM_MEM_ATTR(P_RW_U_RW, RESERVED)
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#define RT_MEM_REGION_P_RW_U_RO RT_ARM_MEM_ATTR(P_RW_U_RO, RESERVED)
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#define RT_MEM_REGION_P_RW_U_NA RT_ARM_MEM_ATTR(P_RW_U_NA, RESERVED)
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#define RT_MEM_REGION_P_RO_U_RO RT_ARM_MEM_ATTR(P_RO_U_RO, RESERVED)
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#define RT_MEM_REGION_P_RO_U_NA RT_ARM_MEM_ATTR(P_RO_U_NA, RESERVED)
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/* Convenient macros for configuring code region attributes with default memory type */
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#define RT_MEM_REGION_P_RWX_U_RWX RT_ARM_MEM_ATTR(P_RWX_U_RWX, RESERVED)
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#define RT_MEM_REGION_P_RWX_U_RX RT_ARM_MEM_ATTR(P_RWX_U_RX, RESERVED)
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#define RT_MEM_REGION_P_RWX_U_NA RT_ARM_MEM_ATTR(P_RWX_U_NA, RESERVED)
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#define RT_MEM_REGION_P_RX_U_RX RT_ARM_MEM_ATTR(P_RX_U_RX, RESERVED)
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#define RT_MEM_REGION_P_RX_U_NA RT_ARM_MEM_ATTR(P_RX_U_NA, RESERVED)
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rt_bool_t rt_hw_mpu_region_valid(rt_mem_region_t *region);
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rt_err_t rt_hw_mpu_init(void);
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rt_err_t rt_hw_mpu_add_region(rt_thread_t thread, rt_mem_region_t *region);
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rt_err_t rt_hw_mpu_delete_region(rt_thread_t thread, rt_mem_region_t *region);
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rt_err_t rt_hw_mpu_update_region(rt_thread_t thread, rt_mem_region_t *region);
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rt_err_t rt_hw_mpu_exception_set_hook(rt_hw_mpu_exception_hook_t hook);
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#endif /* RT_USING_MEM_PROTECTION */
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#endif /* __MPU_H__ */
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