248 lines
11 KiB
C
248 lines
11 KiB
C
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/*
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* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-06-21 CDT first version
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*/
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#ifndef __TMR_CONFIG_H__
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#define __TMR_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_TMRA_1
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#ifndef TMRA_1_CONFIG
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#define TMRA_1_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_1, \
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.clock_source = CLK_BUS_PCLK0, \
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.clock = FCG2_PERIPH_TMRA_1, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_1_OVF, \
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.enIRQn = BSP_USING_TMRA_1_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_1_IRQ_PRIO, \
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}, \
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.name = "tmra_1" \
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}
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#endif /* TMRA_1_CONFIG */
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#endif /* BSP_USING_TMRA_1 */
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#ifdef BSP_USING_TMRA_2
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#ifndef TMRA_2_CONFIG
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#define TMRA_2_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_2, \
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.clock_source = CLK_BUS_PCLK0, \
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.clock = FCG2_PERIPH_TMRA_2, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_2_OVF, \
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.enIRQn = BSP_USING_TMRA_2_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_2_IRQ_PRIO, \
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}, \
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.name = "tmra_2" \
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}
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#endif /* TMRA_2_CONFIG */
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#endif /* BSP_USING_TMRA_2 */
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#ifdef BSP_USING_TMRA_3
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#ifndef TMRA_3_CONFIG
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#define TMRA_3_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_3, \
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.clock_source = CLK_BUS_PCLK0, \
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.clock = FCG2_PERIPH_TMRA_3, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_3_OVF, \
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.enIRQn = BSP_USING_TMRA_3_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_3_IRQ_PRIO, \
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}, \
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.name = "tmra_3" \
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}
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#endif /* TMRA_3_CONFIG */
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#endif /* BSP_USING_TMRA_3 */
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#ifdef BSP_USING_TMRA_4
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#ifndef TMRA_4_CONFIG
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#define TMRA_4_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_4, \
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.clock_source = CLK_BUS_PCLK0, \
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.clock = FCG2_PERIPH_TMRA_4, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_4_OVF, \
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.enIRQn = BSP_USING_TMRA_4_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_4_IRQ_PRIO, \
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}, \
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.name = "tmra_4" \
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}
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#endif /* TMRA_4_CONFIG */
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#endif /* BSP_USING_TMRA_4 */
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#ifdef BSP_USING_TMRA_5
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#ifndef TMRA_5_CONFIG
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#define TMRA_5_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_5, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_5, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_5_OVF, \
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.enIRQn = BSP_USING_TMRA_5_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_5_IRQ_PRIO, \
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}, \
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.name = "tmra_5" \
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}
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#endif /* TMRA_5_CONFIG */
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#endif /* BSP_USING_TMRA_5 */
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#ifdef BSP_USING_TMRA_6
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#ifndef TMRA_6_CONFIG
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#define TMRA_6_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_6, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_6, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_6_OVF, \
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.enIRQn = BSP_USING_TMRA_6_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_6_IRQ_PRIO, \
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}, \
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.name = "tmra_6" \
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}
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#endif /* TMRA_6_CONFIG */
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#endif /* BSP_USING_TMRA_6 */
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#ifdef BSP_USING_TMRA_7
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#ifndef TMRA_7_CONFIG
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#define TMRA_7_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_7, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_7, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_7_OVF, \
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.enIRQn = BSP_USING_TMRA_7_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_7_IRQ_PRIO, \
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}, \
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.name = "tmra_7" \
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}
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#endif /* TMRA_7_CONFIG */
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#endif /* BSP_USING_TMRA_7 */
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#ifdef BSP_USING_TMRA_8
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#ifndef TMRA_8_CONFIG
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#define TMRA_8_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_8, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_8, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_8_OVF, \
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.enIRQn = BSP_USING_TMRA_8_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_8_IRQ_PRIO, \
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}, \
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.name = "tmra_8" \
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}
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#endif /* TMRA_8_CONFIG */
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#endif /* BSP_USING_TMRA_8 */
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#ifdef BSP_USING_TMRA_9
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#ifndef TMRA_9_CONFIG
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#define TMRA_9_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_9, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_9, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_9_OVF, \
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.enIRQn = BSP_USING_TMRA_9_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_9_IRQ_PRIO, \
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}, \
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.name = "tmra_9" \
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}
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#endif /* TMRA_9_CONFIG */
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#endif /* BSP_USING_TMRA_9 */
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#ifdef BSP_USING_TMRA_10
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#ifndef TMRA_10_CONFIG
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#define TMRA_10_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_10, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_10, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_10_OVF, \
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.enIRQn = BSP_USING_TMRA_10_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_10_IRQ_PRIO, \
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}, \
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.name = "tmra_10" \
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}
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#endif /* TMRA_10_CONFIG */
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#endif /* BSP_USING_TMRA_10 */
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#ifdef BSP_USING_TMRA_11
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#ifndef TMRA_11_CONFIG
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#define TMRA_11_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_11, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_11, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_11_OVF, \
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.enIRQn = BSP_USING_TMRA_11_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_11_IRQ_PRIO, \
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}, \
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.name = "tmra_11" \
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}
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#endif /* TMRA_11_CONFIG */
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#endif /* BSP_USING_TMRA_11 */
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#ifdef BSP_USING_TMRA_12
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#ifndef TMRA_12_CONFIG
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#define TMRA_12_CONFIG \
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{ \
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.tmr_handle = CM_TMRA_12, \
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.clock_source = CLK_BUS_PCLK1, \
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.clock = FCG2_PERIPH_TMRA_12, \
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.flag = TMRA_FLAG_OVF, \
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.isr = \
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{ \
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.enIntSrc = INT_SRC_TMRA_12_OVF, \
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.enIRQn = BSP_USING_TMRA_12_IRQ_NUM, \
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.u8Int_Prio = BSP_USING_TMRA_12_IRQ_PRIO, \
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}, \
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.name = "tmra_12" \
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}
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#endif /* TMRA_12_CONFIG */
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#endif /* BSP_USING_TMRA_12 */
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#endif /* __TMR_CONFIG_H__ */
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