2021-08-20 16:37:50 +08:00
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/*
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2022-07-26 10:11:12 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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2021-08-20 16:37:50 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2021-08-27 15:19:21 +08:00
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* 2021-08-27 Jiao first version
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*/
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2021-08-20 16:37:50 +08:00
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#include "drv_usart.h"
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#include "drv_config.h"
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#ifdef RT_USING_SERIAL
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//#define DRV_DEBUG
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#define LOG_TAG "drv.usart"
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#include <drv_log.h>
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enum
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{
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#ifdef BSP_USING_UART0
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UART0_INDEX,
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#endif
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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#ifdef BSP_USING_UART4
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UART4_INDEX,
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#endif
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#ifdef BSP_USING_UART5
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UART5_INDEX,
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#endif
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#ifdef BSP_USING_LPUART0
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LPUART0_INDEX,
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#endif
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#ifdef BSP_USING_LPUART1
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LPUART1_INDEX,
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#endif
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};
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static struct _uart_config uart_config[] =
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{
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#ifdef BSP_USING_UART0
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UART0_CONFIG,
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#endif
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#ifdef BSP_USING_UART1
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UART1_CONFIG,
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#endif
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#ifdef BSP_USING_UART4
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UART4_CONFIG,
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#endif
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#ifdef BSP_USING_UART5
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UART5_CONFIG,
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#endif
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#ifdef BSP_USING_LPUART0
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LPUART0_CONFIG,
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#endif
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#ifdef BSP_USING_LPUART1
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LPUART1_CONFIG,
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#endif
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};
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static struct _uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
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static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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2021-08-27 15:19:21 +08:00
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extern FL_ErrorStatus FL_UART_GPIO_Init(UART_Type * UARTx);
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2021-08-20 16:37:50 +08:00
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struct _uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = rt_container_of(serial, struct _uart, serial);
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2021-08-27 15:19:21 +08:00
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if (FL_UART_GPIO_Init(uart->config->InitTypeDef) != FL_PASS)
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2021-08-20 16:37:50 +08:00
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{
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return -RT_ERROR;
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}
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2021-08-27 15:19:21 +08:00
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2021-08-20 16:37:50 +08:00
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uart->handle.clockSrc = uart->config->clockSrc;
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uart->handle.baudRate = cfg->baud_rate;
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2021-08-27 15:19:21 +08:00
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switch (cfg->data_bits)
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2021-08-20 16:37:50 +08:00
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{
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case DATA_BITS_8:
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uart->handle.dataWidth = FL_UART_DATA_WIDTH_8B;
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break;
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case DATA_BITS_9:
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uart->handle.dataWidth = FL_UART_DATA_WIDTH_9B;
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break;
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default:
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uart->handle.dataWidth = FL_UART_DATA_WIDTH_8B;
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break;
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}
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2021-08-27 15:19:21 +08:00
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switch (cfg->stop_bits)
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2021-08-20 16:37:50 +08:00
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{
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case STOP_BITS_1:
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uart->handle.stopBits = FL_UART_STOP_BIT_WIDTH_1B;
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break;
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case STOP_BITS_2:
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uart->handle.stopBits = FL_UART_STOP_BIT_WIDTH_2B;
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break;
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default:
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uart->handle.stopBits = FL_UART_STOP_BIT_WIDTH_1B;
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_NONE:
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uart->handle.parity = FL_UART_PARITY_NONE;
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break;
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case PARITY_ODD:
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uart->handle.parity = FL_UART_PARITY_ODD;
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break;
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case PARITY_EVEN:
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uart->handle.parity = FL_UART_PARITY_EVEN;
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break;
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default:
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uart->handle.parity = FL_UART_PARITY_NONE;
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break;
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}
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2021-08-27 15:19:21 +08:00
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2021-08-20 16:37:50 +08:00
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uart->handle.transferDirection = FL_UART_DIRECTION_TX_RX;
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2021-08-27 15:19:21 +08:00
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if (FL_UART_Init(uart->config->InitTypeDef, &uart->handle) != FL_PASS)
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2021-08-20 16:37:50 +08:00
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{
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct _uart *uart;
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#ifdef RT_SERIAL_USING_DMA
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rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
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#endif
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct _uart, serial);
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switch (cmd)
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{
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/* disable interrupt */
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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NVIC_DisableIRQ(uart->config->irq_type);
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/* disable interrupt */
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2021-08-27 15:19:21 +08:00
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FL_UART_DisableIT_RXBuffFull(uart->config->InitTypeDef);
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2021-08-20 16:37:50 +08:00
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break;
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/* enable interrupt */
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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2021-08-27 15:19:21 +08:00
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NVIC_SetPriority(uart->config->irq_type, 1);
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2021-08-20 16:37:50 +08:00
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NVIC_EnableIRQ(uart->config->irq_type);
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/* enable interrupt */
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2021-08-27 15:19:21 +08:00
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FL_UART_EnableIT_RXBuffFull(uart->config->InitTypeDef);
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2021-08-20 16:37:50 +08:00
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break;
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#ifdef RT_SERIAL_USING_DMA
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case RT_DEVICE_CTRL_CONFIG:
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stm32_dma_config(serial, ctrl_arg);
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break;
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#endif
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case RT_DEVICE_CTRL_CLOSE:
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2021-08-27 15:19:21 +08:00
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if (FL_UART_DeInit(uart->config->InitTypeDef) != FL_PASS)
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2021-08-20 16:37:50 +08:00
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{
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RT_ASSERT(0)
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}
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break;
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}
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return RT_EOK;
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}
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static int uart_putc(struct rt_serial_device *serial, char c)
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{
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struct _uart *uart;
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RT_ASSERT(serial != RT_NULL);
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2021-08-27 15:19:21 +08:00
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uart = rt_container_of(serial, struct _uart, serial);
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2022-07-26 10:11:12 +08:00
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FL_UART_WriteTXBuff(uart->config->InitTypeDef, c); //发送一个数据
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2021-08-20 16:37:50 +08:00
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while (FL_SET != FL_UART_IsActiveFlag_TXShiftBuffEmpty(uart->config->InitTypeDef));
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return 1;
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}
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static int uart_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct _uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct _uart, serial);
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ch = -1;
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if (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(uart->config->InitTypeDef))
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{
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2022-07-26 10:11:12 +08:00
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ch = FL_UART_ReadRXBuff(uart->config->InitTypeDef);//接收中断标志可通过读取rxreg寄存器清除
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2021-08-20 16:37:50 +08:00
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}
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return ch;
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}
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial)
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{
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struct _uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct _uart, serial);
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/* UART in mode Receiver -------------------------------------------------*/
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2021-08-27 15:19:21 +08:00
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if ((FL_ENABLE == FL_UART_IsEnabledIT_RXBuffFull(uart->config->InitTypeDef))
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2021-08-20 16:37:50 +08:00
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&& (FL_SET == FL_UART_IsActiveFlag_RXBuffFull(uart->config->InitTypeDef)))
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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}
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#if defined(BSP_USING_UART0)
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void UART0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[UART0_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART1)
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void UART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[UART1_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART4)
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void UART4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[UART4_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART4 */
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#if defined(BSP_USING_UART5)
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void UART5_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[UART5_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART5 */
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#if defined(BSP_USING_LPUART0)
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void LPUART0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[LPUART0_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART0*/
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#if defined(BSP_USING_LPUART1)
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void LPUART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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uart_isr(&(uart_obj[LPUART1_INDEX].serial));
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART1*/
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static const struct rt_uart_ops _uart_ops =
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{
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.configure = uart_configure,
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.control = uart_control,
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.putc = uart_putc,
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.getc = uart_getc,
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.dma_transmit = 0
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};
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int rt_hw_usart_init(void)
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{
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rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct _uart);
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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rt_err_t result = 0;
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for (int i = 0; i < obj_num; i++)
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{
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/* init UART object */
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uart_obj[i].config = &uart_config[i];
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uart_obj[i].serial.ops = &_uart_ops;
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uart_obj[i].serial.config = config;
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/* register UART device */
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result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
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RT_DEVICE_FLAG_RDWR
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| RT_DEVICE_FLAG_INT_RX
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| RT_DEVICE_FLAG_INT_TX
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| uart_obj[i].uart_dma_flag
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, NULL);
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RT_ASSERT(result == RT_EOK);
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}
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return result;
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}
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#endif /* RT_USING_SERIAL */
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