2018-12-24 15:59:13 +08:00
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-5 SummerGift change to new framework
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <rtthread.h>
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#include <stm32f0xx.h>
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#include "drv_common.h"
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2018-12-26 18:11:35 +08:00
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#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
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#define STM32_FLASH_SIZE (256 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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2018-12-24 15:59:13 +08:00
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/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
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#define STM32_SRAM_SIZE 32
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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#endif
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#define HEAP_END STM32_SRAM_END
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void SystemClock_Config(void);
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#endif /* __BOARD_H__ */
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