2013-01-08 22:40:58 +08:00
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#ifndef __SAM7X_EMAC_H__
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#define __SAM7X_EMAC_H__
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//#define DM9161
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#define RTL8201
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#ifdef DM9161
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#define AT91C_PHY_ADDR 31
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#else
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#define AT91C_PHY_ADDR 0x01
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#endif
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#define MII_DM9161_ID 0x0181b8a0
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#define MII_RTL8201_ID 0x82010000
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/* RTL8201 PHY registers. */
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#define PHY_REG_BMCR 0x00 /* Basic mode control register */
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#define PHY_REG_BMSR 0x01 /* Basic mode status register */
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#define PHY_REG_PHYID1 0x02 /* PHY ID identifier #1 */
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#define PHY_REG_PHYID2 0x03 /* PHY ID identifier #2 */
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#define PHY_REG_ANAR 0x04 /* AutoNegotiation Advertisement reg.*/
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#define PHY_REG_ANLPAR 0x05 /* AutoNeg.Link partner ability reg */
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#define PHY_REG_ANER 0x06 /* AutoNeg. Expansion register */
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#define PHY_REG_DSCR 0x10 /* DAVICOM Specified Config. reg */
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#define PHY_REG_DSCSR 0x11 /* DAVICOM Spec. Config/Status reg */
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#define PHY_REG_10BTCSR 0x12 /* 10BASET Configuration/Status reg */
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#define PHY_REG_PWDOR 0x13 /* Power Down Control Register */
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#define PHY_REG_SCR 0x14 /* Specified Config register */
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#define PHY_REG_INTR 0x15 /* Interrupt register */
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#define PHY_REG_RECR 0x16 /* Receive Error Counter register */
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#define PHY_REG_DISCR 0x17 /* Disconnect Counter register */
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#define PHY_REG_RLSR 0x18 /* Hardware Reset Latch State reg. */
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/* Basic mode control register. */
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#define BMCR_RESV 0x007f /* Unused... */
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#define BMCR_CTST 0x0080 /* Collision test */
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#define BMCR_FULLDPLX 0x0100 /* Full duplex */
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#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
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#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
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#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
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#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
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#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
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#define BMCR_RESET 0x8000 /* Reset the DP83840 */
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#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */
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#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */
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#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */
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#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */
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#define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */
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/* Basic mode status register. */
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#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
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#define BMSR_JCD 0x0002 /* Jabber detected */
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#define BMSR_LINKST 0x0004 /* Link status */
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#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
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#define BMSR_RFAULT 0x0010 /* Remote fault detected */
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#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
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#define BMSR_MIIPRESUP 0x0040 /* MII Frame Preamble Suppression */
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#define BMSR_RESV 0x0780 /* Unused... */
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#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
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#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
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#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
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#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
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#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
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#define RxDESC_FLAG_ADDR_MASK 0xfffffffc
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#define RxDESC_FLAG_WARP 0x00000002
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#define RxDESC_FLAG_OWNSHIP 0x00000001
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#define RxDESC_STATUS_BUF_SIZE (0x00000FFF)
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#define RxDESC_STATUS_FRAME_START (1U << 14)
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#define RxDESC_STATUS_FRAME_END (1U << 15)
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#define TxDESC_STATUS_BUF_SIZE (0x000007FF)
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#define TxDESC_STATUS_LAST_BUF (1U << 15)
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#define TxDESC_STATUS_NO_CRC (1U << 16)
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#define TxDESC_STATUS_BUF_EXHAUSTED (1U << 27)
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#define TxDESC_STATUS_Tx_UNDERRUN (1U << 28)
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#define TxDESC_STATUS_Tx_ERROR (1U << 29)
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#define TxDESC_STATUS_WRAP (1U << 30)
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#define TxDESC_STATUS_USED (1U << 31)
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//----dm9161 define----
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#define DM9161_RESET (1 << 15) // 1= Software Reset; 0=Normal Operation
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#define DM9161_LOOPBACK (1 << 14) // 1=loopback Enabled; 0=Normal Operation
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#define DM9161_SPEED_SELECT (1 << 13) // 1=100Mbps; 0=10Mbps
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#define DM9161_AUTONEG (1 << 12) // Auto-negotiation Enable
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#define DM9161_POWER_DOWN (1 << 11) // 1=Power down 0=Normal operation
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#define DM9161_ISOLATE (1 << 10) // 1 = Isolates 0 = Normal operation
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#define DM9161_RESTART_AUTONEG (1 << 9) // 1 = Restart auto-negotiation 0 = Normal operation
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#define DM9161_DUPLEX_MODE (1 << 8) // 1 = Full duplex operation 0 = Normal operation
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#define DM9161_COLLISION_TEST (1 << 7) // 1 = Collision test enabled 0 = Normal operation
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#define DM9161_NP (1 << 15) // Next page Indication
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#define DM9161_ACK (1 << 14) // Acknowledge
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#define DM9161_RF (1 << 13) // Remote Fault
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// Reserved 12 to 11 // Write as 0, ignore on read
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#define DM9161_FCS (1 << 10) // Flow Control Support
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#define DM9161_T4 (1 << 9) // 100BASE-T4 Support
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#define DM9161_TX_FDX (1 << 8) // 100BASE-TX Full Duplex Support
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#define DM9161_TX_HDX (1 << 7) // 100BASE-TX Support
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#define DM9161_10_FDX (1 << 6) // 10BASE-T Full Duplex Support
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#define DM9161_10_HDX (1 << 5) // 10BASE-T Support
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// Selector 4 to 0 // Protocol Selection Bits
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#define DM9161_AN_IEEE_802_3 0x0001
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int sam7xether_register(char *name);
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#endif
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