2019-03-27 16:49:26 +08:00
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/*
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2019-03-29 10:50:01 +08:00
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* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
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2019-03-27 16:49:26 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2019-03-29 10:50:01 +08:00
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* 2018-09-15 flyingcys 1st version
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2019-03-27 16:49:26 +08:00
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "wm_type_def.h"
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#include "misc.h"
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#include "wm_cpu.h"
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#include "wm_debug.h"
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#include "wm_io.h"
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#include "wm_gpio_afsel.h"
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#include "wm_crypto_hard.h"
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#include "wm_hostspi.h"
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#include "wm_flash.h"
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#include "wm_internal_flash.h"
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#include "wm_fwup.h"
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#include "wm_pmu.h"
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#include "drv_uart.h"
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#include "board.h"
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#define FW_MAJOR_VER 0x03
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#define FW_MINOR_VER 0x00
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#define FW_PATCH_VER 0x00
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const char FirmWareVer[4] =
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{
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'G',
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FW_MAJOR_VER, /* Main version */
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FW_MINOR_VER, /* Subversion */
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FW_PATCH_VER /* Internal version */
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};
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const char HwVer[6] =
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{
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'H',
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0x1,
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0x0,
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0x0,
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0x0,
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0x0
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};
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const unsigned int HZ = RT_TICK_PER_SECOND;
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struct tls_ethif *tls_netif_get_ethif(void)
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{
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return RT_NULL;
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}
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int tls_os_get_type(void)
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{
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return 0;
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}
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err_t tls_dhcp_stop(void)
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{
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return 0;
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}
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u8 tls_get_isr_count(void)
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{
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return 0;
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}
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void *mem_alloc_debug(u32 size)
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{
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return rt_malloc(size);
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}
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void mem_free_debug(void *p)
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{
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rt_free(p);
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}
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void disp_version_info(void)
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{
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extern const char WiFiVer[];
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TLS_DBGPRT_INFO("\n\n");
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TLS_DBGPRT_INFO("****************************************************************\n");
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TLS_DBGPRT_INFO("* *\n");
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TLS_DBGPRT_INFO("* Copyright (C) 2014 WinnerMicro Co. Ltd. *\n");
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TLS_DBGPRT_INFO("* All rights reserved. *\n");
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TLS_DBGPRT_INFO("* WinnerMicro Firmware Version: %x.%x.%X *\n",
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FirmWareVer[1], FirmWareVer[2], FirmWareVer[3]);
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TLS_DBGPRT_INFO("* WinnerMicro Hardware Version: %x.%x.%x.%x.%x *\n",
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HwVer[1], HwVer[2], HwVer[3], HwVer[4], HwVer[5]);
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TLS_DBGPRT_INFO("* *\n");
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TLS_DBGPRT_INFO("* WinnerMicro Wi-Fi Lib Version: %x.%x.%x *\n",
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WiFiVer[0], WiFiVer[1], WiFiVer[2]);
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TLS_DBGPRT_INFO("****************************************************************\n");
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}
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void wm_gpio_config(void)
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{
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2021-03-12 00:09:55 +08:00
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/* must call first */
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wm_gpio_af_disable();
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2019-03-27 16:49:26 +08:00
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2021-03-12 00:09:55 +08:00
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/*MASTER SPI configuratioin*/
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wm_spi_cs_config(WM_IO_PA_02);
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wm_spi_ck_config(WM_IO_PA_11);
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wm_spi_di_config(WM_IO_PA_03);
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wm_spi_do_config(WM_IO_PA_09);
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2019-03-27 16:49:26 +08:00
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}
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static int wm_infsl_init(void)
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{
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tls_spi_init();
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tls_spifls_init();
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tls_fls_init();
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/*initialize flash layout parameter according to image type*/
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tls_fls_layout_init();
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return 0;
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}
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INIT_DEVICE_EXPORT(wm_infsl_init);
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static void _idle_hook_callback(void)
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{
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#if !defined(__CC_ARM)
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__asm volatile ("wfi");
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#else
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__asm
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{
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WFI;
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}
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#endif
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}
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2019-08-03 10:39:03 +08:00
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static void _thread_inited_hook(rt_thread_t thread)
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{
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rt_uint32_t stack_size, stk_start;
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stack_size = (rt_uint32_t)thread->stack_size;
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stk_start = (rt_uint32_t)thread->stack_addr;
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if ((stk_start + stack_size) >= TASK_STACK_USING_MEM_UPPER_RANGE)
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{
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rt_kprintf("thread[%s] stack only between 0x%08x and 0x%08x, please use rt_create_thread()!!\n",
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2023-04-04 21:06:27 +08:00
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thread->parent.name, TASK_STACK_USING_MEM_LOWER_RANGE, TASK_STACK_USING_MEM_UPPER_RANGE);
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2019-08-03 10:39:03 +08:00
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}
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RT_ASSERT((stk_start + stack_size) < TASK_STACK_USING_MEM_UPPER_RANGE);
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}
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2019-03-27 16:49:26 +08:00
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void wm_sys_clk_config(void)
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{
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tls_sys_clk sysclk;
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tls_sys_clk_set(CPU_CLK_80M);
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tls_sys_clk_get(&sysclk);
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SysTick_Config(sysclk.cpuclk * UNIT_MHZ / RT_TICK_PER_SECOND);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
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tls_pmu_clk_select(0);
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void OS_CPU_SysTickHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial board.
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*/
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void rt_hw_board_init(void)
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{
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/* must call first to configure gpio Alternate functions according the hardware design */
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wm_gpio_config();
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wm_sys_clk_config();
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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2022-01-08 23:29:41 +08:00
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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2019-03-27 16:49:26 +08:00
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#if TLS_CONFIG_HARD_CRYPTO
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tls_crypto_init();
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#endif
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NVIC_SystemLPConfig(NVIC_LP_SLEEPDEEP, ENABLE);
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rt_thread_idle_sethook(_idle_hook_callback);
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2019-08-03 10:39:03 +08:00
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rt_thread_inited_sethook(_thread_inited_hook);
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}
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#include <wm_watchdog.h>
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void rt_hw_cpu_reset(void)
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{
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extern void tls_sys_reset(void);
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tls_sys_reset();
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2019-03-27 16:49:26 +08:00
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}
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2020-02-05 20:09:02 +08:00
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/**
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* The time delay function.
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*
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* @param microseconds.
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*/
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#include "wm_regs.h"
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void rt_hw_us_delay(rt_uint32_t us)
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{
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rt_uint32_t ticks;
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rt_uint32_t told, tnow, tcnt = 0;
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rt_uint32_t reload = SysTick->LOAD;
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ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1)
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{
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tnow = SysTick->VAL;
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if (tnow != told)
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{
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if (tnow < told)
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{
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tcnt += told - tnow;
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}
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else
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{
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tcnt += reload - tnow + told;
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}
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told = tnow;
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if (tcnt >= ticks)
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{
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break;
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}
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}
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}
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}
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2019-03-27 16:49:26 +08:00
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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static void reboot(uint8_t argc, char **argv)
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{
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rt_hw_cpu_reset();
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}
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2021-08-23 18:37:58 +08:00
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MSH_CMD_EXPORT(reboot, Reboot System);
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2019-03-27 16:49:26 +08:00
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#endif /* RT_USING_FINSH */
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/*@}*/
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