rt-thread-official/bsp/tae32f5300/board/linker_scripts/tae32f53xx_ac5_flash.sct

128 lines
4.4 KiB
Plaintext
Raw Permalink Normal View History

#! armcc -E
; command above MUST be in first line (no comment above!)
/*
;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
*/
/*--------------------- Flash Configuration ----------------------------------
; <h> Flash Configuration
; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __ROM_BASE 0x08000000
#define __ROM_SIZE 0x00012C00
/*--------------------- RAMCODE Section Configuration ------------------------
; <h> RAMCODE Configuration
2023-01-09 10:16:47 +08:00
; <o0.27..28> RAMCODE in which MCU
; <3=> TAE32F5300
; <2=> TAE32F5600
; <i> RAMCODE Base Address is different in different MCUs
; <i> Unsupported if your MCU is not in the list
; <o1> RAMCODE Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __RAMCODE_BASE 0x18000000
#define __RAMCODE_SIZE 0x00000000
/*--------------------- Embedded RAMA Configuration --------------------------
; <h> RAMA Configuration
; <o0> RAMA Base Address <0x0-0xFFFFFFFF:8>
; <o1> RAMA Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __RAMA_BASE 0x20000000
#define __RAMA_SIZE 0x00004000
/*--------------------- Embedded RAMB Configuration --------------------------
; <h> RAMB Configuration
; <o0> RAMB Base Address <0x0-0xFFFFFFFF:8>
; <o1> RAMB Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __RAMB_BASE 0x20004000
#define __RAMB_SIZE 0x00001000
/*--------------------- Embedded RAMC Configuration --------------------------
; <h> RAMC Configuration
; <o0> RAMC Base Address <0x0-0xFFFFFFFF:8>
; <o1> RAMC Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __RAMC_BASE 0x20005000
#define __RAMC_SIZE 0x00001000
/*--------------------- Stack / Heap Configuration ---------------------------
; <h> Stack / Heap Configuration
; <i> Stack and Heap will be placed in RAMA
; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __STACK_SIZE 0x00000400
#define __HEAP_SIZE 0x00000000
/*
;------------- <<< end of configuration section >>> ---------------------------
*/
/*----------------------------------------------------------------------------
User Stack & Heap boundary definition
*----------------------------------------------------------------------------*/
#define __STACK_TOP (__RAMA_BASE + __RAMA_SIZE) /* starts at end of RAMA */
#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAMA section, 8 byte aligned */
/*----------------------------------------------------------------------------
Scatter File Definitions definition
*----------------------------------------------------------------------------*/
#define __RO_BASE __ROM_BASE
#define __RO_SIZE __ROM_SIZE
#define __RW_CODE_BASE __RAMCODE_BASE
#define __RW_CODE_SIZE __RAMCODE_SIZE
#define __RW_BASE (__RAMA_BASE + __RAMCODE_SIZE)
#define __RW_SIZE (__RAMA_SIZE - __RAMCODE_SIZE - __STACK_SIZE - __HEAP_SIZE)
LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
2023-01-09 10:16:47 +08:00
#if __RW_CODE_SIZE > 0
RW_CODE __RW_CODE_BASE __RW_CODE_SIZE {
*.o (RAMCODE)
}
#endif
RW_RAMA __RW_BASE __RW_SIZE { ; RWA data
*.o (SECTION_RAMA)
.ANY (+RW +ZI)
}
#if __HEAP_SIZE > 0
ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
}
#endif
ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
}
2023-01-09 10:16:47 +08:00
RW_RAMB __RAMB_BASE __RAMB_SIZE { ; RWB region
*.o (SECTION_RAMB)
}
RW_RAMC __RAMC_BASE __RAMC_SIZE { ; RWC region
*.o (SECTION_RAMC)
}
}