671 lines
14 KiB
Plaintext
671 lines
14 KiB
Plaintext
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#! armclang -mcpu=cortex-m4 --target=arm-arm-none-eabi -E -x c -I.
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#include "memory_regions.scat"
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; This scatter-file places the vector table, application code, data, stacks and heap at suitable addresses in the memory map.
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#define ROM_REGISTERS_START 0x400
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#ifdef FLASH_BOOTLOADER_LENGTH
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#define BL_FLASH_IMAGE_START (FLASH_APPLICATION_IMAGE_NUMBER == 1 ? FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH : \
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FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_SCRATCH_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH)
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#define BL_FLASH_IMAGE_END (BL_FLASH_IMAGE_START + FLASH_APPLICATION_S_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH)
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#define BL_FLASH_NS_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \
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BL_FLASH_IMAGE_START - FLASH_BOOTLOADER_HEADER_LENGTH + FLASH_APPLICATION_S_LENGTH)
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#define BL_FLASH_NSC_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \
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BL_FLASH_NS_START - FLASH_APPLICATION_NSC_LENGTH)
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#define BL_FLASH_NS_IMAGE_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \
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BL_FLASH_NS_START + FLASH_BOOTLOADER_HEADER_LENGTH_2)
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#define BL_RAM_NS_START (FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : \
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RAM_START + RAM_LENGTH - RAM_APPLICATION_NS_LENGTH)
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#define BL_RAM_NSC_START (FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : \
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BL_RAM_NS_START - RAM_APPLICATION_NSC_LENGTH)
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#define BLN_FLASH_IMAGE_START (BL_FLASH_NS_IMAGE_START)
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#define BLN_FLASH_IMAGE_END (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \
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BL_FLASH_NS_IMAGE_START + FLASH_APPLICATION_NS_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH_2)
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#define FLASH_ORIGIN FLASH_START
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#define LIMITED_FLASH_LENGTH FLASH_BOOTLOADER_LENGTH
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#elif defined FLASH_IMAGE_START
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#define FLASH_ORIGIN FLASH_IMAGE_START
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#ifdef FLASH_NS_START
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#define LIMITED_FLASH_LENGTH FLASH_NS_START - FLASH_IMAGE_START
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#else
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#define LIMITED_FLASH_LENGTH FLASH_IMAGE_END - FLASH_IMAGE_START
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#endif
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#else
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#define FLASH_ORIGIN FLASH_START
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#define LIMITED_FLASH_LENGTH FLASH_LENGTH
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#endif
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; If a flat project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM.
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#if !defined(PROJECT_NONSECURE) && defined(RAM_NS_BUFFER_LENGTH)
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#define __RESERVE_NS_RAM (1)
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; Allocate required RAM and align to 32K boundary
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#define RAM_NS_BUFFER_START ((RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH) AND 0xFFFFFFE0)
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#else
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#define __RESERVE_NS_RAM (0)
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#endif
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#ifndef FLASH_S_START
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#define FLASH_S_START 0
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#endif
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#ifndef RAM_S_START
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#define RAM_S_START RAM_START
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#endif
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#ifndef DATA_FLASH_S_START
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#define DATA_FLASH_S_START DATA_FLASH_START
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#endif
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#if __RESERVE_NS_RAM
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#ifndef RAM_NSC_START
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#define RAM_NSC_START RAM_NS_BUFFER_START AND 0xFFFFE000
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#endif
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#ifndef RAM_NS_START
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#define RAM_NS_START RAM_NS_BUFFER_START AND 0xFFFFE000
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#endif
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#ifndef DATA_FLASH_NS_START
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#define DATA_FLASH_NS_START DATA_FLASH_START + DATA_FLASH_LENGTH
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#endif
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#ifndef FLASH_NSC_START
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#define FLASH_NSC_START FLASH_ORIGIN + LIMITED_FLASH_LENGTH
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#endif
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#ifndef FLASH_NS_START
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#define FLASH_NS_START FLASH_ORIGIN + LIMITED_FLASH_LENGTH
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#endif
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#else
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#ifndef RAM_NSC_START
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#ifdef PROJECT_SECURE
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#define RAM_NSC_START +0 ALIGN 1024
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#else
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#define RAM_NSC_START RAM_START + RAM_LENGTH
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#endif
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#endif
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#ifndef RAM_NS_START
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#ifdef PROJECT_SECURE
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#define RAM_NS_START +0 ALIGN 8192
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#else
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#define RAM_NS_START RAM_START + RAM_LENGTH
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#endif
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#endif
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#ifndef DATA_FLASH_NS_START
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#define DATA_FLASH_NS_START +0 ALIGN 1024
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#endif
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#ifndef FLASH_NSC_START
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#define FLASH_NSC_START +0 ALIGN 1024
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#endif
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#ifndef FLASH_NS_START
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#define FLASH_NS_START +0 ALIGN 32768
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#endif
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#endif
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#ifndef QSPI_FLASH_S_START
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#define QSPI_FLASH_S_START QSPI_FLASH_START
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#endif
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#ifndef QSPI_FLASH_NS_START
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#define QSPI_FLASH_NS_START +0
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#endif
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#ifndef OSPI_DEVICE_0_S_START
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#define OSPI_DEVICE_0_S_START OSPI_DEVICE_0_START
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#endif
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#ifndef OSPI_DEVICE_0_NS_START
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#define OSPI_DEVICE_0_NS_START +0
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#endif
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#ifndef OSPI_DEVICE_1_S_START
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#define OSPI_DEVICE_1_S_START OSPI_DEVICE_1_START
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#endif
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#ifndef OSPI_DEVICE_1_NS_START
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#define OSPI_DEVICE_1_NS_START +0
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#endif
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#ifndef SDRAM_S_START
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#define SDRAM_S_START SDRAM_START
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#endif
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#ifndef SDRAM_NS_START
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#define SDRAM_NS_START +0
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#endif
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#ifdef QSPI_FLASH_SIZE
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#define QSPI_FLASH_PRV_LENGTH QSPI_FLASH_SIZE
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#else
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#define QSPI_FLASH_PRV_LENGTH QSPI_FLASH_LENGTH
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#endif
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#ifdef OSPI_DEVICE_0_SIZE
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#define OSPI_DEVICE_0_PRV_LENGTH OSPI_DEVICE_0_SIZE
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#else
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#define OSPI_DEVICE_0_PRV_LENGTH OSPI_DEVICE_0_LENGTH
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#endif
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#ifdef OSPI_DEVICE_1_SIZE
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#define OSPI_DEVICE_1_PRV_LENGTH OSPI_DEVICE_1_SIZE
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#else
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#define OSPI_DEVICE_1_PRV_LENGTH OSPI_DEVICE_1_LENGTH
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#endif
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#define OPTION_SETTING_NS_OFFSET 0x80
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LOAD_REGION_FLASH FLASH_ORIGIN ALIGN 0x80 LIMITED_FLASH_LENGTH
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{
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__tz_FLASH_S +0 EMPTY 0
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{
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}
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VECTORS +0 FIXED PADVALUE 0xFFFFFFFF ; maximum of 256 exceptions (256*4 bytes == 0x400)
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{
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*(.fixed_vectors, +FIRST)
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*(.application_vectors)
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}
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#if (OPTION_SETTING_LENGTH == 0) && (FLASH_ORIGIN == FLASH_START)
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/* MCUs with the OPTION_SETTING region do not use the ROM registers at 0x400. */
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VECTORS_FILL +0 FIXED FILL 0xFFFFFFFF (0x400 - ImageLength(VECTORS))
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{
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}
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ROM_REGISTERS FLASH_START+0x400 FIXED PADVALUE 0xFFFFFFFF
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{
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bsp_rom_registers.o (.rom_registers)
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}
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ROM_REGISTERS_FILL +0 FIXED FILL 0xFFFFFFFF (0x100 - ImageLength(ROM_REGISTERS))
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{
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}
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#endif
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MCUBOOT_SCE9_KEY +0 FIXED
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{
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*(.mcuboot_sce9_key)
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}
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INIT_ARRAY +0 FIXED
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{
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*(.init_array)
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}
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USB_DESC_FS +0 FIXED
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{
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*(.usb_device_desc_fs*)
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*(.usb_config_desc_fs*)
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*(.usb_interface_desc_fs*)
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}
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RO_CODE_DATA +0 FIXED
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{
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*(.text*,.rodata*,.constdata*)
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.ANY(+RO)
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}
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__tz_RAM_S RAM_S_START EMPTY 0
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{
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}
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DTC_VECTOR_TABLE RAM_START UNINIT NOCOMPRESS RAM_LENGTH
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{
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; If DTC is used, put the DTC vector table at the start of SRAM.
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; This avoids memory holes due to 1K alignment required by it.
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*(.bss.fsp_dtc_vector_table)
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}
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DATA +0 NOCOMPRESS
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{
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; Do not use *(.data*) because it will place data meant for .data_flash in this section.
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*(.data.*)
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*(.data)
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*(.code_in_ram)
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#if !__RESERVE_NS_RAM
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*(.ns_buffer*)
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#endif
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.ANY(+RW)
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}
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BSS +0 NOCOMPRESS
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{
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*(+ZI)
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}
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NOINIT +0 UNINIT NOCOMPRESS
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{
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*(.bss.noinit)
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}
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ARM_LIB_HEAP +0 ALIGN 8 UNINIT NOCOMPRESS
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{
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*(.bss.heap)
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}
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; ARM_LIB_STACK is not used in FSP, but it must be in the scatter file to avoid a linker error
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ARM_LIB_STACK +0 ALIGN 8 UNINIT NOCOMPRESS EMPTY 0
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{
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}
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STACK +0 ALIGN 8 UNINIT NOCOMPRESS
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{
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*(.bss.stack)
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*(.bss.stack.thread)
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}
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/* This is the end of RAM used in the application. */
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RAM_END +0 EMPTY 4
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{
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}
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; Support for OctaRAM
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OSPI_DEVICE_0_NO_LOAD OSPI_DEVICE_0_START UNINIT NOCOMPRESS
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{
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*(.ospi_device_0_no_load*)
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}
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; Support for OctaRAM
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OSPI_DEVICE_1_NO_LOAD OSPI_DEVICE_1_START UNINIT NOCOMPRESS
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{
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*(.ospi_device_1_no_load*)
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}
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__tz_RAM_C RAM_NSC_START EMPTY 0
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{
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}
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__tz_RAM_N RAM_NS_START EMPTY 0
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{
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}
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#ifdef FLASH_BOOTLOADER_LENGTH
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__bl_FLASH_IMAGE_START BL_FLASH_IMAGE_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_flash_image_start)
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}
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#if FLASH_APPLICATION_NS_LENGTH == 0
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__bl_FLASH_IMAGE_END BL_FLASH_IMAGE_END OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_flash_image_end)
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}
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#else
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__bl_FLASH_NS_START BL_FLASH_NS_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_flash_ns_start)
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}
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__bl_FLASH_NSC_START BL_FLASH_NSC_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_flash_nsc_start)
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}
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__bl_FLASH_NS_IMAGE_START BL_FLASH_NS_IMAGE_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_flash_ns_image_start)
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}
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__bln_FLASH_IMAGE_START BLN_FLASH_IMAGE_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bln_flash_image_start)
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}
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__bln_FLASH_IMAGE_END BLN_FLASH_IMAGE_END OVERLAY UNINIT 4
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{
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*(.bl_boundary.bln_flash_image_end)
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}
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__bl_RAM_NS_START BL_RAM_NS_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_ram_ns_start)
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}
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__bl_RAM_NSC_START BL_RAM_NSC_START OVERLAY UNINIT 4
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{
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*(.bl_boundary.bl_ram_nsc_start)
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}
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#endif
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#endif
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#if __RESERVE_NS_RAM
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RAM_NS_BUFFER RAM_NS_BUFFER_START
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{
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*(.ns_buffer*)
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}
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#endif
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RAM_LIMIT RAM_START+RAM_LENGTH EMPTY 4
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{
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}
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}
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LOAD_REGION_NSC_FLASH FLASH_NSC_START
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{
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__tz_FLASH_C FLASH_NSC_START EMPTY 0
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{
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}
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EXEC_NSCR FLASH_NSC_START FIXED
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{
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*(Veneer$$CMSE)
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}
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__tz_FLASH_N FLASH_NS_START EMPTY 0
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{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#if ID_CODE_LENGTH != 0
|
||
|
|
LOAD_REGION_ID_CODE ID_CODE_START ID_CODE_LENGTH
|
||
|
|
{
|
||
|
|
__tz_ID_CODE_S ID_CODE_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
ID_CODE +0 FIXED
|
||
|
|
{
|
||
|
|
*(.id_code*)
|
||
|
|
}
|
||
|
|
|
||
|
|
__tz_ID_CODE_N +0 EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
LOAD_REGION_ID_CODE ID_CODE_START 4
|
||
|
|
{
|
||
|
|
__tz_ID_CODE_S ID_CODE_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
__tz_ID_CODE_N +0 EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if OPTION_SETTING_LENGTH != 0
|
||
|
|
LOAD_REGION_OPTION_SETTING OPTION_SETTING_START OPTION_SETTING_LENGTH
|
||
|
|
{
|
||
|
|
__tz_OPTION_SETTING_S OPTION_SETTING_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifndef PROJECT_NONSECURE
|
||
|
|
OFS0 OPTION_SETTING_START+0 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_ofs0)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_0 (ImageBase(OFS0)+ImageLength(OFS0)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x10 - (ImageBase(OFS0)+ImageLength(OFS0)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
DUALSEL 0x0100A100+0x10 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_dualsel)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_1 (ImageBase(DUALSEL)+ImageLength(DUALSEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x34 - (ImageBase(DUALSEL)+ImageLength(DUALSEL)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
SAS 0x0100A100+0x34 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_sas)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_2 (ImageBase(SAS)+ImageLength(SAS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x80 - (ImageBase(SAS)+ImageLength(SAS)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
OFS1 0x0100A100+0x80 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_ofs1)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_3 (ImageBase(OFS1)+ImageLength(OFS1)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x10 - (ImageBase(OFS1)+ImageLength(OFS1)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BANKSEL 0x0100A100+0x90 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_banksel)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_4 (ImageBase(BANKSEL)+ImageLength(BANKSEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x40 - (ImageBase(BANKSEL)+ImageLength(BANKSEL)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BPS 0x0100A100+0xC0 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_bps0)
|
||
|
|
*(.option_setting_bps1)
|
||
|
|
*(.option_setting_bps2)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_5 (ImageBase(BPS)+ImageLength(BPS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x60 - (ImageBase(BPS)+ImageLength(BPS)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
PBPS 0x0100A100+0xE0 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_pbps0)
|
||
|
|
*(.option_setting_pbps1)
|
||
|
|
*(.option_setting_pbps2)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_6 (ImageBase(PBPS)+ImageLength(PBPS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x80 - (ImageBase(PBPS)+ImageLength(PBPS)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
__tz_OPTION_SETTING_N OPTION_SETTING_START + OPTION_SETTING_NS_OFFSET EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#if OPTION_SETTING_S_LENGTH != 0
|
||
|
|
LOAD_REGION_OPTION_SETTING_S OPTION_SETTING_S_START OPTION_SETTING_S_LENGTH
|
||
|
|
{
|
||
|
|
__tz_OPTION_SETTING_S_S OPTION_SETTING_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifndef PROJECT_NONSECURE
|
||
|
|
|
||
|
|
OFS1_SEC OPTION_SETTING_S_START+0 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_ofs1_sec)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_7 (ImageBase(OFS1_SEC)+ImageLength(OFS1_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x10 - (ImageBase(OFS1_SEC)+ImageLength(OFS1_SEC)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BANKSEL_SEC OPTION_SETTING_S_START+0x10 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_banksel_sec)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_8 (ImageBase(BANKSEL_SEC)+ImageLength(BANKSEL_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x40 - (ImageBase(BANKSEL_SEC)+ImageLength(BANKSEL_SEC)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BPS_SEC OPTION_SETTING_S_START+0x40 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_bps_sec0)
|
||
|
|
*(.option_setting_bps_sec1)
|
||
|
|
*(.option_setting_bps_sec2)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_9 (ImageBase(BPS_SEC)+ImageLength(BPS_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x60 - (ImageBase(BPS_SEC)+ImageLength(BPS_SEC)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
PBPS_SEC OPTION_SETTING_S_START+0x60 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_pbps_sec0)
|
||
|
|
*(.option_setting_pbps_sec1)
|
||
|
|
*(.option_setting_pbps_sec2)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_10 (ImageBase(PBPS_SEC)+ImageLength(PBPS_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x80 - (ImageBase(PBPS_SEC)+ImageLength(PBPS_SEC)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
OFS1_SEL OPTION_SETTING_S_START+0x80 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_ofs1_sel)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_11 (ImageBase(OFS1_SEL)+ImageLength(OFS1_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x90 - (ImageBase(OFS1_SEL)+ImageLength(OFS1_SEL)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BANKSEL_SEL OPTION_SETTING_S_START+0x90 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_banksel_sel)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_12 (ImageBase(BANKSEL_SEL)+ImageLength(BANKSEL_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0xC0 - (ImageBase(BANKSEL_SEL)+ImageLength(BANKSEL_SEL)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
BPS_SEL OPTION_SETTING_S_START+0xC0 FIXED
|
||
|
|
{
|
||
|
|
*(.option_setting_bps_sel0)
|
||
|
|
*(.option_setting_bps_sel1)
|
||
|
|
*(.option_setting_bps_sel2)
|
||
|
|
}
|
||
|
|
|
||
|
|
UNUSED_13 (ImageBase(BPS_SEL)+ImageLength(BPS_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x100 - (ImageBase(BPS_SEL)+ImageLength(BPS_SEL)))
|
||
|
|
{
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
__tz_OPTION_SETTING_S_N +0 EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
LOAD_REGION_DATA_FLASH DATA_FLASH_START DATA_FLASH_LENGTH
|
||
|
|
{
|
||
|
|
__tz_DATA_FLASH_S DATA_FLASH_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
DATA_FLASH +0 FIXED
|
||
|
|
{
|
||
|
|
*(.data_flash*)
|
||
|
|
}
|
||
|
|
__tz_DATA_FLASH_N DATA_FLASH_NS_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
LOAD_REGION_QSPI_FLASH QSPI_FLASH_START QSPI_FLASH_PRV_LENGTH
|
||
|
|
{
|
||
|
|
__tz_QSPI_FLASH_S QSPI_FLASH_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
QSPI_FLASH +0 FIXED
|
||
|
|
{
|
||
|
|
*(.qspi_flash*)
|
||
|
|
*(.code_in_qspi*)
|
||
|
|
}
|
||
|
|
__tz_QSPI_FLASH_N QSPI_FLASH_NS_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
LOAD_REGION_OSPI_DEVICE_0 OSPI_DEVICE_0_START OSPI_DEVICE_0_PRV_LENGTH
|
||
|
|
{
|
||
|
|
__tz_OSPI_DEVICE_0_S OSPI_DEVICE_0_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
OSPI_DEVICE_0 +0 FIXED
|
||
|
|
{
|
||
|
|
*(.ospi_device_0*)
|
||
|
|
*(.code_in_ospi_device_0*)
|
||
|
|
}
|
||
|
|
__tz_OSPI_DEVICE_0_N OSPI_DEVICE_0_NS_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
LOAD_REGION_OSPI_DEVICE_1 OSPI_DEVICE_1_START OSPI_DEVICE_1_PRV_LENGTH
|
||
|
|
{
|
||
|
|
__tz_OSPI_DEVICE_1_S OSPI_DEVICE_1_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
OSPI_DEVICE_1 +0 FIXED
|
||
|
|
{
|
||
|
|
*(.ospi_device_1*)
|
||
|
|
*(.code_in_ospi_device_1*)
|
||
|
|
}
|
||
|
|
__tz_OSPI_DEVICE_1_N OSPI_DEVICE_1_NS_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
LOAD_REGION_SDRAM SDRAM_START SDRAM_LENGTH
|
||
|
|
{
|
||
|
|
__tz_SDRAM_S SDRAM_S_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
SDRAM +0 FIXED
|
||
|
|
{
|
||
|
|
*(.sdram*)
|
||
|
|
*(.frame*)
|
||
|
|
}
|
||
|
|
__tz_SDRAM_N SDRAM_NS_START EMPTY 0
|
||
|
|
{
|
||
|
|
}
|
||
|
|
}
|